JPH10240195A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To integrate hole device into a LSI by displaying picture element data without a sense of incongruity consisting of the number of picture elements less than those of a LCD panel without using frame memory. SOLUTION: A control circuit 6 sends to a multiplexer 2 a selection signal SEL for selecting picture signal from an A/D converter 1 or a black data outputted from a control circuit 6. The selection signal SEL is determined according to a specification of a picture data inputted to a liquid crystal display device. For example, LCD 3 does not need to display block data when displaying a picture data to XGA specifications. When a picture data to VGA specifications is displayed, LCD is composed of an effective data consisting of 640×480 picture elements and empty spaces of up and bottom and right and left of the effective data, and picture elements are left over, and the black data are displayed by the remaining picture elements for a display without a sense of incongruity. A large scale of frame memory is not required for integrating into LSI.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a liquid crystal display device.

[0002]

2. Description of the Related Art Liquid Crystal Display (LCD)
DISPLAY) generally stores image data for one screen in a frame memory and displays the image data stored in the frame memory on a display screen.

FIG. 1 shows a specific example. As shown in FIG. 1, the liquid crystal display (LCD) includes an A / D converter, a frame memory, a control circuit, an LCD panel, a source driver, and a gate driver.

An A / D converter is a liquid crystal display (LC).
Analog RGB signals input to D) are converted to digital RGB
Convert to a signal. The frame memory is a dynamic RAM having the same capacity as the number of pixels of the LCD panel, and is a memory for storing digital RGB signals for one screen.

A source driver converts a digital RGB signal into an analog RGB signal, and converts the converted analog RGB signal.
A gradation voltage according to the B signal is applied to each pixel on the LCD panel.

[0006] The gate driver scans the LCD panel. For example, when a command value for scanning the first line is input from the control circuit, the gate driver applies a scanning voltage to each pixel on the first line of the LCD panel. At this time, the source driver applies a gradation voltage to each pixel on the first line of the LCD panel. Subsequently, when the gate driver applies a scanning voltage to each pixel on the second line, the source driver applies a gradation voltage to each pixel on the second line of the LCD panel. Similarly, by scanning from the third line to the last line, one screen of image data stored in the frame memory is displayed on the LCD panel.

The control circuit controls the A / D converter, the frame memory, the source driver, and the gate driver according to the horizontal synchronizing signal and the vertical synchronizing signal included in the analog RGB signals input to the liquid crystal display device. Give a signal. For example, when a vertical synchronization signal is input, the control circuit applies an operating voltage to the gate driver on the first line of the gate driver. The gate driver on the first line to which the operating voltage is input applies a drive voltage to each pixel on the first line of the LCD panel.

When the horizontal synchronizing signal is input, the control circuit serially supplies the source driver with the gradation voltage stored in the first line of the frame memory. When all the gradation voltages for one line are input,
The source driver outputs the grayscale voltages for one line all at once.

At this time, in the LCD panel, the pixel at the position where the drive voltage from the gate driver and the gray scale voltage from the source driver intersect, that is, the pixel on the first line of the LCD panel is driven according to the gray scale voltage. Will be.

In the field of computers, VGA standard 640 × 480 or SVGA standard 800 × 60
A liquid crystal display device capable of displaying images having various numbers of pixels, such as 0, XGA standard 1024 × 768, etc. is desired.
For this reason, the liquid crystal display device is provided with an LCD panel having a large number of pixels in advance, and displays images of VGA, SVGA, and XGA standards as required. And the liquid crystal display device is an LCD
When displaying image data having a smaller number of pixels than the number of pixels of the panel, the image data is written to the frame memory, and black data is written to the surplus area of the frame memory. (The number of pixels of the image is the same as the number of pixels of the LCD panel). At this time, the image displayed on the LCD panel is an image without a sense of incongruity.

[0011]

Since the conventional LCD display device requires a frame memory having the same capacity as the number of pixels of the LCD panel, there is a problem that it is difficult to make the device an LSI.

In view of the above, the present invention has been made in view of the above-described problems, and has a device configuration which does not use a frame memory, is easily integrated into an LSI, and has a smaller number of pixels than the number of pixels of an LCD panel. It is an object to provide a technique capable of displaying image data without a sense of incongruity.

[0013]

The present invention employs the following means in order to solve the above-mentioned problems. That is,
An LCD display device according to the present invention includes a liquid crystal display panel including a predetermined number of pixels, image data input means for inputting image data to be displayed on the liquid crystal display panel, and black data to be displayed on the liquid crystal display panel. Black data generation means for generating, and data for selecting one of image data input by the image data input means and black data generated by the black data generation means, and transmitting the selected data to the liquid crystal display panel Selecting means, when the number of pixels of image data input by the image data input means is smaller than the number of pixels of the liquid crystal display panel, while the image data input means is inputting invalid data, In response, the image data input unit transmits a signal designating selection of black data generated by the black data generation unit, and the image data input unit transmits valid image data. While it is force (corresponding to claim 1), wherein the data the image data input means with respect to selecting means and a control means for transmitting a signal for designating the selection of valid image data to be input.

In one horizontal synchronization period, while the image data input means is inputting invalid image data, the control means controls the display data generation means.
A signal designating selection of black data generated by the black data generating means is transmitted, and during the one horizontal synchronization period, the display data generation is performed while the image data input means is inputting valid image data. A signal designating selection of valid image data input by the image data input means may be transmitted to the means (corresponding to claim 1).

[0015] Further, during one vertical synchronization period, while the image data input means is inputting invalid image data, the control means may provide the display data generating means with black data generated by the black data generating means. Is transmitted, and during the one vertical synchronization period, while the image data input unit is inputting valid image data, the image data input unit transmits to the display data generation unit. A signal designating selection of valid image data to be input may be transmitted (corresponding to claim 3).

Further, the liquid crystal display panel may display the black data from the data selection means once for each specific frame. Further, the liquid crystal display panel includes a driving unit that drives a pixel on the liquid crystal panel, and the control circuit includes a driving unit that drives a pixel to display black data among the driving unit.
The black data generated by the black data generating means may be always supplied (corresponding to claim 5).

Further, the liquid crystal display panel may display the black data from the data selection means on a plurality of horizontal lines in one horizontal period in a time-division manner.

Next, the liquid crystal display panel may display effective image data only in one frame out of a predetermined number of frames, and may only display black data in other frames. Correspondence).

Further, the liquid crystal display panel may simultaneously display the black data from the data selection means on a plurality of horizontal lines during one horizontal period (corresponding to claim 8).

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a liquid crystal display device according to the present invention will be described with reference to the drawings. 1 and 2 are views showing one embodiment of the liquid crystal display device according to the present invention.

In FIG. 1, the liquid crystal display device includes an A / D converter 1 as image data input means, a multiplexer 2 as data selection means, an LCD panel 3 as a liquid crystal display panel, and a source driver as drive means. 4, a gate driver 5, and a control circuit 6 which also serves as black data generation means and control means.

The A / D converter 1 converts an analog RGB signal input to a liquid crystal display device into a digital RGB signal. The multiplexer 2 captures one of the digital RGB signal converted by the A / D converter 1 and the black signal from the control circuit 6, and transmits the captured data to the source driver 4.

The LCD panel 3 includes a thin film transistor (T
The display panel is an FT) type display panel and has 1024 × 768 pixels. As shown in FIG. 2, each pixel includes three liquid crystals 7, 8, 9 and a color filter 1 of three primary colors (RGB).
0, 11, and 12 and transistor TFTs 13, 14, and 15 connected to the liquid crystals 7, 8, and 9.

The transistor TFTs 13, 14, 15
When the scanning voltage from the gate driver 5 is applied, the grayscale voltage from the source driver 4 is captured, and the captured grayscale voltage is applied to the liquid crystals 7, 8, and 9.

Here, returning to FIG.
Is the digital RG transmitted from the multiplexer 2.
When the B signal is buffered and the digital RGB signals for one line of the LCD panel 3 are buffered, these digital RGB signals are converted into analog RGB signals (grayscale voltages) and supplied to the LCD panel 3. The source driver 4 starts buffering digital RGB signals when a start command (S start) is input from the control circuit 6.

The gate driver 5 scans the LCD panel 3. When a start command (G start) and an enable signal (OE) are input from the control circuit 6, the gate driver 5 is positioned at the first line of the LCD panel 3. A scanning voltage is applied to the transistor TFTs 13, 14, and 15 of the pixel to be scanned. At this time, the scanning voltage from the gate driver 5 is applied to the transistor TFTs 13, 14, and 15 of the pixels located on the first line of the LCD panel 3, so that the gray scale voltage from the source driver 4 is applied to the liquid crystal 7, 8. , 9 are accumulated.

Subsequently, when the clock signal is input from the control circuit 6, the gate driver 5 scans the second line of the LCD panel 3. Similarly, the gate driver 5 sequentially scans the third line to the 768th line each time the clock signal is input from the control circuit 6.

The control circuit 6 transmits a digital RGB signal indicating black to the multiplexer 2 and, in accordance with a horizontal synchronizing signal and a vertical synchronizing signal input to the liquid crystal display device, an A / D converter 1, a multiplexer 2 and a source driver. 4. Control the gate driver 5.
Hereinafter, the operation of the liquid crystal display device according to the present embodiment will be described.

When a synchronization signal is input to the liquid crystal display device, the control circuit 6 transmits a clock signal to the A / D converter 1. Then, the A / D converter 1 converts an analog RGB signal input to the liquid crystal display device into a digital RGB signal in synchronization with the clock signal, and transmits the converted digital RGB signal to the multiplexer 2.

Here, the control circuit 6 supplies a signal SEL to the multiplexer 2 to select either the image data from the A / D converter 1 or the black data output from the control circuit 6. Send

The selection signal SEL is determined according to the standard of the image data input to the liquid crystal display. For example, the LCD panel 3 according to the present embodiment is 1024 ×
Since it has 768 pixels, the XGA standard (1024 ×
In the case of displaying the image data of 768), it is not necessary to display the black data, and the control circuit 6 transmits to the multiplexer 2 a signal SEL designating selection of a digital RGB signal from the A / D converter 1. At this time, the multiplexer 2 captures the digital RGB signal from the A / D converter 1 and
The B signal is transmitted to the source driver 4.

Next, the VGA standard (64
In the case of displaying image data of (0 × 480), the screen of the LCD panel 3 includes, as shown in FIG. 3, effective data composed of 640 × 480 pixels and 144 lines of upper and lower pixels of the effective data. It is made up of a free area and 192 columns of free areas on each of the left and right sides of the valid data, leaving 479,232 pixels remaining. Therefore, it is necessary to display black data on these surplus pixels to provide a screen that does not give a sense of discomfort.

In order to realize such a screen, the control circuit 6 sends a signal from the multiplexer 2 to the source driver 4.
When transmitting image data of the first to 144th lines, a signal SE designating selection of black data is transmitted.
L is output.

Here, the output timing of the signal SEL designating selection of black data for the first to 144th lines is determined at the time when the vertical synchronizing signal is input to the liquid crystal display device as shown in FIG. And the time T1 required until valid data is input from
A time T2 required to write 144 lines (1024 × 144 pixels) of black data is obtained, and a time T2 is calculated from the time T1.
Is subtracted from the point in time when the black data is started to be written from the point in time when the vertical synchronizing signal is input (first line 1
The time T3 required until the black data is written to the pixels in the column) is obtained. Then, when the time T3 has elapsed since the detection of the vertical synchronization signal, the control circuit 6 transmits a signal SEL designating selection of black data to the multiplexer 2, and transmits a signal SEL to the gate driver 5. A start command (G start) and an enable signal are transmitted.

At this time, the multiplexer 2 takes in the black data from the control circuit 6 and sends the taken black data to the source driver 4. Then, the source driver 4 temporarily buffers the black data from the multiplexer 2, converts the buffered black data from a digital RGB signal to an analog RGB signal (grayscale voltage), and transmits the same to the LCD panel 3.

When the gate driver 5 receives a start command (G start) from the control circuit 6, the gate driver 5
Since a scanning voltage is applied to the transistor TFTs 13, 14, and 15 of the pixels located on the first line of the CD panel 3, these transistor TFTs 13, 1 and 15 are applied.
Reference numerals 4 and 15 take in a gray scale voltage (gray scale voltage indicating black data) from the source driver 4 and apply the taken in gray scale voltage to the liquid crystals 7, 8 and 9.

Thereafter, upon receiving the clock signal from the control circuit 6, the gate driver 5 receives the clock signal from the control circuit 6 so that the transistor TFT of the pixel located on the second line of the LCD panel 3
A scanning voltage is applied to 13 ', 14', and 15 '.
At this time, the transistor TFTs 13 ', 14', and 15 'located on the line to which the scanning voltage is applied apply the gray scale voltage from the source driver 4 to the liquid crystals 7', 8 'and 9'. Similarly, the gate driver 5 is connected to the LCD panel 3
Are sequentially applied to the transistor TFTs 13 ', 14', and 15 'located on the third to 144th lines.

Subsequently, the control circuit 6 supplies a signal SEL for designating selection of black data in the first to 192nd rows of the LCD panel 3 with respect to the 145th to 624th lines, and the 193rd to 832th rows. Signal SEL designating selection of valid data up to column 833, columns 833-
Signals SEL designating selection of black data up to the 1024th column are sequentially output.

Here, the output timing of the signal SEL designating selection of black data in the first to 192nd columns is determined at the time when the horizontal synchronizing signal is input to the liquid crystal display device as shown in FIG. And the time T4 required until valid data is input from the first column,
The time T5 required to write the black data to the pixels in the 192nd column is obtained, and the time T5 is subtracted from the time T4 to start writing the black data from the time when the horizontal synchronizing signal is input (the time of the LCD panel 3). The time T6 required until black data is written to the pixels in the first column) is obtained. When the time T6 has elapsed since the detection of the horizontal synchronizing signal, the control circuit 6 instructs the multiplexer 2 to output a signal SEL designating selection of black data.
And a start command (S start) to the source driver 4. At this time, the multiplexer 2 captures the black data from the control circuit 6 and transmits the captured black data to the source driver 4.

Next, when the time T4 elapses from the time when the horizontal synchronizing signal is inputted, the control circuit 6 instructs the multiplexer 2 to select the digital RGB signal from the A / D converter 1. Send SEL. At this time, the multiplexer 2 captures the digital RGB signals from the A / D converter 1 and transmits the captured digital RGB signals to the source driver 4.

Here, since the control circuit 6 has previously obtained the time T7 required to write valid data to 640 pixels located in the 193rd column to the 732th column of the LCD panel 3, the horizontal synchronizing signal is After a lapse of time T7 from the input, a signal SEL designating selection of black data is transmitted to the multiplexer 2.
The selection signal SEL is transmitted from the control circuit 6 to the multiplexer 2 during the time T5 (time required to write black data for 192 pixels). And
The multiplexer 2 receives the black data from the control circuit 6 and sends the received black data to the source driver 4.
Send to

When the source driver 4 receives the 1024th column of black data, it has received the image data of the first to 1024th columns (one line of image data). The image data is converted from a digital RGB signal to an analog RGB signal (gradation voltage) and transmitted to the LCD panel 3.

The gate driver 5 operates according to the clock signal from the control circuit 6 so that
Since the scanning voltage is sequentially applied to the transistor TFTs 13, 14, and 15 of the pixels located in each line of the 624th line, the transistors 13 and 1 of each line are applied.
When the scanning voltage from the gate driver 5 is applied, the gray scale voltage from the source driver 4
8 and 9.

Further, since the control circuit 6 has previously obtained the time T8 required to write the data of the 624th line from the time when the vertical synchronizing signal is input, the control circuit 6 obtains the time T8 from the time when the vertical synchronizing signal is input. , A signal SEL designating selection of black data is transmitted to the multiplexer 2. This selection signal SEL
Is transmitted from the control circuit 6 to the multiplexer 2 during the time T2 (the time required to write black data for 144 lines (1024 × 144 pixels)).

As a result, the LCD panel 3 displays the black data in the remaining area shown in FIG. 3, and can display a screen without a sense of discomfort. When the LCD panel 3 displays the image data of the SVGA standard (800 × 600), as shown in FIG. 6, the screen of the LCD panel 3 has an empty area of 84 lines above and below the valid data. A blank area for 112 columns is generated on each of the left and right sides of the valid data, leaving 306432 pixels. these
The method of writing black data to 306432 pixels is based on the V
This is the same as the case of displaying image data of the GA standard, and a description thereof will be omitted. As described above, according to the present embodiment, a liquid crystal display device can be realized without using a frame memory, and image data having a smaller number of pixels than the number of pixels of the LCD panel can be displayed without discomfort.

As a result, the liquid crystal display device according to the present embodiment does not require a large-scale frame memory, so that the device can be easily made into an LSI. When the interval between the effective image data input to the A / D converter 1 is short, that is, in FIG. 4, the time from when the vertical synchronizing signal is input to the liquid crystal display device to when the effective data is input (T1), which is obtained by adding the time T1 required until the time when the input of the valid data is completed and the time T9 required until the next vertical synchronization signal is input.
When (+ T9) is shorter than (the number of horizontal lines of the LCD panel−the number of horizontal lines of valid data) × the vertical synchronization period, it is preferable to use the following first to fourth methods.

(1) In the first method, black data is supplied to the LCD panel 3 once every several frames by utilizing the survivability of the gradation voltages applied to the liquid crystals 7, 8, and 9 of the LCD panel 3. Is the way.

For example, when displaying the image data of the VGA standard shown in FIG.
Although black data is displayed on the first to 144th lines of the panel 3, in the present method, the first data is displayed on the 1st to 144th lines.
The grayscale voltage of the black data is applied only once every three frames to the pixels on each line of the 44th line.

More specifically, the gate driver is usually
A control signal as shown in FIG. 7A is applied, and the gate driver 5 according to the present invention is adapted to apply a control signal as shown in FIG. 7B when displaying black data. .

When displaying the image data of the first frame on the LCD panel 3, the control circuit 6 applies a control signal as indicated by F 1 in FIG. 7B to the gate driver 5. At this time, the gate driver 5 outputs a scanning voltage at an interval of three lines from the first line, and black data is displayed on the first line, the fourth line, the seventh line,... Is done.

Subsequently, when displaying the image data of the second frame on the LCD panel 3, the control circuit 6 applies a control signal as indicated by F 2 in FIG. 7B to the gate driver 5. At this time, the gate driver 5 outputs a scanning voltage at intervals of three lines from the second line, and black data is displayed on the second, fifth, eighth,... Lines of the LCD panel 3. You.

Next, when the control circuit 6 displays the image data of the third frame on the LCD panel 3, the control circuit 6 shown in FIG.
A control signal as indicated by F3 in FIG.
Is applied. At this time, the gate driver 5 outputs a scanning voltage at intervals of three lines from the third line,
Black data is displayed on the third, sixth, ninth,... Lines of the LCD panel 3.

When displaying the image data of the fourth frame on the LCD panel 3, the control circuit 6 applies a control signal similar to that of F 1 in FIG. 7B to the gate driver 5.

As a result, the time required for black data display processing can be reduced to one-third of the normal time, and an image can be displayed without a sense of incongruity even if the interval between valid data is short. . (2) The second method is effective when handling an image of the VGA standard, and takes advantage of the fact that the horizontal synchronization period of the VGA standard is longer than the horizontal synchronization period of the SXGA standard. This is a method of displaying black data on a horizontal line.

The VGA standard image data is transferred to the LCD panel 3
, The LC as described in the above description of FIG.
The black data is displayed on the first to 144th lines of the D panel 3. In this method, a control signal as shown in FIG. 8 is applied to the gate driver 5, and during one horizontal synchronization period, the LCD panel 3 is displayed. The grayscale voltage of the black data is applied to the two horizontal lines.

According to this method, the LCD panel 3 has 1
Black data is displayed on the first and second lines during the second horizontal synchronization period, black data is displayed on the third and fourth lines during the second horizontal synchronization period, and 2N is displayed during the Nth horizontal synchronization period. Black data is displayed on the -1st line and the 2Nth line.

As a result, the time required for the black data display processing can be reduced to one half of the normal time. (3) The third method is effective when the time required to display black data is not enough even when the methods (1) and (2) are used, and one of a plurality of vertical synchronization periods is used. In this method, valid data is displayed only in the vertical synchronization period, and only black data is displayed in other vertical synchronization periods.

For example, the control circuit 6 transmits a control signal as shown in FIG. 9 to the multiplexer 2 so that valid data is displayed once within two vertical synchronization periods.
In this case, the control circuit 6 sets the start instruction (G start) to a high-level signal “H” 144 HS earlier than the display start time of the valid data. At this point, the A / D converter 1 outputs valid data, but since the selection signal (SEL) indicates a low-level signal “L”, the multiplexer 2 sends the black data to the source driver 4. Send. Then, when 144 HS elapses from the time when the start command is output, the selection signal (SE) is output.
L) shifts from a signal indicating a low level “L” to a signal indicating a high level “H”.
The valid data from the D converter 1 is transmitted to the source driver 4.

Then, when 480 HS elapses from the point when the selection signal (SEL) shifts from the signal indicating the low level "L" to the signal indicating the high level "H", the selection signal (SEL) is again set to the low level. Since the signal shifts to a signal indicating L ″, the multiplexer 2 transmits the black data to the source driver 4.

The above operation is repeated every two vertical synchronization periods. (4) The fourth method is effective when the time required for displaying black data is not enough even when the methods (1) and (2) are used, and simultaneously drives a plurality of independent horizontal lines. How to

For example, the control circuit 6 transmits a control signal as shown in FIG. In this case, the first line and the 625th line, the second line and the 626th line, the third line and the 627th line of the LCD panel 3
At the lines,..., Black data is displayed at the same time. << Other Embodiments >> In the present embodiment, when the interval between the valid data and the valid data is short in the horizontal direction, that is, in FIG. 5, the valid data is input from the time when the horizontal synchronization signal is input to the liquid crystal display device. A time T4 required until the next horizontal synchronization signal is input and a time T1 required between the time when the input of the valid data is completed and the time when the next horizontal synchronization signal is input.
An embodiment will be described which is effective when the time obtained by adding 0: (T4 + T10) is shorter than (the number of columns of the LCD panel−the number of columns of valid data) × 1 dot period.

FIG. 11 is a diagram showing a configuration of the source driver according to the present embodiment. The source driver 4 includes six drivers (1) for applying a gradation voltage to a specific number of pixels.
(6) 40-45, and these drivers (1)-
(6) Valid image data from the multiplexer 2 is input to 40 to 45.

Further, the drivers (1) 4 located at both ends
0 and the driver (6) 41 have the control circuit 6
And multiplexers A and B for selecting black data from the multiplexer 2 and image data from the multiplexer 2. These multiplexers A and B select black data and image data according to a designation signal SEL from the control circuit 6.

A multiplexer C is provided between the driver (1) 40 and the driver (2) 41. The multiplexer C selects a start command (S start) from the control circuit 6 and a start command (S start) from the driver (1) 40. Similarly to the multiplexer A, a signal SEL for selecting black data and image data is also input to the multiplexer C. When the signal SEL for selecting black data is input, the control circuit 6 and transmits the received start instruction to the driver (2) 41. On the other hand, when the signal SEL for selecting the image data is input, the multiplexer C captures the start instruction output from the driver (1) 40 and transmits the received start instruction to the driver (2) 41.

Next, a multiplexer D is provided between the driver (5) 44 and the driver (6) 45. The multiplexer D selects a start command (S start) from the control circuit 6 and a start command (S start) from the driver (5) 44. Similarly to the multiplexer C, a signal SEL for selecting black data and image data is also input to the multiplexer D. When the signal SEL for selecting black data is input, the control circuit 6 and transmits the received start instruction to the driver (6) 45. On the other hand, when the signal SEL for selecting the image data is input, the multiplexer D fetches a start command from the driver (5) 44 and transmits the fetched start command to the driver (6) 45.

By adopting such a configuration, when the control circuit 6 transmits a start command (S start) and a signal SEL for selecting black data to the source driver 4, the start command (S start) is issued. Driver (1)
40, the multiplexer C and the multiplexer D, and the signal SEL is input to the multiplexers A, B,
Input to C and D.

First, the multiplexer A fetches black data from the control circuit 6 and transmits the fetched black data to the driver (1) 40. At this time, the driver (1) 40 converts the black data from a digital RGB signal to an analog RGB signal and supplies it to the LCD panel 3.

The multiplexer B takes in the black data from the control circuit 6 and sends the taken black data to the driver (6) 45. Here, the multiplexer D takes in the start-up command from the control circuit 6 and directly transmits this start-up command to the driver (6) 45, so that the driver (6) 45 immediately receives the black data from the control circuit 6 The acquired black data is converted from a digital RGB signal to an analog RGB signal and supplied to the LCD panel 3.

The multiplexer C receives a start command from the control circuit 6 and outputs the driver (2) 41
Send to At this time, the driver (2) 41 directly receives the start command from the control circuit 6, captures the image data from the multiplexer 2, converts the captured image data from a digital RGB signal to an analog RGB signal, It is supplied to the LCD panel 3.

As a result, the driver (1) 40 and the driver (6) 45 directly receive the start command from the control circuit 6, immediately receive the black data from the control circuit 6, and display the black data on the LCD panel 3. Will be.

The driver (2) 41 directly receives a start-up command from the control circuit 6, fetches image data from the multiplexer 2, converts the fetched image data from a digital RGB signal to an analog RGB signal, and Supply to panel 3. And the driver (2)
41 transmits a start command to the driver (3) 42. These operations are performed simultaneously.

The driver (3) 42 is connected to the driver (2) 4
1 receives the start command from the multiplexer 2, fetches the image data from the multiplexer 2, converts the fetched image data from a digital RGB signal to an analog RGB signal,
Supply to D panel 3. Then, the driver (3) 42
Transmits a start command to the driver (4) 43. Upon receiving the start command from the driver (3) 42, the driver (4) 43 takes in the image data from the multiplexer 2 and converts the taken image data into a digital signal. The RGB signals are converted into analog RGB signals and supplied to the LCD panel 3. Then, the driver (4) 43 transmits a start command to the driver (5) 44. Upon receiving the activation command from the driver (4) 43, the driver (5) 44 captures the image data from the multiplexer 2, converts the captured image data from a digital RGB signal to an analog RGB signal, and supplies it to the LCD panel 3. I do. Then, the driver (5) 44
Send a start command to. As described above, according to the present embodiment, when the number of pixels of one line of the effective image data of the analog RGB signal input to the liquid crystal display device is two thirds or less of the number of pixels of one line of the LCD panel 3, The control circuit 6 transmits the black data and the signal SEL for selecting the black data to the multiplexers A, B, C, and D, so that the driver (1) 40 and the driver (6) 45
Means that black data is always supplied to the LCD panel 3. For this reason, even when the interval between the effective image data input to the liquid crystal display device is short, the black data can be displayed in an area other than the effective image data, and a screen without a sense of incongruity can be displayed. it can.

[0073]

According to the liquid crystal display device of the present invention,
Since a frame memory such as a dynamic RAM is not required, the size of the entire device can be reduced, so that the entire device can be easily made into an LSI.

[Brief description of the drawings]

FIG. 1 is a diagram showing one embodiment of a liquid crystal display device according to the present invention.

FIG. 2 is a diagram showing an internal configuration of a liquid crystal panel.

FIG. 3 is a diagram showing a screen configuration when displaying VGA standard image data;

FIG. 4 is a timing chart showing an operation timing of the liquid crystal display device (1).

FIG. 5 is a timing chart showing the operation timing of the liquid crystal display device (2).

FIG. 6 is a diagram showing a screen configuration when displaying image data of the SVGA standard.

FIG. 7 is a timing chart (3) showing the operation timing of the liquid crystal display device.

FIG. 8 is a timing chart (4) showing the operation timing of the liquid crystal display device.

FIG. 9 is a timing chart (5) showing the operation timing of the liquid crystal display device.

FIG. 10 is a timing chart (6) showing an operation timing of the liquid crystal display device.

FIG. 11 illustrates a configuration of a source driver.

[Explanation of symbols]

 1. A / D converter 2. Multiplexer 3. LCD panel 4. Source driver 5. Gate driver 6. Control circuit 7. Liquid crystal 8. Liquid crystal 9. Liquid crystal 10. Color film 11.・ Color film 12 ・ ・ Color film 13 ・ ・ Transistor TFT 14 ・ ・ Transistor TFT 15 ・ ・ Transistor TFT 40 ・ ・ Driver (1) 41 ・ ・ Driver (2) 42 ・ ・ Driver (3) 43 ・ ・ Driver (4) ) 44 ・ ・ Driver (5) 45 ・ ・ Driver (6)

Claims (8)

[Claims] 1. A liquid crystal display panel comprising a predetermined number of pixels, image data input means for inputting image data to be displayed on the liquid crystal display panel, and black for generating black data to be displayed on the liquid crystal display panel A data selection unit that selects one of the image data input by the image data input unit and the black data generated by the black data generation unit, and transmits the selected data to the liquid crystal display panel; When the number of pixels of image data input by the image data input unit is smaller than the number of pixels of the liquid crystal display panel, while the image data input unit is inputting invalid data, Transmitting a signal designating selection of black data generated by the black data generating means,
While the image data input means is inputting valid image data, control means for transmitting a signal designating to select the valid image data input by the image data input means to the data selection means, A liquid crystal display device comprising: 2. The image processing apparatus according to claim 1, wherein the control unit is configured to provide the data selection unit with black data generated by the black data generation unit while the image data input unit is inputting invalid image data during one horizontal synchronization period. A signal designating that the image data input means is input to the data selection means during the one horizontal synchronization period while the image data input means is inputting valid image data. 2. The liquid crystal display device according to claim 1, wherein a signal designating selection of valid image data to be transmitted is transmitted. 3. The black data generated by the black data generating means during the one vertical synchronization period while the image data input means is inputting invalid image data. And transmitting a signal designating that the image data input means is input to the data selection means during the one vertical synchronization period while the image data input means is inputting valid image data. 2. The liquid crystal display device according to claim 1, wherein a signal designating selection of valid image data to be transmitted is transmitted. 4. The liquid crystal display device according to claim 1, wherein the liquid crystal display panel displays the black data from the data selection means once for each specific frame. 5. The liquid crystal display panel includes a driving unit that drives a pixel on the liquid crystal panel, and the control circuit controls a driving unit that drives a pixel to display black data among the driving unit. 2. The liquid crystal display device according to claim 1, wherein black data generated by said black data generating means is always supplied. 6. The liquid crystal display device according to claim 1, wherein the liquid crystal display panel displays the black data from the data selecting means on a plurality of horizontal lines in one horizontal period in a time-division manner. 7. The liquid crystal display panel displays valid image data only in one frame out of a predetermined number of frames, and displays only black data in other frames.
The liquid crystal display device as described in the above. 8. The liquid crystal display device according to claim 1, wherein the liquid crystal display panel simultaneously displays the black data from the data selection means on a plurality of horizontal lines during one horizontal period.