JPH10239826A - Device and method for designing photomask pattern - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a design fulfilling the design rule of a logic circuit and to easily obtain a photomask pattern including an optical proximity effect correction pattern where fine working accuracy is improved. SOLUTION: This system is composed of the designing device possesses a pattern condition inputting part 2 used for the input of a pattern design rule which is a condition for extracting a photomask pattern part to be optimized at a usual photomask pattern, a pattern extracting part 7 extracting an optical proximity effect pre-correction pattern cell that is not suited to the pattern design rule and is corrected in terms of an optical proximity effect, a light intensity simulation part 9 repeatedly executing light intensity simulation for several times for a pre-optimizing pattern cell and a pattern optimizing part 10 optimizing the optical proximity effect pre-correction pattern cell based on plural simulation results.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photomask pattern designing apparatus and a photomask pattern designing method used for designing a photomask pattern, and more particularly to a photomask pattern designing method suitable for generating an optical proximity correction pattern for optimizing photolithography. The present invention relates to a photomask pattern designing apparatus and a photomask pattern designing method.

[0002]

2. Description of the Related Art An LSI pattern is composed of a set of circuit patterns composed of an enormous figure divided into dozens of layers. The number of drawings amounts to hundreds of thousands. In addition, since the amount of data of the LSI pattern is very large, many of the LSI design processes are automatically designed by a computer. Here, the LSI pattern design process can be roughly divided into four processes, that is, a functional design process, a logic design process, a circuit design process, and a mask pattern design process, taking an LSI process of a general full custom design method as an example. In the above four steps, the mask pattern design step, which is the final step of the design,
He is deeply involved in actual device manufacturing.

FIG. 2 is a flowchart for explaining the above-described conventional pattern design process, and is a flowchart for explaining a general LSI pattern design process as an example. In FIG. 2, after a functional design having required performance is performed in step SA1, a logical design is performed in step SA2, and a logical circuit satisfying the functional design is designed.

In step SA3, in order to realize the characteristics required by the embedded circuit designed in step SA2,
A specific circuit including components such as a transistor and a wiring is designed. At Step SA4, Step SA
The mask pattern is designed to determine the shape and arrangement of the individual transistors in the circuit designed in 3 based on the design rules.

[0005] Here, the above design rule is an LSI.
The geometric design rules defined based on the microfabrication accuracy of the manufacturing process and the electronic characteristics of the device, for example,
It refers to the minimum line width of each line, the minimum distance between the line and a line adjacent thereto, the diameter of a contact hole, and the tolerance of alignment between layers. That is, the design rule is a rule for optimizing two-dimensional wiring.

More specifically, in step SA4, using a CAD (Computre Aided Design) tool for design,
By appropriately combining a plurality of symbol diagrams in which elements and wirings are represented by symbols, a mask pattern that satisfies the above-described design rule is designed.

In step SA5, a design rule check (DRC) for verifying whether all the photomask patterns designed in step SA4 satisfy the design rule is performed. Specifically, in step SA5, a design tool check for a photomask pattern is performed by a verification tool called a DRC system, pattern correction is performed for a problematic part, and then photomask pattern data is created. . The reason for performing this DRC is that the mask pattern created in step SA4 includes a logic error, a placement error,
This is because it is necessary to correct the error location because there is a possibility that an error location due to a dimensional error or the like exists.

In step SA6, the photomask pattern data created in step SA5 is output. In step SA7, after a photomask is actually created based on the photomask pattern data, a lithography process is performed using the photomask. Here, the photomask pattern created in step SA6 has wiring and the like as designed in the mask pattern and conforms to the design rules, and is a pattern as designed as a logic circuit.

However, a series of design operations described with reference to FIG. 2 are performed to satisfy the logical characteristics of the LSI, and take into account the fine processing accuracy of the semiconductor wafer in the lithography step of step SA7. It does not take into account optimization of device characteristics actually obtained. That is, the electrical characteristics of the LSI actually obtained as a product after step SA7 are not always faithful to the characteristics of the logic circuit obtained in the logic design (step SA2). Accordingly, the electrical characteristics of the actually obtained LSI are not always expected characteristics because they are strongly affected by the precision of fine processing in the wafer process.

In particular, at present, the minimum device size is 0.5
In a lithography technique that requires ultra-fine processing of μm or less, as is well known, an optical proximity correction technique (Optical Proximity), which is the ultimate technique of fine processing.
(Correction; abbreviated as OPC), super-resolution technology, and the like. For this reason, the optical proximity effect correction technology, the super-resolution technology, and the like are being developed in order to apply them to actual mass production.

However, the photomask pattern (data) (hereinafter referred to as a normal photomask pattern) created in step SA6 shown in FIG. 2 cannot be directly applied to the optical proximity correction technique. Therefore, in order to apply a normal photomask pattern to the optical proximity effect correction technique or the like, the photomask pattern may be reorganized based on a special processing rule (hereinafter, referred to as a pattern design rule). The pattern design rule is a rule dedicated to the optical proximity effect correction technique or the like, and is completely different from the design rule described above, and is determined by exposure conditions and process conditions in a lithography process.

Here, the above-described optical proximity effect correction technique will be described in detail. This optical proximity effect correction technology means that when the pattern width is close to the resolution limit of light, the resolution of the pattern exposed and transferred on the surface of the semiconductor wafer becomes insufficient, so that the pattern shape deteriorates or It refers to a technique for preventing a situation where two persons come into contact with each other.

More specifically, a special pattern called an optical proximity correction pattern is added to or modified from a normal photomask pattern. Thereby, the optical proximity effect is given to the pattern, and the shape deterioration at the time of exposure transfer is prevented. The optical proximity correction pattern is designed to have a fine size equal to or smaller than the resolution limit so as not to be resolved.

FIG. 3 is a plan view showing an example of a normal negative photomask pattern to which the optical proximity correction pattern is added. In this figure, reference numeral 30 denotes a rectangular main pattern to be subjected to optical proximity effect correction, which is equal to or smaller than the resolution limit and has a uniform size. 31A, 31
B,... Are optical proximity effect correction patterns, and are arranged such that each corner is adjacent to each of the four corners of the main pattern 30.

These optical proximity effect correction patterns 31A, 31A
Are different from the logic circuit. Therefore,
At the stage of logic design (step SA2), the optical proximity effect correction patterns 31A, 31B,... Are not considered at all, and only the main pattern 30 is considered. Therefore, actually, the optical proximity effect correction pattern 3
1A, 31B,... Are added to the main pattern 30 in the mask pattern design stage of step SA4.

As the above-mentioned addition method, there are a method that is performed manually and a method that is executed by a computer unless optimization is considered. In the manual method, step SA4
, The optical proximity effect correction patterns 31A, 31B,... Are added to the main pattern 30 one by one by the designer. On the other hand, according to the computer method, after a rectangular main pattern 30 having a uniform size or smaller than the resolution limit shown in FIG. 3 is extracted from a normal photomask pattern, the four corners of the main pattern 30 are extracted. The optical proximity effect correction patterns 31A, 31B,... Are added semi-automatically. When this method is used, it is necessary to add an algorithm for performing the above arrangement to the software of the CAD tool.

However, in practice, it is impossible for the designer to completely extract the main pattern 30 under specific conditions from ordinary photomask patterns that can reach tens to millions of figures. Therefore, the latter computer method is exclusively used.

The above-described computer method is not versatile, and the following problem may occur when the arrangement of each circuit pattern in a normal photomask pattern is predetermined. That is, in the method using a computer, the optical proximity effect correction patterns 31A, 31B,... Having uniform dimensions and shapes are uniformly added to the main pattern 30. However, in a normal photomask pattern, the shape, configuration, and pattern density of the circuit pattern are generally different in each part, and the optical proximity effect is naturally different in each part. Therefore, the optical proximity correction patterns 31A, 31B,...
Means that the shape is optimal for correcting the optical proximity effect in a certain portion, but is not always optimal in another portion.

For example, the main pattern 40 shown in FIG.
When the above-described optical proximity effect correction pattern is added to a portion of a normal negative photomask pattern in which A and the main pattern 40B are adjacent to each other more than necessary, the optical proximity effect correction patterns 41A and 41B are as shown in FIG. Optimally placed in That is, the optical proximity effect correction pattern 41
A and 41B are arranged so that each part overlaps with each corner of the main patterns 40A and 40B. This is to prevent the patterns from being short-circuited when the photomask pattern is exposed and transferred to the surface of the semiconductor wafer.

The main pattern 50A shown in FIG.
When adding the optical proximity effect correction pattern to a positive type normal photomask pattern in which the optical proximity effect correction pattern 51A, 51B
Are optimally arranged as shown in FIG. That is, the optical proximity effect correction patterns 51A and 51B are arranged so as to lack each corner of the main patterns 50A and 50B. This is to prevent the pattern from being cut when exposing and transferring the photomask pattern onto the surface of the semiconductor wafer.

However, according to the method using a computer, as shown in FIGS. 4A and 4B, the situation where the main patterns 40A, 40B, etc. are adjacent to each other is not taken into consideration, as shown in FIG. Optical proximity effect correction patterns 41A, 41B, etc. are arranged. Therefore, the computer-based method has a problem that the optimum arrangement as shown in FIGS. 4A and 4B is not made, and a fatal defect such as short-circuiting or cutting of the pattern occurs.

In optimizing the optical proximity effect correction pattern as described above, it is necessary to design the optical proximity effect correction pattern in consideration of at least the shape, configuration, and pattern density of the circuit pattern. Therefore, when designing in consideration of the optical proximity effect correction pattern, it is necessary to determine whether the shape of the optical proximity effect correction pattern is appropriate in addition to where to place the optical proximity effect correction pattern. . Therefore, conventionally, as the above-described determination method, a simulation technique for predicting a state of a surface of a semiconductor wafer after exposure transfer to a photomask pattern is performed has been used.

That is, conventionally, in the research and development or development prototype stage of a semiconductor process, a computer has been used as a technique for grasping the characteristics of the process and the product, and for virtually testing and estimating the characteristics with respect to the manufacturing conditions. Simulation technology is used.
Currently being actively used. In particular, among many computer simulation technologies, the simulation technology used in the photolithography process, which is the core microfabrication technology of semiconductor manufacturing technology, has been theoretically established and is an indispensable technology in R & D. It is.

The simulation technology of the exposure process in the simulation of the photolithography process is particularly called a light intensity simulation technology, in which a photomask pattern is exposed and transferred to the surface of a semiconductor wafer using a projection exposure apparatus (stepper). Is obtained by calculation. In practice, the light intensity simulation is executed by a computer using software called a light intensity simulator.

Further, as a physical theory underlying the light intensity simulation technique described above, H.S. Hopkins
The imaging optics theory established by them is known. For more information on this imaging optics theory, see Born, Wolf
Written by "Principles of Optics II and III", 1975, or Hop
Kins; Opt. Soc. Am. Vol. 47,
No. 6 ('57) p508. further,
Lin or Ye as the computer calculation model
See also the model by ung.

In addition, the above-described light intensity simulation technique has an advantage that the exposure distribution on the semiconductor wafer surface can be estimated by calculation without actually performing lithography on the semiconductor wafer. It is frequently used in research and development of lithography processes and device prototypes.

In particular, in recent years, firstly, considering that the processing accuracy required for the fine processing technology is about to reach the limit of processing by light, and secondly, considering the technical and cost aspects, it is actually In view of the background that it is difficult to develop a device by repeating an experiment, an optical simulation technique is becoming more important.

This is because light simulation technology can be implemented at low cost and quickly by using a computer.
This is the only advantage of having the advantage that a result (light intensity distribution) can be obtained. Therefore, since the light intensity simulation technology has such advantages, it has been recognized that the light intensity simulation technology is effective for optimizing the optical proximity effect correction pattern. Have been done.

[0029]

However, research on the optimization of the optical proximity correction pattern by the above-described light intensity simulation technique has not yet reached the stage of research and development, and has not yet reached the stage of practical use. Not in. This is because the calculation amount of the two-dimensional light intensity simulation of the semiconductor wafer is enormous, and the memory capacity is restricted and the calculation takes a long time.

For example, in the case of a workstation,
Even in the light intensity simulation for a region of only about 10 μm square, a result of more than a predetermined accuracy cannot be obtained unless a time of about 1 minute is required. However,
When the light intensity simulation is performed on the entire photomask pattern of the LSI having the area (10 mm square) that is 1,000,000 times the 10 μm square, the time required for the calculation is reduced by the amount of calculation under the condition that the exposure condition is fixed. , So that it becomes 1,000,000 times. Therefore, even if such a light intensity simulation is performed using the fastest supercomputer, a considerable amount of calculation time is required, and this method is not practical.

Further, as is well known, the photomask pattern of an actual LSI circuit is very complicated and enormous, and is composed of hundreds of thousands to millions of closed figures. It is practically impossible to perform the above-described light intensity simulation on the entire photomask pattern having such an enormous data amount in order to optimize the fine processing accuracy. It is also conceivable to manually extract a part (pattern cell) to be corrected for the optical proximity effect from all the photomask patterns and then perform light intensity simulation on the pattern cell. Effort,
It is not realistic considering human error.

Furthermore, the optical proximity effect correction technique using the optical proximity effect correction pattern has a problem that is difficult to solve. That is, as described above, the optical proximity effect correction pattern must be sized so as not to resolve itself. However, in actual mask manufacturing technology, ultra-high-precision process control that satisfies the above conditions is realized. It is difficult.

For example, the size of the photomask pattern with respect to the pattern actually formed on the surface of the semiconductor wafer is usually 5 to 4 times because of the use of a reduction projection exposure apparatus. Therefore, as an example, 6 of the 0.35 μm rule
The minimum size of the photomask pattern in the 4M bit DRAM is 1.75 μm (0.35 μm × 5 times).

On the other hand, an appropriate dimension of the above-mentioned optical proximity effect correction pattern depends on an exposure wavelength in a lithography process.
For example, when the exposure wavelength is 365 nm, it is 0.8 μm. That is, when the optical proximity effect correction pattern is generated, the accuracy is required to be about twice (1.75 μm / 0.8 μm) as compared with the case of the photomask pattern in the DRAM.

For this reason, when the size of the optical proximity effect correction pattern is 0.8 μm or more, there is a serious problem that the optical proximity effect correction pattern itself is resolved or adjacent patterns come into contact with each other. However,
In the current lithography technology, it is difficult to perform dimensional control that satisfies the above-described double precision.

The present invention has been made in view of such a background, and a photomask including an optical proximity correction pattern with improved precision in microfabrication can be designed while satisfying the design rule of a logic circuit. It is an object of the present invention to provide a photomask pattern designing apparatus and a photomask pattern designing method capable of easily obtaining a pattern.

[0037]

According to the first aspect of the present invention, there is provided a pattern cell extracting means for extracting a pattern cell to be subjected to optical proximity correction in a photomask pattern based on a predetermined condition, and the pattern cell extracting means. Based on a result obtained by performing a light intensity simulation on the pattern cells extracted by the extracting means and calculating a light intensity distribution in the pattern cells by calculation, the pattern cells are optimized for fine processing, and the optimized pattern cells are optimized. Optimizing means for outputting as a cell.
According to a second aspect of the present invention, in the photomask pattern designing apparatus according to the first aspect, the optimization unit performs the light intensity simulation a plurality of times while changing the conditions of the light intensity simulation. Outputting the optimized pattern cell based on the simulation result most suitable for the fine processing among a plurality of simulation results. According to a third aspect of the present invention, in the photomask pattern designing apparatus according to the first or second aspect, a correction unit for performing resize correction on the optimized pattern cell is provided. According to a fourth aspect of the present invention, a first step of extracting a pattern cell to be subjected to optical proximity correction in a photomask pattern based on a predetermined condition, and the pattern extracted in the first step A second step of optimizing the pattern cell for microfabrication based on a result obtained by performing a light intensity simulation on the cell and calculating a light intensity distribution in the pattern cell and outputting this as an optimized pattern cell; And characterized in that: The invention described in claim 5 is
5. The photomask pattern designing method according to claim 4, wherein, in the second step, the light intensity simulation is performed a plurality of times by changing a condition of the light intensity simulation, and then the fineness of the plurality of simulation results is reduced. Outputting the optimized pattern cell based on the simulation result most suitable for processing. The invention according to claim 6 is the same as the invention according to claim 4.
Or the photomask pattern designing method according to item 5, further comprising a third step of performing resize correction on the optimized pattern cell.

[0038]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a photomask pattern designing apparatus according to one embodiment of the present invention. In this figure, reference numeral 1 denotes a mask pattern data input unit, which is used for inputting photomask pattern data generated using the CAD tool described above. That is, the photomask pattern data is as shown in FIG.
Is normal photomask pattern data output in step SA6 shown in FIG.

Reference numeral 2 denotes a pattern condition input unit for inputting a condition (hereinafter, referred to as a pattern design rule) for extracting a pattern to which an optical proximity effect correction pattern is to be added from the above-described ordinary photomask patterns. Used. In other words, the pattern to which the optical proximity effect correction pattern is to be added is a pattern to be subjected to optical proximity effect correction. Further, the pattern condition input unit 2 outputs the input pattern design rule as pattern design rule data. The pattern design rule is determined in consideration of the exposure conditions and the like in a photolithography process of a semiconductor wafer performed as a subsequent process.

More specifically, the pattern cells to be subjected to the optical proximity effect to which the above-mentioned pattern design rule is applied include, for example, a wiring portion having a dense pattern, a portion where contact holes are arranged in parallel, and a memory cell pattern. Part. This is because, as described above,
This is because in the photolithography process of the SI manufacturing process, it is necessary to improve the resolution and the depth of focus by using an optical proximity effect correction technique or the like.

That is, the photomask pattern in the optical proximity effect correction technique or the like not only serves as an original for a simple LSI pattern but also as an original for realizing desired fine processing accuracy when forming a photomask pattern on a semiconductor wafer. Because it also fulfills the role of
Therefore, the photomask pattern applied to the optical proximity effect correction technology and the like is optimized in consideration of the fine processing accuracy of the pattern cell of the normal photomask pattern to be subjected to the optical proximity effect correction. It is necessary.

For example, when the Levenson type phase shift mask technology is used as the process technology, the pattern design rule is determined in consideration of the light shielding layer pattern and the phase shift layer. Specifically, the pattern design rule is a rule that mainly determines whether the dimension width and the pattern interval are predetermined values. However, since the photomask pattern to be applied is a two-dimensional plane, the pattern design rule is naturally determined in consideration of both the X direction and the Y direction in two dimensions. That is, when the pattern design rule is applied to a normal photomask pattern, a pattern cell to be subjected to the optical proximity effect correction in which the dimension width and the pattern interval are equal to or smaller than predetermined values is extracted.

When the above-described pattern design rule is applied, a conventional design rule check method for checking a logic circuit is used. That is, in this case, in the conventional design rule check method, basic design rules such as pattern dimension width, pattern interval, overlap width, minimum width, minimum interval, and minimum area are represented by numerical values for pattern design rules. You can specify it. Therefore, in the photomask pattern designing apparatus according to the present embodiment, a conventional logic circuit verification tool is applied as it is as a design rule check system.

Reference numeral 3 denotes a display unit for displaying various information necessary for designing a photomask pattern.
Keyboard, mouse, etc. are connected. The operator performs various operations by operating a keyboard or the like while checking the display screen of the display unit 3.

In the mask pattern data creating section 4,
Reference numeral 5 denotes a storage unit that stores the above-described photomask pattern data and pattern design rule data.
Reference numeral 6 denotes a design rule check unit that checks whether or not the above-described ordinary photomask pattern conforms to the pattern design rule. Specifically, the design rule check unit 6 reads out the photomask pattern data and the pattern design rule data stored in the storage unit 5, and applies the pattern design rule to the photomask pattern.

Reference numeral 7 denotes a pattern extraction unit, which is a part of the photomask pattern that does not conform to the pattern design rule in the design rule check unit 6, that is, a pattern cell to be corrected for the optical proximity effect (hereinafter, a pattern cell before the optical proximity effect correction). ).

The pattern cell before optical proximity effect correction extracted by the pattern extraction unit 7 is a cell composed of a single or a plurality of figures arranged within a certain area in a normal photomask pattern. ~ 1
The size is about 0 μm square. The size of the pattern cell before optical proximity effect correction to be extracted is determined so that a light intensity simulation, which will be described later, is performed on the pattern cell before optical proximity effect correction in a short time.

Numeral 8 denotes a correction pattern data generating unit.
An optical proximity correction pattern to be added to the pattern cell before optical proximity correction extracted by the pattern extraction unit 7 is generated. This optical proximity effect correction pattern may be a standard pattern, and as shown in FIG.
Each corner of a square pattern (optical proximity effect correction patterns 31A and 31B) having a dimension width of ２ is in contact with a corner of the main pattern 30. This series of operations is automatically performed by CAD software.

Reference numeral 9 denotes a light intensity simulation unit for executing a light intensity simulation on the simulation data.
Exposure conditions required for the light intensity simulation, that is, numerical aperture, coherence degree, exposure wavelength, and the like of the exposure apparatus are set as parameters.

Here, the simulation data means that the data of the pattern cell before optical proximity effect correction to which the optical proximity effect correction pattern generated in the correction pattern data generating section 8 is added performs the light intensity simulation. Data converted to data suitable for This conversion operation is performed before the light intensity simulation is performed by the light intensity simulation unit 9. Further, at the time of the data conversion, the light intensity simulation unit 9 specifies the values of the transmittance and the phase difference of the finally completed photomask pattern.

Here, the data before the conversion is generally CAD source data, and the graphic information is encoded in a unique format. On the other hand, the converted data (simulation data) suitable for the light intensity simulation is the above-mentioned photomask pattern for each mesh when the two-dimensional pattern cell before optical proximity effect correction is divided into appropriate meshes. The information of the transmittance and the phase difference is given. That is, since there is an essential difference that the CAD source data is in a continuous coordinate system and the simulation data is in a discrete coordinate system, the light intensity simulation unit 9 performs data conversion.

That is, the light intensity simulation section 9
Performs light intensity simulation on the simulation data, and calculates light intensity distribution on the surface of the semiconductor wafer in the photolithography process.
Based on the simulation result of the light intensity simulation unit 9, the resolution state of the pattern is evaluated.

The light intensity simulation unit 9 automatically changes the parameters for optimization such as the pattern size or pattern interval of the simulation data (pattern cell before the light proximity effect correction) little by little,
The light intensity simulation is repeatedly performed a plurality of times.

Numeral 10 denotes a pattern optimizing unit which corrects parameters for fine processing accuracy, such as resolution and depth of focus, from among a plurality of simulation results obtained by the light intensity simulation unit 9 for optical proximity effect correction. After that, it is selected as a pattern cell.

That is, the pattern optimizing unit 10 automatically selects a parameter having an optimum parameter relating to the precision of fine processing. In the pattern optimizing unit 10,
The above selection can be performed manually, and is appropriately set to automatic selection or manual selection according to the design purpose.

Reference numeral 11 denotes a data correction unit which performs data correction for a mask process on the optimized pattern cell after the optical proximity effect correction selected by the pattern optimization unit 10 and converts the correction result into a mask pattern. Output as data. Here, the data correction for the mask process is a data correction for dimension control required in an actual mask manufacturing process, and is performed for each of the X direction and the Y direction of the pattern cell after the optical proximity effect correction. To apply a certain amount of resize correction.

Although such data correction has been conventionally performed, in the case of the pattern cell after the optical proximity effect correction, the optical proximity effect correction pattern itself is resolved during the exposure transfer to the semiconductor wafer as described above. And has a role to provide an optimum correction effect to the proximity pattern.

Therefore, in order for the pattern cell after optical proximity effect correction to fulfill the above-mentioned role, the dimensions of the pattern after optical proximity effect correction formed on the photomask must be maintained with high precision as designed. Therefore, the above-described correction such as resizing is performed in consideration of dimensional control in the mask process.

That is, after optimizing the pattern cell before the optical proximity effect correction by the light intensity simulation, data correction for the mask process is performed, thereby optimizing the pattern cell accurately in the actual mask manufacturing process. A photomask to which the pattern cell is added after the optical proximity effect correction is manufactured.

Reference numeral 12 denotes an output unit including a disk drive, a tape drive, a CRT (cathoderay tube), a printer and the like, and outputs the corrected mask pattern cell data as digital information or a hard copy.

Next, the operation of the photomask pattern designing apparatus according to the above-described embodiment will be described. In FIG. 1, after a functional design having required performance is performed, a logical design is performed, and a logical circuit satisfying the functional design is designed.

Next, in order to realize the characteristics required by the above-described embedded circuit, a specific circuit including components such as transistors and wiring is designed, and then individual transistors in the designed circuit are designed. A mask pattern design is performed in which the shape and arrangement are determined based on the above-described design rules.

When the operator operates a keyboard (not shown) of the display unit 3, mask pattern data as CAD data is input through the mask pattern data input unit 1. Thus, the mask pattern data is stored in the storage unit 5.

Next, when a keyboard (not shown) is operated by the operator, the data of the pattern design rule, which is the extraction condition of the pattern cell before the optical proximity effect correction for improving the fine processing accuracy described above, is changed to the pattern condition. It is input via the input unit 2. Thus, the data of the pattern design rule is stored in the storage unit 5.

Next, the design rule check unit 6 checks whether or not the photomask pattern obtained from the photomask pattern data stored in the storage unit 5 conforms to the pattern design rule. That is, the design rule check unit 6 checks whether there is a pattern cell before optical proximity effect correction in the photomask pattern.

Next, the pattern extraction unit 7 extracts the pre-optical proximity effect correction pattern cell checked by the design rule check unit 6 from the photomask pattern, and outputs it to the correction pattern data generation unit 8. I do.
As a result, the correction pattern data generator 8 generates an optical proximity effect correction pattern to be added to the extracted pre-optical proximity effect correction pattern cell.

Next, the light intensity simulation unit 9 first executes a light intensity simulation on the data of the pattern cell before optical proximity effect correction to which the optical proximity effect correction pattern generated by the correction pattern data generation unit 8 is added. Into light simulation data suitable for Next, the light intensity simulation unit 9 repeatedly executes the light intensity simulation a plurality of times while gradually changing the pattern size or the pattern interval of the light simulation data (pattern cell before the light proximity effect correction).

Next, the pattern optimizing unit 10 corrects, from among the plurality of simulation results obtained in the light intensity simulation unit 9, one in which the parameters relating to the fine processing accuracy such as resolution and depth of focus are optimal, to the optical proximity effect correction. After that, it is selected as a pattern cell. That is, the pattern cell after the optical proximity effect correction selected by the pattern optimization unit 10 has been optimized.

Next, the data correction unit 11 performs data correction for the mask process on the optimized pattern cell after the optical proximity effect correction selected by the pattern optimization unit 10, and applies the correction result to the mask pattern. Output as data.

Next, the output section 12 outputs the corrected mask pattern data as digital information or a hard copy. Then, after a photomask is created based on the optimized pattern cell data after the optical proximity effect correction output from the output unit 12, the semiconductor wafer is exposed using the photomask. Thus, a photomask pattern is formed on the surface of the semiconductor wafer. Since the photomask pattern formed at this time is optimized so as to be compatible with the fine processing, the fine processing accuracy such as the resolution and the depth of focus is significantly improved as compared with the conventional one. .

As described above, according to the photomask pattern designing apparatus and the photomask pattern designing method according to one embodiment of the present invention, the pattern before the optical proximity effect correction is to be performed on the ordinary photomask pattern. After extracting only the cells, optimization is individually performed by light simulation only on the pattern cells before the optical proximity effect correction, so that a photomask pattern with improved fine processing accuracy can be easily created. . According to the photomask pattern designing apparatus and the photomask pattern designing method according to the embodiment of the present invention,
By performing data correction for the mask manufacturing process by the data correction unit 11, a highly accurate photomask can be created.

Further, according to the photomask pattern designing apparatus and the photomask pattern designing method according to the embodiment of the present invention, a pattern cell before the optical proximity effect correction to be corrected for the optical proximity effect is extracted from the photomask pattern. Since the method is used, even when optimizing a photomask pattern having a large data amount, the optimization can be performed automatically in a short time.

[0073]

As described above, according to the present invention,
The light intensity simulation is performed on the pattern cells to be corrected for the optical proximity effect extracted by the pattern cell extraction means, and based on the results, the pattern cells are optimized for fine processing, so that the fine processing accuracy is improved. In this case, the optimized photomask pattern can be easily created, and even when the optimization is performed on a photomask pattern having a large amount of data, the optimization can be performed automatically in a short time. Further, according to the present invention, since the resizing correction is performed on the optimized pattern cell by the correction unit, a more accurate photomask pattern can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a photomask pattern designing apparatus according to an embodiment of the present invention.

FIG. 2 is a flowchart illustrating a conventional photomask pattern designing method.

FIG. 3 is a plan view showing an example of an optical proximity effect correction pattern generated by a conventional photomask pattern design method.

FIG. 4 is a plan view showing another example of an optical proximity effect correction pattern generated by a conventional photomask pattern designing method.

[Description of Signs] 1 Mask pattern data input unit 2 Pattern condition input unit 3 Display unit 4 Mask pattern data creation unit 5 Storage unit 6 Design rule check unit 7 Pattern extraction unit 8 Correction pattern data generation unit 9 Light intensity simulation unit 10 Pattern Optimizer 11 Data correction unit 12 Output unit

Claims (6)

[Claims] 1. A pattern cell extracting means for extracting, based on a predetermined condition, a pattern cell to be subjected to optical proximity correction in a photomask pattern, and a light source for the pattern cell extracted by the pattern cell extracting means. Optimizing means for optimizing the pattern cell for fine processing based on a result obtained by calculating an intensity distribution of light in the pattern cell by performing an intensity simulation and outputting the optimized cell as an optimized pattern cell. A photomask pattern designing apparatus characterized by the above-mentioned. 2. The optimizing means performs the light intensity simulation a plurality of times while changing the conditions of the light intensity simulation, and then, optimizes the simulation result among the plurality of simulation results that is most suitable for the fine processing. The photomask pattern designing apparatus according to claim 1, wherein the optimized pattern cell is output based on the information. 3. The photomask pattern designing apparatus according to claim 1, further comprising: a correction unit configured to perform a resize correction on the optimized pattern cell. 4. A first step of extracting a pattern cell to be subjected to optical proximity correction in a photomask pattern based on a predetermined condition, and a light intensity of the pattern cell extracted in the first step. Based on the result obtained by performing a simulation and calculating the distribution of light intensity in the pattern cell,
A second step of optimizing the pattern cell for microfabrication and outputting the optimized cell as an optimized pattern cell. 5. In the second step, after performing the light intensity simulation a plurality of times by changing the conditions of the light intensity simulation, the simulation that is most suitable for the fine processing among a plurality of simulation results. The method according to claim 4, wherein the optimized pattern cell is output based on a result. 6. The photomask pattern designing method according to claim 4, further comprising a third step of performing a resize correction on the optimized pattern cell.