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JPH0388504A - Optional waveform generator - Google Patents

Optional waveform generator

Info

Publication number
JPH0388504A
JPH0388504A JP22493489A JP22493489A JPH0388504A JP H0388504 A JPH0388504 A JP H0388504A JP 22493489 A JP22493489 A JP 22493489A JP 22493489 A JP22493489 A JP 22493489A JP H0388504 A JPH0388504 A JP H0388504A
Authority
JP
Japan
Prior art keywords
waveform
data
converter
arithmetic
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22493489A
Other languages
Japanese (ja)
Inventor
Taketoshi Ikegami
池上 武敏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Electric Corp filed Critical Yokogawa Electric Corp
Priority to JP22493489A priority Critical patent/JPH0388504A/en
Publication of JPH0388504A publication Critical patent/JPH0388504A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To improve the linearity of DA conversion when the found arithmetic result of a waveform defining expression in converted into the waveform data by correcting an arithmetic result into waveform data in which the nonlinearity of the DA conversion is corrected based upon the values in an error correction table and outputting the corrected data. CONSTITUTION:When converting the arithmetic result of the optional function into the input data to a DA converter 3, the control circuit 10 refers to the error correction table 11 to correct the arithmetic result into a value closest to an ideal output value, and then outputs the value. For example, the range of the arithmetic result X found by the arithmetic control circuit 10 from the optional waveform is determined by referring to measured values stored on a memory 11 by the arithmetic control circuit 10. Namely, the range of (x) is so corrected that respective steps in a figure, i.e., errors have equal positive and negative values, and the DA input data is determined according to the range. Consequently, the linearity of a DA converter is improved and a high- accuracy output is obtained.

Description

【発明の詳細な説明】 〈産業上の利用分野〉 本発明は、任意波形発生器におけるデジタル・アナログ
変換のりニアリティの改善に関する。
DETAILED DESCRIPTION OF THE INVENTION <Field of Industrial Application> The present invention relates to improving digital-to-analog conversion linearity in an arbitrary waveform generator.

〈従来の技術〉 従来のデジタル型の任意波形発生器の一例を第5図に示
す。図において、1は波形データが格納された波形メモ
リ、2はクロック・アドレス発生器で、波形メモリ1よ
り波形データを読み出すために必要なアドレスを発生す
ると共に、読み出された波形データ(デジタルデータ)
をデジタル・アナログ変換器(以下DA変換器という)
3でアナログ変換する際の変換クロックを発生する。
<Prior Art> An example of a conventional digital arbitrary waveform generator is shown in FIG. In the figure, 1 is a waveform memory in which waveform data is stored, and 2 is a clock/address generator that generates the addresses necessary to read out the waveform data from waveform memory 1 and also generates the readout waveform data (digital data). )
is a digital-to-analog converter (hereinafter referred to as a DA converter)
3 generates a conversion clock for analog conversion.

4は演算・制御回路で、波形メモリ1に与える波形デー
タを波形定義式より演算して求めると共に、クロック・
アドレス発生器2がアドレスおよびクロックを適切に発
生するよう制御するものである。
4 is an arithmetic/control circuit that calculates the waveform data to be given to the waveform memory 1 from the waveform definition equation, and also calculates the waveform data given to the waveform memory 1 by calculating the clock and
It controls the address generator 2 to appropriately generate addresses and clocks.

このような構成においては、予め演算・制御回路4にお
いて波形定義式を演算し出力波形の波形データを求め、
波形メモリに格納する。その後、クロック・アドレス発
生器2よりアドレスを指定して波形メモリ1より波形デ
ータを読み出し、DA変換器3でアナログ変換する。こ
のデータ読み出し、アナログ変換動作を間断なく繰り返
すことにより連続したアナログ波形を得ることができる
In such a configuration, the waveform definition equation is calculated in advance in the calculation/control circuit 4 to obtain waveform data of the output waveform,
Store in waveform memory. Thereafter, the clock address generator 2 specifies an address, the waveform data is read from the waveform memory 1, and the DA converter 3 converts it into analog data. By repeating this data reading and analog conversion operation without interruption, a continuous analog waveform can be obtained.

なお、最終的にはこの出力波形を更にローパスフィルタ
等を通してなめらかな波形に整形するが、ここでは直接
に関係しない事項なのでその部分は省略しである。
Note that this output waveform is ultimately shaped into a smooth waveform by passing it through a low-pass filter, etc., but since it is not directly related here, that part will be omitted.

〈発明が解決しようとする課題〉 ところで、このような従来の任意波形発生器では、演算
・制御回路4において波形定義式を演算し出力波形の波
形データに変換する時、演算値自体の有効ビット数が大
きいく分解能が高い〉にもかかわらず、理想的なりA変
換器を想定して、単純にDAの分解能以下のデータを四
捨五入し、その値を波形メモリ1に与えている。
<Problems to be Solved by the Invention> By the way, in such a conventional arbitrary waveform generator, when a waveform definition formula is calculated in the calculation/control circuit 4 and converted into waveform data of an output waveform, the valid bits of the calculation value itself are Despite the fact that the number is large and the resolution is high, assuming an ideal DA converter, data below the DA resolution is simply rounded off and the value is given to the waveform memory 1.

したがって、DA変換器3の出力波形には、変換の際の
量子化誤差に加えて、DA変換器3の直線性誤差および
微分直線性誤差等により、誤差が生じるという問題があ
った。
Therefore, there is a problem in that the output waveform of the DA converter 3 contains errors due to linearity errors, differential linearity errors, etc. of the DA converter 3 in addition to quantization errors during conversion.

本発明の目的は、このような点に鑑みてなされたもので
、DA変換器の直線性誤差、微分直線性誤差等の誤差を
、誤差補正デープルと波形テータ作成手段により改善し
、高精度の波形を発生することのできる任意波形発生器
を提供することにある。
The object of the present invention has been made in view of the above points, and it is an object of the present invention to improve errors such as linearity error and differential linearity error of a DA converter by using an error correction daple and a waveform data creation means, and to achieve high precision. An object of the present invention is to provide an arbitrary waveform generator capable of generating waveforms.

く課題を解決するための手段〉 このような目的を達成するための本発明は、演算・制御
回路により波形定義式を演算し、算出された波形データ
を波形メモリに記憶しておき、この波形メモリから順次
波形データを読み出してDA変換器によりアナログ変換
してゆくことによって、任意波形を発生する任意波形発
生器において、 前記DA変換器の入力データと出力データの関係を予め
記憶された誤差補正テーブルを備え、前記演算・制御回
路は、求められた波形定義式の演算結果から波形データ
に変換する際に、前記誤差補正デープルの値を基にDA
変換の非直線性が補正されるような波形データに補正し
て出力する機能を含むようにように構成されたことを特
徴とする。
Means for Solving the Problems> In order to achieve such objects, the present invention calculates a waveform definition formula using an arithmetic/control circuit, stores the calculated waveform data in a waveform memory, and stores this waveform data in a waveform memory. In an arbitrary waveform generator that generates an arbitrary waveform by sequentially reading out waveform data from a memory and converting it into analog data using a DA converter, the relationship between the input data and output data of the DA converter is corrected by pre-stored error correction. The arithmetic/control circuit includes a table, and when converting the arithmetic result of the obtained waveform definition formula into waveform data, the arithmetic/control circuit performs a DA based on the value of the error correction daple.
The present invention is characterized in that it is configured to include a function of correcting and outputting waveform data such that non-linearity of conversion is corrected.

〈作用〉 本発明では、DA変換器の入出力特性(直線性)はその
ままで、DA変換器に与える波形データを補正する。
<Operation> In the present invention, the waveform data given to the DA converter is corrected while the input/output characteristics (linearity) of the DA converter remain unchanged.

誤差補正テーブルには、DA変換器の入力と出力の値あ
るいは理想的な出力値と実際の出力値との差分データを
記憶しておく。
The error correction table stores the difference data between the input and output values of the DA converter or the ideal output value and the actual output value.

演算・制御回路では、波形定義式より求められた値から
波形メモリに与える波形データへの変換の際に、誤差補
正テーブルの値を参照して、DA変換の直線性が改善さ
れるような波形データに補正、する。
In the arithmetic/control circuit, when converting the value obtained from the waveform definition formula into waveform data given to the waveform memory, the value of the error correction table is referred to, and the waveform is created so that the linearity of DA conversion is improved. Correct the data.

〈実施例〉 以下図面を参照して本発明の詳細な説明する。<Example> The present invention will be described in detail below with reference to the drawings.

第1図は本発明に係る任意波形発生器の一実施例を示す
構成図である。図において、第5図と同等な部分には同
一符号を付し、その説明は省略する。
FIG. 1 is a block diagram showing an embodiment of an arbitrary waveform generator according to the present invention. In the figure, parts equivalent to those in FIG. 5 are designated by the same reference numerals, and their explanation will be omitted.

10は演算・制御回路で、波形メモリ1およびり弓 ロック・アドレス発生器2に対するデータの供給および
制御は従来例の場合と同様である。ただし、任意関数の
演算結果をDA変換器への入力データに変換する際、誤
差補正テーブル11を参照し、理想の出力値(誤差のな
い出力値)に最も近い値となるような値に補正して出力
する機能が従来例の場合とは異なる。
Reference numeral 10 denotes an arithmetic and control circuit, and data supply and control to the waveform memory 1 and bow lock address generator 2 are the same as in the conventional example. However, when converting the calculation result of an arbitrary function into input data to the DA converter, refer to the error correction table 11 and correct it to the value that is closest to the ideal output value (output value without error). The output function is different from that of the conventional example.

誤差補正テーブル11は、メモリで構成され、DA変換
器3の出力について理想値と測定値の差分が記憶された
ものである。なお、理想値と測定値の差分てはなく、測
定値そのものとすることもできる。
The error correction table 11 is composed of a memory, and stores the difference between the ideal value and the measured value of the output of the DA converter 3. Note that it is also possible to use the measured value itself instead of the difference between the ideal value and the measured value.

この誤差補正テーブルには、予め実測により得られたデ
ータが格納される。DA変換器3の直流特性を外部の電
圧計あるいは自己校正機能(CAL機能)により求める
ことができる場合は、その手段により理想値(入力値に
対して誤差のない出力値)と実際の出力値との差分を求
め、それを記憶しておく。
This error correction table stores data obtained in advance through actual measurements. If the DC characteristics of the DA converter 3 can be determined using an external voltmeter or self-calibration function (CAL function), the ideal value (output value with no error relative to the input value) and the actual output value can be determined by that means. Find the difference between the two and memorize it.

12は上記CAL機能を有する場合において用いられる
低速高分解能型のアナログ・デジタル変換器(以下AD
変換器という)を示すもので、DA変換器3に所定の入
力を与え(演算・制御回路10より与える)、その時の
出力をAD変換器12で読み取り、その差分(またはそ
の読み取り値そのもの)をメモリ11に格納する。
Reference numeral 12 is a low-speed, high-resolution analog-to-digital converter (hereinafter referred to as AD) used when it has the above CAL function.
A predetermined input is given to the DA converter 3 (from the arithmetic/control circuit 10), the output at that time is read by the AD converter 12, and the difference (or the read value itself) is calculated. Store it in the memory 11.

なお、誤差補正テーブル11としてのメモリは、CAL
lli能を持たない場合にはリードオンリメモリ(RO
M) 、CAL機能を持つ場合にはランダムアクセスメ
モリ(RAM)を用いるのが望ましい。
Note that the memory as the error correction table 11 is CAL
Read-only memory (RO)
M) If the device has a CAL function, it is desirable to use random access memory (RAM).

このような構成における動作を次に説明する。The operation in such a configuration will be explained next.

ここでは説明を簡明にするために、DA変換器3として
3ビツトの変換器を用いた場合を例にとって説明する。
In order to simplify the explanation, an example will be described in which a 3-bit converter is used as the DA converter 3.

第2図は理想的なりA変換の際の入力演算値とDA変換
器の出力の関係を示す図である。この場合の、演算・制
御回路10において任意波形から求めた演算結果x、D
A入カデータおよびDA変換器3の出力の関係は第1表
の通りである。例えば、演算結果Xが0,5≦x<1.
5の場合は、演算・制御回路10からはDA入力データ
として1が選択出力され、そのDA入力データを変換し
たアナログ出力も1となる。
FIG. 2 is a diagram showing the relationship between the input calculation value and the output of the DA converter during ideal RI-A conversion. In this case, the calculation results x, D obtained from the arbitrary waveform in the calculation/control circuit 10
The relationship between the A input data and the output of the DA converter 3 is shown in Table 1. For example, if the calculation result X is 0, 5≦x<1.
In the case of 5, the arithmetic/control circuit 10 selects and outputs 1 as the DA input data, and the analog output obtained by converting the DA input data also becomes 1.

1.5≦x<2.5の場合には、DA入カデータとして
2が選択出力され、これを変換して出力されたアナログ
出力も2となる。この場合の最大エラーは0.5LSB
 (LSBはDA変換器の最小ビット値)である。
If 1.5≦x<2.5, 2 is selected and output as the DA input data, and the analog output that is converted and output is also 2. The maximum error in this case is 0.5LSB
(LSB is the minimum bit value of the DA converter).

DA入出力関係が第3図に示すような関係であったとす
る。すなわち、DA入力データ(この場合演算結果Xと
DA入力データの関係は理想の場合と変わらないとした
)と出力データの関係が非直線性(第2表)であったと
する。この場合の最大エラーは1.5LSBである。
Assume that the DA input/output relationship is as shown in FIG. That is, it is assumed that the relationship between the DA input data (in this case, the relationship between the calculation result X and the DA input data is the same as in the ideal case) and the output data is nonlinear (Table 2). The maximum error in this case is 1.5LSB.

第2表 本願発明では、このDA変換器3の入出力特性には手を
加えないで、DA入カデータ1,2,301.に対する
演算値Xを第3表のように補正する。
Table 2 In the present invention, the input/output characteristics of the DA converter 3 are left unchanged, and the DA input data 1, 2, 301 . The calculated value X for is corrected as shown in Table 3.

第3表 このようにXの範囲を補正してDA入力データを選択す
るようにすれば第4図に示すように直線性のよい(最大
エラーが1.25LSBで、補正前より0.25LSB
少ない)特性が得られる。
Table 3 If you select the DA input data by correcting the range of
(less) characteristics are obtained.

上記のようなXの範囲の決定は、演算・制御回路10に
よりメモリ11に格納された測定値を参照して行なわれ
る。すなわち、第2図における各ステップの段差いわゆ
るエラー(直線Aに対するエラー)が第3図に示すよう
に正負同じになるようにXの範囲を補正し、これに基づ
きDA入力データを決定する。
The determination of the range of X as described above is performed by the arithmetic/control circuit 10 with reference to the measured values stored in the memory 11. That is, the range of X is corrected so that the difference in level of each step in FIG. 2, so-called error (error with respect to straight line A), has the same positive and negative values as shown in FIG. 3, and the DA input data is determined based on this.

なお、単調増加性が保てないようなりA変換器を用いた
場合でも、同様な処理により直線性が改善される。
Note that even if monotonous increasing property cannot be maintained and an A converter is used, linearity can be improved by similar processing.

〈発明の効果〉 以上詳細に説明したように、本発明によれば、DA変換
器の直線性が改善されるため、任意波形発生器の出力の
DA変換器を原因とする歪等が改善され、高精度な出力
が得られるという効果がある。
<Effects of the Invention> As explained in detail above, according to the present invention, the linearity of the DA converter is improved, so distortion etc. caused by the DA converter in the output of the arbitrary waveform generator is improved. This has the effect of providing highly accurate output.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る任意波形発生器の一実施例を示す
構成図、第2図は理想のDA変換特性を示す図、第3図
および第4図は動作説明のためのDA変換特性を示す図
、第5図は従来の任意波形発生器の一例を示す構成図で
ある。 1・・・波形メモリ、2・・・クロック・アドレス発生
器、3・・・DA変換器、10・・・演算・制御回路、
1 1・・・誤差補正テーブル、 2・・・AD変換器。
FIG. 1 is a block diagram showing an embodiment of the arbitrary waveform generator according to the present invention, FIG. 2 is a diagram showing ideal DA conversion characteristics, and FIGS. 3 and 4 are DA conversion characteristics for explaining operation. FIG. 5 is a configuration diagram showing an example of a conventional arbitrary waveform generator. DESCRIPTION OF SYMBOLS 1... Waveform memory, 2... Clock address generator, 3... DA converter, 10... Arithmetic/control circuit,
1 1...Error correction table, 2...AD converter.

Claims (1)

【特許請求の範囲】 演算・制御回路により波形定義式を演算し、算出された
波形データを波形メモリに記憶しておき、この波形メモ
リから順次波形データを読み出してDA変換器によりア
ナログ変換してゆくことによって、任意波形を発生する
任意波形発生器において、 前記DA変換器の入力データと出力データの関係を予め
記憶された誤差補正テーブルを備え、前記演算・制御回
路は、求められた波形定義式の演算結果から波形データ
に変換する際に、前記誤差補正テーブルの値を基にDA
変換の非直線性が補正されるような波形データに補正し
て出力する機能を含むように構成されたことを特徴とす
る任意波形発生器。
[Claims] A waveform definition equation is calculated by an arithmetic/control circuit, the calculated waveform data is stored in a waveform memory, and the waveform data is sequentially read from the waveform memory and converted into analog by a DA converter. As a result, an arbitrary waveform generator that generates an arbitrary waveform is provided with an error correction table in which the relationship between input data and output data of the DA converter is stored in advance, and the arithmetic/control circuit is configured to generate an arbitrary waveform definition. When converting the calculation result of the formula into waveform data, the DA is calculated based on the value of the error correction table.
An arbitrary waveform generator characterized in that it is configured to include a function of correcting and outputting waveform data such that non-linearity of conversion is corrected.
JP22493489A 1989-08-31 1989-08-31 Optional waveform generator Pending JPH0388504A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22493489A JPH0388504A (en) 1989-08-31 1989-08-31 Optional waveform generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22493489A JPH0388504A (en) 1989-08-31 1989-08-31 Optional waveform generator

Publications (1)

Publication Number Publication Date
JPH0388504A true JPH0388504A (en) 1991-04-12

Family

ID=16821473

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22493489A Pending JPH0388504A (en) 1989-08-31 1989-08-31 Optional waveform generator

Country Status (1)

Country Link
JP (1) JPH0388504A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005081407A1 (en) * 2004-02-25 2005-09-01 Mitsubishi Denki Kabushiki Kaisha Waveform generation method, radar device, and oscillator for radar device
EP2378667A2 (en) 2010-04-15 2011-10-19 Tektronix, Inc. Method for compensating a frequency characteristic of an arbitrary waveform generator
US9429414B2 (en) 2009-06-25 2016-08-30 Canon Kabushiki Kaisha Image pickup apparatus and image pickup method using optical coherence tomography

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53124053A (en) * 1977-04-06 1978-10-30 Hitachi Ltd D/a converter with correction circuit
JPS5656005A (en) * 1979-10-12 1981-05-16 Shimadzu Corp Random-waveform generator

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53124053A (en) * 1977-04-06 1978-10-30 Hitachi Ltd D/a converter with correction circuit
JPS5656005A (en) * 1979-10-12 1981-05-16 Shimadzu Corp Random-waveform generator

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005081407A1 (en) * 2004-02-25 2005-09-01 Mitsubishi Denki Kabushiki Kaisha Waveform generation method, radar device, and oscillator for radar device
JPWO2005081407A1 (en) * 2004-02-25 2007-10-25 三菱電機株式会社 Waveform generation method, radar apparatus, and oscillation apparatus for radar apparatus
US7548195B2 (en) 2004-02-25 2009-06-16 Mitsubishi Denki Kabushiki Kaisha Waveform generation method, radar device, and oscillator for radar device
US7679549B2 (en) 2004-02-25 2010-03-16 Mitsubishi Denki Kabushiki Kaisha Waveform generation method, radar device, and oscillator for radar device
JP4605157B2 (en) * 2004-02-25 2011-01-05 三菱電機株式会社 Waveform generation method, radar apparatus, and oscillation apparatus for radar apparatus
US9429414B2 (en) 2009-06-25 2016-08-30 Canon Kabushiki Kaisha Image pickup apparatus and image pickup method using optical coherence tomography
EP2378667A2 (en) 2010-04-15 2011-10-19 Tektronix, Inc. Method for compensating a frequency characteristic of an arbitrary waveform generator
JP2011228815A (en) * 2010-04-15 2011-11-10 Tektronix Inc Frequency characteristic correction method for arbitrary waveform generator

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