JPH0345084U - - Google Patents
Info
- Publication number
- JPH0345084U JPH0345084U JP10407889U JP10407889U JPH0345084U JP H0345084 U JPH0345084 U JP H0345084U JP 10407889 U JP10407889 U JP 10407889U JP 10407889 U JP10407889 U JP 10407889U JP H0345084 U JPH0345084 U JP H0345084U
- Authority
- JP
- Japan
- Prior art keywords
- switch
- turned
- inrush current
- control circuit
- current control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003247 decreasing effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Dc-Dc Converters (AREA)
Description
第１図は本考案のブロツク図、第２図は本考案
の第１の実施例の構成図、第３図は本考案の第２
の実施例の構成図、第４図は本考案の第３の実施
例の構成図、第５図は従来方式の構成図である。
Ｐ……容量性負荷、Ｒ……抵抗、Ｓ……スイツ
チ。
Figure 1 is a block diagram of the present invention, Figure 2 is a block diagram of the first embodiment of the present invention, and Figure 3 is the second embodiment of the present invention.
FIG. 4 is a block diagram of a third embodiment of the present invention, and FIG. 5 is a block diagram of a conventional system. P...Capacitive load, R...Resistance, S...Switch.
Claims (1)
抵抗を短絡するスイツチとの並列回路を設け、 電源投入後、突入電流が低下してから前記スイ
ツチをオンとすることを特徴とする突入電流制御
回路。 ２ 前記スイツチはリレーの接点であり、該リレ
ーのコイルは前記容量性負荷の入力端子あるいは
出力端子の少なくとも一方に接続されることを特
徴とする請求項１記載の突入電流制御回路。 ３ 前記スイツチは電源投入後特定時間後にオン
となるタイマのスイツチであることを特徴とする
請求項１記載の突入電流制御回路。[Claims for Utility Model Registration] 1. A parallel circuit consisting of a resistor and a switch that shorts the resistor is provided between the input terminal of the capacitive load and the power supply, and after the power is turned on, the switch is turned on after the inrush current has decreased. An inrush current control circuit characterized by: 2. The inrush current control circuit according to claim 1, wherein the switch is a contact of a relay, and a coil of the relay is connected to at least one of an input terminal and an output terminal of the capacitive load. 3. The inrush current control circuit according to claim 1, wherein the switch is a timer switch that is turned on after a specific time after power is turned on.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10407889U JPH0345084U (en) | 1989-09-05 | 1989-09-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10407889U JPH0345084U (en) | 1989-09-05 | 1989-09-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0345084U true JPH0345084U (en) | 1991-04-25 |
Family
ID=31652886
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10407889U Pending JPH0345084U (en) | 1989-09-05 | 1989-09-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0345084U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005287988A (en) * | 2004-04-05 | 2005-10-20 | Toranto:Kk | Call display device in game machine |
| JP2005287987A (en) * | 2004-04-05 | 2005-10-20 | Toranto:Kk | Display device in game machine |
| JP2020003278A (en) * | 2018-06-27 | 2020-01-09 | セイコーエプソン株式会社 | Physical quantity detection circuit, physical quantity detector, electronic apparatus, and mobile body |
-
1989
- 1989-09-05 JP JP10407889U patent/JPH0345084U/ja active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005287988A (en) * | 2004-04-05 | 2005-10-20 | Toranto:Kk | Call display device in game machine |
| JP2005287987A (en) * | 2004-04-05 | 2005-10-20 | Toranto:Kk | Display device in game machine |
| JP2020003278A (en) * | 2018-06-27 | 2020-01-09 | セイコーエプソン株式会社 | Physical quantity detection circuit, physical quantity detector, electronic apparatus, and mobile body |