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JPH0325977A - Schottky barrier diode - Google Patents

Schottky barrier diode

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Publication number
JPH0325977A
JPH0325977A JP16133889A JP16133889A JPH0325977A JP H0325977 A JPH0325977 A JP H0325977A JP 16133889 A JP16133889 A JP 16133889A JP 16133889 A JP16133889 A JP 16133889A JP H0325977 A JPH0325977 A JP H0325977A
Authority
JP
Japan
Prior art keywords
layer
metal layer
barrier metal
deposited
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16133889A
Other languages
Japanese (ja)
Other versions
JP2611434B2 (en
Inventor
Shigeru Tsuda
津田 茂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP1161338A priority Critical patent/JP2611434B2/en
Publication of JPH0325977A publication Critical patent/JPH0325977A/en
Application granted granted Critical
Publication of JP2611434B2 publication Critical patent/JP2611434B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To reduce a reverse wet current and to stabilize reverse characteristics by controlling the temperature of a semiconductor substrate in a specific range when an aluminum layer is laminated on a barrier metal layer by depositing. CONSTITUTION:An annular P-type layer 13 is formed as a guard ring on the surface of a silicon substrate 1 in which an N-type layer 12 is epitaxially grown on an N<+> type base plate 11. After the surface provided with the ring 13 is covered with an oxide film 2, an opening is opened inside from the center of the ring, and Mo is deposited as a barrier metal layer 3. Further, an Al electrode layer 4 is deposited thereon. When an aluminum layer is deposited on the barrier metal layer, the temperature of a semiconductor substrate is controlled to a range of 210-270 deg.C. The layers 3 and 4 are, after all the surfaces are deposited, so patterned that a peripheral edge is provided above outside the ring 13.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体基板の表面にシッットキーバリア金属
層が接触し、その上に171以上の電極金属層が被着す
るシッフトキーバリアダイオードの製造方法に関する. 〔従来の技術〕 ショントキーバリアダイオードの半導体基板上へのバリ
ア金属層および電極金属層の積層は、通常同一真空蒸着
槽内での連続した蒸着によって行われる.従来はNoな
どのバリア金属の蒸着の際には、輻射加熱で基FL温度
を340〜350℃に正確に制御して、それにつづ<,
u’t極層および必要により積層される他の金属の電極
層の蒸着の際には、基板を加熱しないかせいぜい150
℃程度に加熱していた. 〔発明が解決しようとする課題〕 従来の方法でバリア金属層およびit極金属層を蒸着し
て製造していたショットキーバリアダイオードでは、蒸
着ロフト間で逆方向特性ガ大きくばらつくという問題が
ある. 本発明の目的は、バリア金属層および電極金属層の蒸着
ロフト間における逆方向特性のばらつきの少ないシッッ
トキーバリアダイオードを経済的に製造する方法を提供
することにある.〔課題を解決するための手段〕 上記の目的を達戊するために、本発明は、半導体基板の
表面に接触するシッットキーバリア金属層に隣接する層
がアルミニウムからなる電極金属層を蒸着によって形成
するシツットキーバリアダイオードの製造方法において
、バリア金r!Ayi上にアルミニウム層を蒸着により
積層する際に半導体基板の温度を210〜270℃の範
囲に制御するものとする. 〔作用〕 シッットキーバリアダイオードの逆方向特性′のばらつ
きは、半導体基板とバリア金属層間およびバリア金属層
と電極金属層間の密着度のばらつき、ならびにバリア金
属層と1t極金属層間の機械的心力のばらつきによる.
本発明に基づき、バリア金属層上に積層されるM電極層
の蒸着時に、半導体基板を適切な温度に制槁することに
より、M層とバリア金属層との密着度が向上すると共に
均一になり、バリア金属層とM層間の機械的応力が小さ
くなり均一化される.さらに、半導体基板とバリア金属
層間の密着度を均一化し、これらによって逆方向漏れ電
流が小さくなり、逆方向特性が均一化する. 〔実施例〕 第2図,第3図は、製造の際に本発明が実施されるシサ
フトキーバリアダイオードの二つの例を示す.第2図に
おいては、N4母板11上にN 1i 12をエビタキ
シャル成長させたシリコン基Filの表面にガードリン
グとしての環状のp層13が形威されている.このガー
ドリング13の設けられる表面を酸化膜2で覆ったのち
、ガードリングの中央からの内側に開口部を明け、Mo
を蒸着してバリア金属層3とする.さらにその上にk1
電極Ji4を蒸着する.間層3およびA7N4は全面蒸
着の後、ガードリングl3の外側上方に周縁があるよう
にバターニングする.第3図においては、A7tpiJ
li 4の上にさらにMとAuの合金化を防ぐNii4
極層5,はんだ付け性のよいAu電極層6が積層されて
いる.第1図は、第2図に示したショットキーバリアダ
イオードの逆方向漏れit流とA77i3の蒸着時に輻
射加熱で加熱したシリコン基41i.′iA度との関係
を示し、基板を210℃より低い温度で保持した場合、
あるいは270℃より高い温度で保持した場合には、逆
方向漏れ電流が大きくなってしまう事が認められる・こ
のような関係は電極金属層が3層の第3図に示した構造
のダイオード製造時のM層4の蒸着についても認められ
た. 〔発明の効果〕 本発明によれば、半導体基板上にバリア金属層を蒸着し
たのちにM1i極層を蒸着する際、バリア金属層とM電
極層および半導体基板の間の密着性の向上.均一化、バ
リア金属層とM電極層の間の機械的応力の発生の防止の
ために基板を適切な温度に加熱することにより、製造さ
れたシッットキーバリアダイオードの逆方向漏れ電流を
小さくし、逆方向特性を安定化させることができた.
Detailed Description of the Invention [Industrial Application Field] The present invention relates to a Schifftky barrier diode in which a Schittky barrier metal layer is in contact with the surface of a semiconductor substrate, and 171 or more electrode metal layers are deposited thereon. Concerning the manufacturing method. [Prior Art] Lamination of a barrier metal layer and an electrode metal layer on a semiconductor substrate of a Shontokey barrier diode is usually performed by successive evaporation in the same vacuum evaporation tank. Conventionally, when depositing barrier metals such as No, the base FL temperature was accurately controlled to 340 to 350°C using radiation heating, and then <,
When depositing the electrode layer and other metal electrode layers laminated as necessary, do not heat the substrate or at most
It was heated to about ℃. [Problems to be Solved by the Invention] Schottky barrier diodes manufactured by depositing barrier metal layers and IT electrode metal layers using conventional methods have a problem in that the reverse characteristics vary greatly between deposition lofts. An object of the present invention is to provide a method for economically manufacturing a Schittky barrier diode with less variation in reverse characteristics between the deposition lofts of the barrier metal layer and the electrode metal layer. [Means for Solving the Problems] In order to achieve the above object, the present invention provides an electrode metal layer in which the layer adjacent to the Schittky barrier metal layer in contact with the surface of a semiconductor substrate is made of aluminum by vapor deposition. In the method for manufacturing a Schittky barrier diode, the barrier gold r! When laminating an aluminum layer on Ayi by vapor deposition, the temperature of the semiconductor substrate shall be controlled within the range of 210 to 270°C. [Function] Variations in the reverse characteristics of Schittky barrier diodes are caused by variations in the degree of adhesion between the semiconductor substrate and the barrier metal layer, between the barrier metal layer and the electrode metal layer, and by the mechanical force between the barrier metal layer and the 1T electrode metal layer. Due to the variation in
According to the present invention, by controlling the semiconductor substrate to an appropriate temperature during vapor deposition of the M electrode layer laminated on the barrier metal layer, the adhesion between the M layer and the barrier metal layer is improved and made uniform. , the mechanical stress between the barrier metal layer and the M layer is reduced and made uniform. Furthermore, the degree of adhesion between the semiconductor substrate and the barrier metal layer is made uniform, which reduces the reverse leakage current and makes the reverse characteristics uniform. [Example] Figures 2 and 3 show two examples of sysaft key barrier diodes in which the present invention is implemented during manufacture. In FIG. 2, an annular p-layer 13 as a guard ring is formed on the surface of a silicon-based film in which N 1i 12 is epitaxially grown on an N 4 motherboard 11 . After covering the surface on which the guard ring 13 is provided with an oxide film 2, an opening is made inside from the center of the guard ring, and the Mo
is vapor-deposited to form barrier metal layer 3. Furthermore, k1 on top of that
Deposit electrode Ji4. After the interlayer 3 and A7N4 are deposited on the entire surface, they are patterned so that the periphery is above the outside of the guard ring l3. In Figure 3, A7tpiJ
Nii4 is added on top of Li4 to prevent alloying of M and Au.
A pole layer 5 and an Au electrode layer 6 with good solderability are laminated. FIG. 1 shows the reverse leakage IT flow of the Schottky barrier diode shown in FIG. 2 and the silicon base 41i. 'iA degree, and when the substrate is held at a temperature lower than 210°C,
Alternatively, if the temperature is maintained at a temperature higher than 270°C, it is observed that the reverse leakage current increases. -Such a relationship is observed when manufacturing a diode with the structure shown in Figure 3, which has three electrode metal layers. The deposition of M layer 4 was also observed. [Effects of the Invention] According to the present invention, when a M1i electrode layer is deposited after a barrier metal layer is deposited on a semiconductor substrate, the adhesion between the barrier metal layer, the M electrode layer, and the semiconductor substrate is improved. The reverse leakage current of the manufactured Schittky barrier diode is reduced by heating the substrate to an appropriate temperature for uniformization and prevention of mechanical stress generation between the barrier metal layer and the M electrode layer. , we were able to stabilize the reverse direction characteristics.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はショットキーバリアダイオードの逆方向漏れ電
流とM電極層蒸着時の半導体基板温度との関係線図、第
2図はショットキーバリアダイオードの一例の断面図、
第3図は他の例の断面図である. 1:シリコン基板、3:バリア金属層、4:A1ノ 第1図 !3 ′1!2 図 第3児
Fig. 1 is a relationship diagram between the reverse leakage current of a Schottky barrier diode and the semiconductor substrate temperature during the deposition of the M electrode layer, and Fig. 2 is a cross-sectional view of an example of a Schottky barrier diode.
Figure 3 is a cross-sectional view of another example. 1: Silicon substrate, 3: Barrier metal layer, 4: A1 Figure 1! 3 '1!2 Figure 3rd child

Claims (1)

【特許請求の範囲】[Claims] 1)半導体基板の表面に接触するショットキーバリア金
属層に隣接する層がアルミニウムからなる電極金属層を
蒸着によって形成するショットキーバリアダイオードの
製造方法において、バリア金属層上にアルミニウム層を
蒸着により積層する際に半導体基板の温度を210〜2
70℃の範囲に制御することを特徴とするショットキー
バリアダイオード。
1) In a method for manufacturing a Schottky barrier diode in which an electrode metal layer is formed by vapor deposition in which the layer adjacent to the Schottky barrier metal layer in contact with the surface of a semiconductor substrate is made of aluminum, an aluminum layer is laminated on the barrier metal layer by vapor deposition. When the temperature of the semiconductor substrate is 210~2
A Schottky barrier diode characterized by being controlled within a range of 70°C.
JP1161338A 1989-06-23 1989-06-23 Schottky barrier diode manufacturing method Expired - Fee Related JP2611434B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1161338A JP2611434B2 (en) 1989-06-23 1989-06-23 Schottky barrier diode manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1161338A JP2611434B2 (en) 1989-06-23 1989-06-23 Schottky barrier diode manufacturing method

Publications (2)

Publication Number Publication Date
JPH0325977A true JPH0325977A (en) 1991-02-04
JP2611434B2 JP2611434B2 (en) 1997-05-21

Family

ID=15733183

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1161338A Expired - Fee Related JP2611434B2 (en) 1989-06-23 1989-06-23 Schottky barrier diode manufacturing method

Country Status (1)

Country Link
JP (1) JP2611434B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06196723A (en) * 1992-04-28 1994-07-15 Mitsubishi Electric Corp Semiconductor device and manufacture thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS504436A (en) * 1973-05-19 1975-01-17
JPS5132953A (en) * 1974-09-13 1976-03-19 Tokuriki Honten Kk Rozukeyosetsutenhen no seizohoho
JPS59125621A (en) * 1982-12-28 1984-07-20 Fujitsu Ltd Device for manufacturing semiconductor
JPS6024044A (en) * 1983-05-19 1985-02-06 Hitachi Cable Ltd Manufacture of lead frame by vapor deposition of ionization
JPS62281366A (en) * 1986-05-29 1987-12-07 Tdk Corp Manufacture of schottky barrier type semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS504436A (en) * 1973-05-19 1975-01-17
JPS5132953A (en) * 1974-09-13 1976-03-19 Tokuriki Honten Kk Rozukeyosetsutenhen no seizohoho
JPS59125621A (en) * 1982-12-28 1984-07-20 Fujitsu Ltd Device for manufacturing semiconductor
JPS6024044A (en) * 1983-05-19 1985-02-06 Hitachi Cable Ltd Manufacture of lead frame by vapor deposition of ionization
JPS62281366A (en) * 1986-05-29 1987-12-07 Tdk Corp Manufacture of schottky barrier type semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06196723A (en) * 1992-04-28 1994-07-15 Mitsubishi Electric Corp Semiconductor device and manufacture thereof

Also Published As

Publication number Publication date
JP2611434B2 (en) 1997-05-21

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