JPH0324710A - Capacitor and manufacture thereof - Google Patents
Capacitor and manufacture thereofInfo
- Publication number
- JPH0324710A JPH0324710A JP16006789A JP16006789A JPH0324710A JP H0324710 A JPH0324710 A JP H0324710A JP 16006789 A JP16006789 A JP 16006789A JP 16006789 A JP16006789 A JP 16006789A JP H0324710 A JPH0324710 A JP H0324710A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- substrates
- electrode
- capacitor
- dielectric film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 38
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 95
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 24
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 22
- 238000000034 method Methods 0.000 claims abstract description 18
- 238000001962 electrophoresis Methods 0.000 claims description 14
- 239000010408 film Substances 0.000 description 58
- 239000010410 layer Substances 0.000 description 11
- 239000002245 particle Substances 0.000 description 7
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 238000010438 heat treatment Methods 0.000 description 5
- 239000007788 liquid Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 230000001590 oxidative effect Effects 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- 239000011521 glass Substances 0.000 description 3
- 239000000843 powder Substances 0.000 description 3
- ZCYVEMRRCGMTRW-UHFFFAOYSA-N 7553-56-2 Chemical compound [I] ZCYVEMRRCGMTRW-UHFFFAOYSA-N 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 229910052740 iodine Inorganic materials 0.000 description 2
- 239000011630 iodine Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 239000000725 suspension Substances 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 239000003985 ceramic capacitor Substances 0.000 description 1
- 239000011247 coating layer Substances 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- -1 consists of SiO2 Chemical compound 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000003792 electrolyte Substances 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- DHEIAYDROZXXGS-UHFFFAOYSA-N ethanol;iodine Chemical compound [I].CCO DHEIAYDROZXXGS-UHFFFAOYSA-N 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- ZFZQOKHLXAVJIF-UHFFFAOYSA-N zinc;boric acid;dihydroxy(dioxido)silane Chemical compound [Zn+2].OB(O)O.O[Si](O)([O-])[O-] ZFZQOKHLXAVJIF-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
- Ceramic Capacitors (AREA)
- Processes Specially Adapted For Manufacturing Cables (AREA)
Abstract
Description
【発明の詳細な説明】
発明の技術分野
本発明は、電気容量が大きく、かつ耐電圧性に優れたコ
ンデンサ、特に積層型のコンデンサに関する。DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a capacitor having a large capacitance and excellent voltage resistance, particularly a multilayer capacitor.
発明の技術的背景
コンデンサの一つとして誘電体の浦膜からなる薄膜コン
デンサがある。これは基板上に下部電極、誘電体膜、上
部電極を、この順に積層してある。TECHNICAL BACKGROUND OF THE INVENTION One type of capacitor is a thin film capacitor made of a dielectric film. In this structure, a lower electrode, a dielectric film, and an upper electrode are laminated in this order on a substrate.
このような薄膜コンデンサでは、電気容量は誘電体膜の
誘電率に比例し、誘電体膜の厚さに反比例するため、容
量を大きくするためには、誘電率の大きな材料を用いる
か、誘電体膜を薄くすればよい。一般に誘電率の大きな
材料は誘電率の温度変化が大きいことから、このような
材料を誘電体膜として用いた薄膜コンデンサでは、コン
デンサ容量が温度変化によって大きく変動することにな
る。In such thin film capacitors, the capacitance is proportional to the permittivity of the dielectric film and inversely proportional to the thickness of the dielectric film. Therefore, in order to increase the capacitance, a material with a high permittivity must be used or a dielectric material All you have to do is make the film thinner. Generally, materials with a high dielectric constant have a large change in dielectric constant with temperature, so in a thin film capacitor using such a material as a dielectric film, the capacitance of the capacitor varies greatly with changes in temperature.
そこで、温度係数の小さな材料を誘電体薄膜として用い
、その容量を向上させるために、誘電体の膜厚を薄くす
ることが考えられる。しかしながら、このような場合に
は、誘電体の厚さを十分に薄くしないと、満足な電気容
量が得られない。しかもこのように誘電体膜が薄いと下
地の凹凸や異物などによって、耐電圧が小さくなるとい
う問題がある。Therefore, it is conceivable to use a material with a small temperature coefficient as the dielectric thin film and reduce the thickness of the dielectric film in order to improve its capacity. However, in such cases, a satisfactory capacitance cannot be obtained unless the thickness of the dielectric is made sufficiently thin. Moreover, when the dielectric film is thin like this, there is a problem in that the withstand voltage becomes small due to unevenness or foreign matter in the underlying layer.
さらに従来の薄膜コンデンサでは、基板上に下部電極と
誘電体膜とをこの順で積層してあるため、誘電体膜を焼
成する際に下部電極も高温にさらされることから、耐熱
性に優れたpt等の電極を用いる必要があった。しかも
、このような耐熱性電極を用いた場合には、基板との間
に密着層が必要となり、電極作製工程が複雑でコストも
かかる。Furthermore, in conventional thin film capacitors, the lower electrode and dielectric film are laminated in this order on the substrate, so the lower electrode is also exposed to high temperature when the dielectric film is fired, resulting in excellent heat resistance. It was necessary to use an electrode such as PT. Moreover, when such a heat-resistant electrode is used, an adhesive layer is required between the electrode and the substrate, making the electrode manufacturing process complicated and costly.
なお、Si基板の表面を熱酸化して得られるケイ素酸化
物層をコンデンサとして利用することは集積回路では知
られているが、電気容量が十分でなく、電気容量を向上
させるためにケイ素酸化物層の膜厚を薄くすると、耐電
圧性が低下するという問題点を有していた。It is known that a silicon oxide layer obtained by thermally oxidizing the surface of a Si substrate is used as a capacitor in integrated circuits, but the capacitance is insufficient, and silicon oxide layers are used to improve capacitance. When the film thickness of the layer is made thinner, there is a problem in that the withstand voltage property decreases.
また、第3図に示すように、電気容量を大きくするため
に、誘電材料から成る複数のセラミックシ一ト22を、
左右交互に配置された内部電極24を介して積層し、一
層おき毎の内部電極24を別々の外部電極26.26で
接続するようにしたセラミック積層コンデンサ20も知
られている。In addition, as shown in FIG. 3, in order to increase the capacitance, a plurality of ceramic sheets 22 made of dielectric material are used.
A ceramic multilayer capacitor 20 is also known in which the capacitors are laminated with internal electrodes 24 arranged alternately on the left and right sides, and the internal electrodes 24 of every other layer are connected by separate external electrodes 26 and 26.
このような実情から、本発明者等は、表面に誘電体膜が
形成されたSi基板を積層して電気容量の増大を図るこ
とができるコンデンサを開発中であるが、誘電体膜とな
るセラミックシ一ト22を積層する場合に比較して、誘
電体膜が形成されたSi基板を積層する場合には、Si
基板も内部電極として機能することから、第3図に示す
ような積層構造でコンデンサを構成することはできなか
った。Under these circumstances, the present inventors are developing a capacitor that can increase the capacitance by laminating Si substrates with a dielectric film formed on the surface, but the Compared to the case of stacking sheets 22, when stacking Si substrates on which dielectric films are formed, Si
Since the substrate also functions as an internal electrode, it was not possible to construct a capacitor with a laminated structure as shown in FIG.
発明の目的
本発明は、このような実情に鑑みてなされ、電気容量が
大きく、かつ耐電圧性に優れたコンデンサおよびその製
造方法を提供することを目的とする。OBJECTS OF THE INVENTION The present invention was made in view of the above circumstances, and an object of the present invention is to provide a capacitor having a large capacitance and excellent voltage resistance, and a method for manufacturing the same.
発明の概要
このような目的を達戊するために、本発明に係るコンデ
ンサは、複数のSi基板と、各Si基板の表裏面に形成
されたケイ素酸化物からなる誘電体膜とを有し、前記誘
電体膜が形成された31基板が内部電極を介して膜厚方
向に積層してあり、各Si基板の一側端面は絶縁部材で
被覆してあり、前記絶縁部材で被覆してある側の各内部
電極の一側端面には、第1外部電極が接続してあり、絶
縁部材で被覆してない側の各Si基板の一側端面には、
第2外部電極が接続してあり、第2外部電極と内部電極
の側端部との間には隙間空間が形戊してあることを特徴
としている。Summary of the Invention In order to achieve the above object, a capacitor according to the present invention includes a plurality of Si substrates and a dielectric film made of silicon oxide formed on the front and back surfaces of each Si substrate, Thirty-one substrates on which the dielectric film is formed are stacked in the film thickness direction via internal electrodes, one end surface of each Si substrate is covered with an insulating member, and the side covered with the insulating member is A first external electrode is connected to one side end surface of each internal electrode, and a first external electrode is connected to one side end surface of each Si substrate not covered with an insulating member.
A second external electrode is connected thereto, and a gap space is formed between the second external electrode and the side end portion of the internal electrode.
本発明では、前記Si基板の比抵抗が0.1Ω・cm以
下であることが好ましい。In the present invention, it is preferable that the specific resistance of the Si substrate is 0.1 Ω·cm or less.
本発明では、複数のSi基仮相互を電気的に接続して電
極の一部とする電極構造を有しているため、従来のよう
に基板上に下部電極と誘電体膜とをこの順で積層する必
要がなく、誘電体膜を焼成する際に生じる虞のある下部
電極の劣化の心配がなくなる。また本発明では、Si基
仮の表裏面に形成されたケイ素酸化物を誘電体膜として
用いていることから、誘電体膜とSi基板との密着性が
向上すると共に、誘電体膜のクラック等を防止すること
が可能である。しかも、Si基板を熱酸化して得られる
ケイ素酸化物膜は、比誘電率が4以下と小さいが、膜が
緻密で耐電圧も高いことから、誘電体膜の耐電圧性も向
上する。さらに本発明では、Si基板の片側表面のみで
なく、裏側表面にもケイ素酸化物膜層を設けており、こ
れを誘電体膜として利用しており、しかもこのようにケ
イ素酸化物層が形成されたSi基板を内部電極を介して
積層しているので、Si基板の片面だけに誘電体膜を形
成する場合に比較して、電気容量が複数倍になる。Since the present invention has an electrode structure in which a plurality of Si-based bases are electrically connected to each other to form part of the electrode, the lower electrode and the dielectric film are placed on the substrate in this order as in the conventional method. There is no need to stack layers, and there is no need to worry about deterioration of the lower electrode that may occur when firing the dielectric film. In addition, in the present invention, since silicon oxide formed on the front and back surfaces of the Si-based temporary is used as the dielectric film, the adhesion between the dielectric film and the Si substrate is improved, and cracks in the dielectric film can be prevented. It is possible to prevent this. Furthermore, although the silicon oxide film obtained by thermally oxidizing a Si substrate has a small dielectric constant of 4 or less, the film is dense and has a high withstand voltage, so that the withstand voltage property of the dielectric film is also improved. Furthermore, in the present invention, a silicon oxide film layer is provided not only on one side surface of the Si substrate but also on the back surface, and this is used as a dielectric film, and the silicon oxide layer is formed in this way. Since the Si substrates are laminated via internal electrodes, the capacitance is multiplied compared to the case where a dielectric film is formed on only one side of the Si substrates.
また、本発明に係るコンデンサの製造方法は、複数のS
i基板の表裏面にケイ素酸化物から成る誘電体膜を形戊
し、これら誘電体膜が形戊されたSi基板相互を、間に
内部電極が介在されるように、しかも内部電極の一側端
部に隙間空間が形成されるように積層し、Si基仮の一
側端面を電気泳動法により、絶縁部材で被覆し、その後
、絶縁部材で被覆してある側の各Si基板の一側端面に
、これらを接続する第1外部電極を形成すると共に、前
記内部電極の一側端部に形戊された隙間空間側の各S1
基板の一側端面に、各Si基板を接続する第2外部電極
を形戊することを特徴としている。Further, the method for manufacturing a capacitor according to the present invention includes
Dielectric films made of silicon oxide are formed on the front and back surfaces of the i-substrate, and the Si substrates on which these dielectric films are formed are connected to each other such that an internal electrode is interposed between them, and one side of the internal electrode is interposed between the Si substrates. The Si substrates are laminated so that a gap is formed at the ends, one end surface of the Si substrate is coated with an insulating material by electrophoresis, and then one side of each Si substrate is coated with the insulating material. A first external electrode connecting these is formed on the end face, and each S1 on the side of the gap space formed at one end of the internal electrode is formed.
A feature is that a second external electrode is formed on one end surface of the substrate to connect each Si substrate.
このような本発明に係るコンデンサの製造方法によれば
、内部電極の一側端部に隙間空間が形成してあると共に
、電気泳動法により、Si基板の一側端面を絶縁部材で
被覆してあるため、各内部電極を共通の第1外部電極で
接続する工程が容易となると共に、各Si基板を共通の
第2外部電極で接続する工程が容易となる。なお、電気
泳動法の応用としては、電歪効果素子の端面の絶縁に用
いた特開昭59−17516号がある。According to the method for manufacturing a capacitor according to the present invention, a gap space is formed at one end of the internal electrode, and one end surface of the Si substrate is coated with an insulating member by electrophoresis. Therefore, the process of connecting each internal electrode with a common first external electrode becomes easy, and the process of connecting each Si substrate with a common second external electrode becomes easy. As an application of the electrophoresis method, there is Japanese Patent Application Laid-Open No. 17516/1983, which was used to insulate the end face of an electrostrictive element.
発明の具体的説明
以下、本発明に係るコンデンサについて具体的に説明す
る。DETAILED DESCRIPTION OF THE INVENTION The capacitor according to the present invention will be specifically described below.
第1図は本発明に係るコンデンサの一側を示す断面図、
第2図は同実施例に係るコンデンサの製造方法を示す斜
視図である。FIG. 1 is a sectional view showing one side of a capacitor according to the present invention;
FIG. 2 is a perspective view showing a method of manufacturing a capacitor according to the same embodiment.
第1図に示すように、本発明に係るコンデンサ2は、複
数のSi基板4と、各Si基板4の表裏面に形成された
誘電体膜6とを有する。本発明では、このような誘電体
膜6が形成されたSi基板4が内部電極8を介して膜厚
方向に積層して設けられている。As shown in FIG. 1, a capacitor 2 according to the present invention includes a plurality of Si substrates 4 and a dielectric film 6 formed on the front and back surfaces of each Si substrate 4. In the present invention, Si substrates 4 on which such dielectric films 6 are formed are stacked in the film thickness direction with internal electrodes 8 interposed therebetween.
内部電極8は、重ね合わされたSi基板4の誘電体膜6
間に介在されている。しかも各内部電極8の一側端部8
aには、隙間空間9か形成されるようになっている。The internal electrode 8 is a dielectric film 6 of the superimposed Si substrates 4.
is interposed between. Moreover, one end 8 of each internal electrode 8
A gap space 9 is formed in a.
各Si基板4の一側端面4aは、絶縁部材1oで被覆し
てある。One end surface 4a of each Si substrate 4 is covered with an insulating member 1o.
絶縁部材10て被覆してある側の内部電極8の他の一側
端而8bには、第1外部電極14が、各内部電極8を電
気的に接続するように、絶縁部材10の上から形成して
ある。また、絶縁部材10で被覆されてない側であり、
隙間空間9が形成された側の各Si基板4の一側端面4
bには、第2外部電極16が、各31基板4を電気的に
接続するように形戊してある。本発明では、Si基板4
も内部電極として機能する。On the other end 8b of the internal electrode 8 on the side coated with the insulating member 10, a first external electrode 14 is inserted from above the insulating member 10 so as to electrically connect each internal electrode 8. It has been formed. Also, it is the side not covered with the insulating member 10,
One side end surface 4 of each Si substrate 4 on the side where the gap space 9 is formed
In b, a second external electrode 16 is formed to electrically connect each of the 31 substrates 4. In the present invention, the Si substrate 4
also functions as an internal electrode.
誘電体膜6は、ケイ素酸化物からなり、好ましくはSi
基板4を熱酸化する事により得られる。The dielectric film 6 is made of silicon oxide, preferably Si
It is obtained by thermally oxidizing the substrate 4.
ただし、蒸着やスパッタリングなどの他の方法によって
誘電体膜6を形成するようにしてもよい。However, the dielectric film 6 may be formed by other methods such as vapor deposition or sputtering.
このような誘電体膜6の膜厚は、好ましくは50λ〜1
0μm1さらに好ましくは100人〜5μmである。な
お、ケイ素酸化物は主としてS iO 2から成るが、
SiO等を含んでも良い。The thickness of such dielectric film 6 is preferably 50λ to 1
0 μm1, more preferably 100 to 5 μm. Note that silicon oxide mainly consists of SiO2,
It may also contain SiO or the like.
内部電極8および第1,第2外部電極14,16として
は、Ag,Cu,Au,/l ,P tsPd等の電極
が用いられ得る。これら内部電極8および第1、第2外
部電極14.16を誘電体膜6の表面および積層体の側
面に形成するための手段としては、スバッタ法、蒸着法
、ペースト塗布等が用いられる。電極8の厚さは、0.
1μm〜50μmであることが好ましい。また、外部電
極14.16の厚さは、0.1μm以上であることが好
ましい。As the internal electrode 8 and the first and second external electrodes 14 and 16, electrodes such as Ag, Cu, Au, /l 2 , PtsPd, etc. can be used. As means for forming the internal electrodes 8 and the first and second external electrodes 14 and 16 on the surface of the dielectric film 6 and the side surfaces of the laminate, a spatter method, a vapor deposition method, a paste coating, etc. are used. The thickness of the electrode 8 is 0.
It is preferable that it is 1 micrometer - 50 micrometers. Furthermore, the thickness of the external electrodes 14.16 is preferably 0.1 μm or more.
Si基板4は、比抵抗が0.1Ω・cm以下であること
が好ましい。Si基板それ自体で比抵抗が小さいと、S
i基板4も内部電極として機能するからである。Si基
板4としては、具体的には、シリコンウェー八等が用い
られる。シリコンウエーハとしては、ノンドープ型、P
型もしくはN型等あらゆるタイプの市販品をそのまま使
うことが可能である。基板4の厚さは、特に限定されな
いが、電極として抵抗値が大きくならないように決定さ
れることが好ましいと共に、コンデンサ全体に適度な剛
性を付与するに十分な厚さを有することか好ましく、一
般的には、0.1μm以上の厚みを有することが好まし
い。基板4は、必ずしも平板形状に限定されない。基板
が平板形状以外である場合には、その上に形成される誘
電体膜および電極部分も、基板形状に沿った形状となる
。It is preferable that the Si substrate 4 has a specific resistance of 0.1 Ω·cm or less. If the specific resistance of the Si substrate itself is small, S
This is because the i-substrate 4 also functions as an internal electrode. Specifically, as the Si substrate 4, a silicon wafer or the like is used. The silicon wafer is non-doped, P
It is possible to use commercially available products of any type, such as type or N type, as they are. The thickness of the substrate 4 is not particularly limited, but it is preferable that it is determined so that the resistance value does not become large as an electrode, and it is also preferable that it has a thickness sufficient to impart appropriate rigidity to the entire capacitor. Specifically, it is preferable to have a thickness of 0.1 μm or more. The substrate 4 is not necessarily limited to a flat plate shape. When the substrate has a shape other than a flat plate, the dielectric film and electrode portion formed thereon also have a shape that follows the shape of the substrate.
絶縁部材10を構成する材質としては、ガラス、マイ力
、エポキシ樹脂、ポリイミド樹脂、フェノール樹脂等が
例示される。これら絶縁部材10を、Si基板4もしく
はSi基板4の一側端面に形戊するための手段としては
、後述するような電気泳動法が好ましいが、これに限ら
ず、他の手段によって形成しても良い。Examples of the material constituting the insulating member 10 include glass, aluminum, epoxy resin, polyimide resin, and phenol resin. The means for forming these insulating members 10 on the Si substrate 4 or one end surface of the Si substrate 4 is preferably an electrophoresis method as described below, but is not limited to this, and may be formed by other means. Also good.
次に本発明に係るコンデンサ2の製造方法について説明
する。Next, a method for manufacturing the capacitor 2 according to the present invention will be explained.
まず、所定の大きさのSi基板4を準備し、このSi基
板4を酸化囲気下で加熱する。加熱温度は、好ましくは
300〜1300℃、さらに好ましくは700〜110
0℃である。加熱時間は、特に限定されないが、好まし
くは3分間〜300分間、さらに好ましくは10分間〜
180分間である。このような加熱処理によって、Si
基板4の表裏面に所定膜厚のケイ素酸化物膜からなる誘
電体膜6が形成される。First, a Si substrate 4 of a predetermined size is prepared, and this Si substrate 4 is heated under an oxidizing atmosphere. The heating temperature is preferably 300 to 1300°C, more preferably 700 to 110°C.
It is 0°C. The heating time is not particularly limited, but is preferably 3 minutes to 300 minutes, more preferably 10 minutes to 300 minutes.
The duration is 180 minutes. Through such heat treatment, Si
A dielectric film 6 made of a silicon oxide film having a predetermined thickness is formed on the front and back surfaces of the substrate 4 .
その後、この基板4における誘電体膜6の表面に、内部
電極8となるペースト状の電極部分8Cを、たとえば第
2図に示すように、短手方向一側端部8aおよび長手方
向一側端部8dに隙間空間9.11が形成されるように
塗布形成する。次に、このように表面にペースト状の電
極部分8Cが形成されたSi基板4を複数枚重ね合わせ
、加熱して、Si基板4相互間て重ね合わされたペース
ト状の電極部分8Cを一体化させる。その後、適当な大
きさに切断して第2図に示すようなブロック1つを準備
する。Thereafter, a paste-like electrode portion 8C, which will become the internal electrode 8, is placed on the surface of the dielectric film 6 of this substrate 4, for example, as shown in FIG. The coating is formed so that a gap space 9.11 is formed in the portion 8d. Next, a plurality of Si substrates 4 having paste-like electrode portions 8C formed on their surfaces are stacked one on top of the other and heated to integrate the pasted electrode portions 8C between the Si substrates 4. . Thereafter, it is cut into an appropriate size to prepare one block as shown in FIG.
その後、電極部分8Cが形成されていない側のブロック
1つの端面19aを研磨してケイ素酸化物膜を除去した
後に、金属、ペースト等で仮電極18を形成し、これに
より、Si基板4相互を電気的に導通状態とする。Thereafter, after polishing the end surface 19a of one block on the side where the electrode portion 8C is not formed to remove the silicon oxide film, a temporary electrode 18 is formed with metal, paste, etc., and thereby the Si substrates 4 are connected to each other. Become electrically conductive.
次に、このようなブロック19における隙間空間9が形
成されている側の側面19cにレジスト膜を設け、これ
を電気泳動に用いる波に漬けて、電気泳動法を行ない、
絶縁部材1oをSi基板4の一側端面4aに形成する。Next, a resist film is provided on the side surface 19c of the block 19 on the side where the gap space 9 is formed, and this is soaked in waves used for electrophoresis to perform electrophoresis,
An insulating member 1o is formed on one end surface 4a of the Si substrate 4.
電気泳動法とは、液中に対向電極板とサンプルと浸たし
、これらの間に電圧を印加して、液中の絶縁粒子を帯電
させて電界によってサンプルに付着させる技術である。Electrophoresis is a technique in which a counter electrode plate and a sample are immersed in a liquid, a voltage is applied between them, and insulating particles in the liquid are charged and attached to the sample by an electric field.
本発明では、ブロック19におけるSi基板4が、上記
サンプルとなる。In the present invention, the Si substrate 4 in block 19 serves as the sample.
本発明では、Si基板4の一側端面に絶縁部材を形成す
るために、ブロック19に設けられた一方の仮電極18
を陰極とし、ブロック1つと共に液中に浸された対向電
極を陽極とし、これらの間に電圧を加えれば良い。そう
すれば、レジスト膜で被われていない側のSi基板4の
一側端面に液中の絶縁粒子が析出し、その一側端面をそ
れぞれ第1絶縁部材10で被うことになる。In the present invention, in order to form an insulating member on one side end surface of the Si substrate 4, one temporary electrode 18 provided on the block 19
is used as a cathode, and a counter electrode immersed in the liquid together with one block is used as an anode, and a voltage can be applied between them. In this way, insulating particles in the liquid will be deposited on one side end surface of the Si substrate 4 that is not covered with the resist film, and each of the one side end surfaces will be covered with the first insulating member 10.
電気泳動法より形成される絶縁部材1oの厚さは、好ま
しくは0、1μm〜100μm1さらに好ましくは1μ
m〜100μmである。このような厚さになるように、
仮電極と対向電極との間に印加される電圧および時間は
決定される。印加される電圧は、好ましくは10〜20
0V程度である。また、印加時間は、好ましくは1分〜
30分である。The thickness of the insulating member 1o formed by electrophoresis is preferably 0.1 μm to 100 μm, and more preferably 1 μm.
m to 100 μm. To make it as thick as this,
The voltage and time applied between the temporary electrode and the counter electrode are determined. The applied voltage is preferably 10 to 20
It is about 0V. In addition, the application time is preferably 1 minute to
It is 30 minutes.
電気泳動法に用いられる波としては、絶縁部材となる絶
縁粒子を含む懸濁ir&が例示される。絶縁粒子として
は、ガラス粉末等を用いることかできる。また懸濁液に
は、ヨウ素等の電解質の役割を果たす物質が含まれ、ガ
ラス粉末等の絶縁粒子をプラスに帯電させるようになっ
ている。このような懸濁液としては、具体的には、絶縁
粒子を入れたエタノールおよびヨウ素系エタノール溶液
を混合した液が例示される。An example of the wave used in the electrophoresis method is suspended IR& containing insulating particles that serve as an insulating member. Glass powder or the like can be used as the insulating particles. The suspension also contains a substance such as iodine that acts as an electrolyte, and is designed to positively charge insulating particles such as glass powder. A specific example of such a suspension is a mixture of ethanol containing insulating particles and an iodine-based ethanol solution.
このような電気泳動広よれば、?&中に含まれる絶縁粒
子は、電界が印加された部分(Si基板の側端面)にの
み析出し、他の部分に析出しないことから、目的とする
部位に都合良く絶縁部材の被覆層を形成することができ
る。According to such electrophoresis wide? & The insulating particles contained in it precipitate only on the part where the electric field is applied (the side end surface of the Si substrate) and not on other parts, so it conveniently forms a coating layer of the insulating member on the target part. can do.
このようにして、絶縁部材10が形戊された後には、ブ
ロック19を長平方向と直角方向に切断して、所定の大
きさのチップを得る。このチップにおける絶縁部材10
がそれぞれ形成された側面および隙間空間9が形成され
た側面に金属ペーストなどを塗布することにより、個々
のSi基板4または内部電極8をそれぞれ接続する第1
,第2外部電極14.16を形成し、コンデンサ2を完
戊させる。After the insulating member 10 is shaped in this manner, the block 19 is cut in a direction perpendicular to the elongated direction to obtain chips of a predetermined size. Insulating member 10 in this chip
By applying a metal paste or the like to the side surfaces on which are formed the respective Si substrates 4 or the internal electrodes 8, the first
, second external electrodes 14 and 16 are formed, and the capacitor 2 is completely discharged.
このようなコンデンサ2では、基板4の表裏面に形成さ
れたケイ素酸化物膜を誘電体膜6として利用し、しかも
Si基板4を重ね合わせるようにしているので、コンデ
ンサ容量が向上するとともに、耐電圧特性も向上する。In such a capacitor 2, the silicon oxide films formed on the front and back surfaces of the substrate 4 are used as the dielectric film 6, and the Si substrates 4 are overlapped, so that the capacitor capacity is improved and the durability is improved. Voltage characteristics are also improved.
なお、本発明では、コンデンサ2を製造するための手段
は、上述した実施例に限定されず、種々に改変すること
が可能である。In addition, in the present invention, the means for manufacturing the capacitor 2 is not limited to the above-described embodiment, and can be variously modified.
発明の効果
以上説明してきたように、本発明では、複数のSi基板
相互を電気的に接続して第2電極とする電極構造を有し
ているため、従来のように基板上に下部電極と誘電体膜
とをこの順で積層する必要がなく、誘電体膜を焼戊する
際に生じる虞のある下部電極の劣化の心配がなくなる。Effects of the Invention As explained above, the present invention has an electrode structure in which a plurality of Si substrates are electrically connected to each other to form a second electrode. There is no need to stack the dielectric film in this order, and there is no need to worry about deterioration of the lower electrode that may occur when burning the dielectric film.
また本発明では、ケイ素基板の表裏面に形成されたケイ
素酸化物を誘電体膜として用いていることから、誘電体
膜とケーf素基板との密着性が向上すると共に、誘電体
膜のクラック等を防止することが可能である。In addition, in the present invention, since silicon oxide formed on the front and back surfaces of the silicon substrate is used as the dielectric film, the adhesion between the dielectric film and the silicon substrate is improved, and cracks in the dielectric film can be prevented. etc. can be prevented.
しかも、ケイ素基板を熱酸化して得られるケイ素酸化物
膜は、比誘電率が4以下と小さいが、膜か緻密で耐電圧
も高いことから、誘電体膜の耐電圧性も向上する。さら
に本発明では、Si基板の片側表面のみでなく、裏側表
面にもケイ素酸化物膜層を設けており、これを誘電体膜
として利用しており、しかもこのようにケイ素酸化物層
が形成されたSi基板を内部電極を介して積層している
ので、Si基板の片面だけに誘電体膜を形成する場合に
比較して、電気容量が複数数倍になる。Furthermore, although the silicon oxide film obtained by thermally oxidizing a silicon substrate has a small dielectric constant of 4 or less, the film is dense and has a high withstand voltage, so the withstand voltage property of the dielectric film is also improved. Furthermore, in the present invention, a silicon oxide film layer is provided not only on one side surface of the Si substrate but also on the back surface, and this is used as a dielectric film, and the silicon oxide layer is formed in this way. Since the Si substrates are stacked via internal electrodes, the capacitance is several times higher than when a dielectric film is formed on only one side of the Si substrates.
また本発明に係るコンデンサの製造方法によれば、電気
泳動法により、Si基板の一側端面を絶縁部材で被覆す
ると共に、内部電極の一側端部に隙間空間9を形成して
あるため、各内部電極を共通の第1外部電極で接続する
工程が容易となると共に、各Si基板を共通の第2外部
電極で接続する工程が容易となる。Further, according to the capacitor manufacturing method according to the present invention, one end surface of the Si substrate is coated with an insulating member by electrophoresis, and a gap space 9 is formed at one end of the internal electrode. The process of connecting each internal electrode with a common first external electrode becomes easy, and the process of connecting each Si substrate with a common second external electrode becomes easy.
[実施例]
以下、本発明をさらに具体的な実施例に基づき説明する
が、本発明は、これら実施例に限定されない。[Examples] The present invention will be described below based on more specific examples, but the present invention is not limited to these examples.
実施例1
sbをドーブして比抵抗が0.01Ω・cmである厚さ
0.5mmのSi基板を1000”C酸素雰囲気中で1
80分間熱処理した。次に二端(第2図に示す符号r8
a,8dJ)だけ残して全面にAgペースト8cを塗布
し、これを3枚を重ねて100℃、30分で加熱乾燥し
た。これを、Agペースト8cが付いてないところが長
手方向の一端となるようにして、カッティングソーで3
IIlm幅に切断してブロック1つを作製した。モして
Agペースト8cの付いてない長手方向の一端のSiの
断面を研磨して酸化膜を除去して、その後、Agペース
トを塗布し、仮電極18を形成し、3層のSi基板4を
接続した。次に長平方向に平行な側面の一つ19cにネ
ガ型レジストを塗布し、ブロック19を電気泳動に用い
る岐に漬けた。Example 1 A 0.5 mm thick Si substrate doped with sb and having a specific resistance of 0.01 Ωcm was heated at 1000"C in an oxygen atmosphere.
Heat treatment was performed for 80 minutes. Next, the second end (symbol r8 shown in Figure 2)
Ag paste 8c was applied to the entire surface, leaving only 8 dJ), and the three sheets were stacked and dried by heating at 100° C. for 30 minutes. Cut this with a cutting saw, making sure that the part without Ag paste 8c is one end in the longitudinal direction.
One block was produced by cutting to a width of IIlm. The oxide film is removed by polishing the Si cross section at one longitudinal end where the Ag paste 8c is not attached, and then the Ag paste is applied to form the temporary electrode 18, and the three-layer Si substrate 4 connected. Next, a negative resist was applied to one of the side surfaces 19c parallel to the longitudinal direction, and the block 19 was immersed in a tube used for electrophoresis.
電気泳動法用いる液は、ホウヶイ酸亜鉛系ガラス粉末(
30g)、エタノール290ml5%ヨウ素エタノール
(10m1)を混合した。この液の中でSi基板4を陰
極に、pt板(図示せず)を陽極にして通電した。15
Vの電圧を180秒間印加した。次にレジスト剥離液で
レジストを除去した後、ブロックを500℃、30分間
加熱した。The liquid used in the electrophoresis method is zinc borosilicate glass powder (
(30 g), 290 ml of ethanol and 5% iodine ethanol (10 ml) were mixed. In this solution, electricity was applied using the Si substrate 4 as a cathode and the PT plate (not shown) as an anode. 15
A voltage of V was applied for 180 seconds. Next, after removing the resist with a resist stripping solution, the block was heated at 500° C. for 30 minutes.
その後、このブロックを長手方向に直角に切断して31
8I1角のチップを得た。そして絶縁物の析出した側面
および隙間空間9側の側面にAgペーストをそれぞれ塗
布して乾燥し、対向する2つの外部電極を形成した。After that, this block was cut at right angles in the longitudinal direction.
A chip of 8I1 square was obtained. Then, Ag paste was applied to the side surface on which the insulator was deposited and the side surface on the gap space 9 side, respectively, and dried to form two opposing external electrodes.
このようにして得られたコンデンサの特性をLCRメー
タを用いて測定した結果を次に示す。The results of measuring the characteristics of the capacitor thus obtained using an LCR meter are shown below.
測定周波数I M H zで容量が3nF,電気容量の
温度係数が80℃〜−20℃で30ppIIl/℃であ
った。また定電圧で抵抗値を測定したら20VでIOC
Ω以上であった。The capacitance was 3 nF at a measurement frequency of 1 MHz, and the temperature coefficient of capacitance was 30 ppll/°C at a temperature of 80°C to -20°C. Also, when I measured the resistance value at constant voltage, IOC was found at 20V.
It was more than Ω.
第1図は本発明に係るコンデンサの一側を示す断面図、
第2図は同実施例に係るコンデンサの製造方法を示す斜
視図、第3図は従来のセラミックコンデンサの断面図で
ある。
1FIG. 1 is a sectional view showing one side of a capacitor according to the present invention;
FIG. 2 is a perspective view showing a method of manufacturing a capacitor according to the same embodiment, and FIG. 3 is a sectional view of a conventional ceramic capacitor. 1
Claims (1)
たケイ素酸化物からなる誘電体膜とを有し、前記誘電体
膜が形成されたSi基板が内部電極を介して膜厚方向に
積層してあり、各Si基板の一側端面は絶縁部材で被覆
してあり、前記絶縁部材で被覆してある側の各内部電極
の一側端面には、第1外部電極が接続してあり、絶縁部
材で被覆してない側の各Si基板の一側端面には、第2
外部電極が接続してあり、第2外部電極と内部電極の側
端部との間には隙間空間が形成してあるコンデンサ。 2)前記Si基板の比抵抗が0.1Ω・cm以下である
ことを特徴とするコンデンサ。 3)複数のSi基板の表裏面にケイ素酸化物から成る誘
電体膜を形成し、これら誘電体膜が形成されたSi基板
相互を、間に内部電極が介在されるように、しかも内部
電極の一側端部に隙間空間が形成されるように積層し、
Si基板の一側端面を電気泳動法により、絶縁部材で被
覆し、その後、絶縁部材で被覆してある側の各Si基板
の一側端面に、これらを接続する第1外部電極を形成す
ると共に、前記内部電極の一側端部に形成された隙間空
間側の各Si基板の一側端面に、各Si基板を接続する
第2外部電極を形成することを特徴とするコンデンサの
製造方法。[Claims] 1) It has a plurality of Si substrates and a dielectric film made of silicon oxide formed on the front and back surfaces of each Si substrate, and the Si substrate on which the dielectric film is formed is used as an internal electrode. are laminated in the film thickness direction with the Si substrates interposed therebetween, one end surface of each Si substrate is covered with an insulating member, and one end surface of each internal electrode on the side covered with the insulating member is coated with a first Si substrate. On one side end surface of each Si substrate to which the external electrode is connected and which is not covered with an insulating member, a second
A capacitor to which an external electrode is connected, and a gap space is formed between the second external electrode and the side end of the internal electrode. 2) A capacitor characterized in that the specific resistance of the Si substrate is 0.1 Ω·cm or less. 3) A dielectric film made of silicon oxide is formed on the front and back surfaces of a plurality of Si substrates, and the Si substrates on which the dielectric films are formed are separated so that an internal electrode is interposed between them. Laminated so that a gap space is formed at one end,
One side end surface of the Si substrate is coated with an insulating member by electrophoresis, and then a first external electrode is formed on one side end surface of each Si substrate on the side covered with the insulating member to connect them. . A method for manufacturing a capacitor, comprising: forming a second external electrode for connecting each Si substrate on one end surface of each Si substrate on the side of the gap formed at one end of the internal electrode.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16006789A JPH0324710A (en) | 1989-06-22 | 1989-06-22 | Capacitor and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16006789A JPH0324710A (en) | 1989-06-22 | 1989-06-22 | Capacitor and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0324710A true JPH0324710A (en) | 1991-02-01 |
Family
ID=15707179
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16006789A Pending JPH0324710A (en) | 1989-06-22 | 1989-06-22 | Capacitor and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0324710A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007099707A1 (en) | 2006-02-28 | 2007-09-07 | Temco Japan Co., Ltd. | Glasses type sound/communication device |
-
1989
- 1989-06-22 JP JP16006789A patent/JPH0324710A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007099707A1 (en) | 2006-02-28 | 2007-09-07 | Temco Japan Co., Ltd. | Glasses type sound/communication device |
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