JPH03189569A - Voltage measuring device - Google Patents

Abstract

PURPOSE:To enable an accurate measurement for the voltage of AC signal in a short time by detecting a zerocross point of the AC source signal, starting the operation in response to the detected signal, and holding the peak voltage of rectified signal from a rectification means. CONSTITUTION:The AC signal 101 which is the object to be measured, is inputted to a rectification circuit 1 and the rectified signal 104 outputted therefrom is inputted to a peak hold circuit 6. The operation of circuit 6 is started at the rise of a zerocross point detecting signal 109 from a zerocross point detecting circuit 7. The start of operation for this circuit 6 is made with synchronizing to the zerocross point of AC source signal 107. Then, the peak voltage of first rectified signal 104 after the start of operation is held by the circuit 6. This held peak voltage is subjected to make an A/D conversion 3 as the output signal of circuit 6 and outputted to a microcomputer 4. The digital data are recognized as the voltage measuring value of AC signal 101 by the microcomputer 4.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a device for determining the voltage of an alternating current signal by /111.

(Prior Art) As shown in FIG. 3, in a conventional device of this type, an AC signal to be measured 10 is rectified by a rectifier circuit 1, passed through a smoothing circuit 2, and converted into a digital signal by an A/D converter 3. The measurement is performed by converting it to . By the way, the AC signal 101 usually has an AC power waveform (HAM) 102 as shown in FIG. 4A.
are superimposed, interfering with accurate measurement. Therefore, in order to eliminate the influence of this hum, the measurement is performed in synchronization with the zero-crossing point of the power supply waveform using the synchronization circuit 5.

(Problem to be Solved by the Invention) In this conventional device, the AC signal 101 is passed through the rectifier circuit 1 and the smoothing circuit 2 to be converted into the DC smoothed signal 103, so that the DC signal 103 reaches a steady state. It takes some time. To explain this using the waveform diagram in FIG. 4B, the DC smoothed signal 103 represented by the solid line is the AC signal 10
1 gradually rises from the input start time to, and reaches time tl.
The steady waveform shown by the dashed line is reached at . Therefore, in the measurement of intermittent AC signals, if the measurement is performed at point b in Figure 4B, the measured value will be accurate, but if it is performed at point a, it will be inaccurate. However, it is difficult to complete measurements in a short period of time because it is not known whether accurate measurement values have been obtained and measurements must be repeated multiple times.

Therefore, an object of the present invention is to enable accurate voltage measurement of intermittent alternating current signals in a short time.

[Structure of the invention]

(Means for Solving the Problems) The present invention provides a rectifier that receives an AC signal to be measured and outputs a rectified signal obtained by rectifying the AC signal to be measured, and a rectifier that rectifies the AC signal to be measured and rectifies the AC signal to be measured. Zero-crossing point detection means receives a certain AC power signal, detects the zero-crossing point of this AC power signal, and issues a zero-crossing point detection signal; A voltage measuring device is provided that has a peak hold means for holding a voltage and a measured value determining means for determining a voltage measurement value of an AC signal to be measured from the peak voltage held by the peak hold means.

(Function) According to the above configuration, the peak voltage of the first rectified signal after the zero-crossing point of the AC power signal is held, and the voltage measurement value of the AC signal to be measured is determined from this peak voltage.

(Example) Examples will be explained below.

FIG. 1 is a block diagram showing the configuration of an embodiment of a voltage measuring device according to the present invention, and FIG. 2 is a signal waveform diagram of the main parts of this embodiment.

In FIG. 1, an AC signal 101 (FIG. 2A) to be measured is input to a rectifier circuit 1, and a rectified signal 104 (FIG. 2B) output from the rectifier circuit 1 is input to a peak hold circuit 6. The peak hold circuit 6 starts operating at the rise of the zero cross point detection signal 109 from the zero cross point detection circuit 7.

As will be described later, the peak hold circuit 6 starts operating in synchronization with the zero cross point of the AC power signal 107 (FIG. 2E). Then, the peak hold circuit 6 holds the peak voltage of the first rectified signal 104 (FIG. 2B) after the start of operation. The held peak voltage is sent to the A/D converter 3 as an output signal 111 of the peak hold circuit 6, where it is converted into digital data.
It is input to the microcomputer 4 as a voltage measurement value of the AC signal 101.

This example will be explained in more detail below.

The zero cross point detection circuit 7 receives the AC power signal 107 (second
It has a photocoupler 8 which receives the input signal (E) in FIG.

The photocoupler 8 includes bare light emitting diodes (not shown) connected in antiparallel and driven by an AC power signal 107, and a phototransistor (not shown) photocoupled thereto.
and has. Since the light emitting diodes of the pair stop emitting light at every zero-crossing point of the AC power signal 107 (FIG. 2E), the phototransistor generates a pulse signal 108 (FIG. 2F) at every zero-crossing point. This pulse signal 108
is applied to the D-flip-flop 9 as a clock pulse. In other words, the flip-flop 9 receives the AC power signal 1
A clock pulse 108 is received every 0.07 zero crossing points (FIG. 2E, F).

This flip-flop 9 has NO on its reset terminal R.
It receives the output signal of the R circuit 10, and this NOR circuit 1
The 0 input signals are the measurement request signal 105 (FIG. 2C) from the microcomputer 4 and the signal presence signal 106 (FIG. 2D) from the comparator 11. Therefore, when both signals 105 and 106 are at high level, the flip-flop 9 receives a high level signal at the reset terminal R and is released from the reset state, and the clock pulse 10
8 (FIG. 2F).

Here, the measurement request signal 105 (FIG. 2C) is kept at a high level while the microcomputer 4 requests execution of the DI determination. On the other hand, there is a signal 106 (Fig. 2D
) is the rectified signal 104 (
When the voltage level in FIG. 2B) becomes higher than the predetermined reference voltage V ref (time t1 in FIG. 2), that is, when input of the AC signal 101 having a significant voltage level starts, it is set to high level. . Therefore, when a measurement execution request is issued from the microcomputer 4 and a significant AC signal 101 is started (time tl in FIG. 2), the flip-flop 9 is released from the reset state.

By the way, when the signal present signal 106 is at a high level, it may temporarily drop to a low level due to the pulsation of the rectified signal 104. Therefore, in order to remove such level fluctuations and maintain the signal present signal 106 at a stable high level,
An integrating circuit 12 consisting of a resistor R and a capacitor C is inserted between the comparator 11 and the NOR circuit 10. Note that the positions of the integrating circuit 12 and the comparator 11 may be exchanged.

As described above, when a measurement execution request is issued from the microcomputer 4 and a significant AC signal 101 is started (time tl in FIG. 2), the reset state of the D-flip-flop 9 is released. Then, the flip-flop 9 outputs the logic level of the data terminal to the output terminal Q in synchronization with the first rise of the clock pulse 108 from the photocoupler 8 after the reset is released (time t2 in FIG. 2). Since a high-level voltage Vcc is applied to the data terminal, the output signal 109 of the flop-flop 9 rises from a low level to a high level at the rise of the clock pulse 108. That is, the output signal 109 of the flip-flop 9 rises to a high level almost in synchronization with the first zero-crossing point of the AC power signal 102 after the reset state is released (point X in FIG. 2). This signal 109 rising to a high level is applied as the zero-cross point detection signal to the reset terminal R of the D-flip-flop 13 in the peak hold circuit 6 to release the reset state.

In the peak hold circuit 6, the sample hold circuit 1
A comparator 15 compares the rectified signal 104 (FIG. 2B), which is the input signal of the sample-and-hold circuit 14, with the output signal 111 of the sample-and-hold circuit 14.

The sample hold circuit 14 is in a sample state when the level of its sample pulse terminal Sp is low level.

In this state, the rectified signal 104 (FIG. 2B) passes through the sample and hold circuit 14 and appears as the output signal 111. However, the output signal 11
1 is slightly delayed from the rectified signal 104. Therefore, when the level of the rectified signal 104 increases, the output signal 111 has a slightly lower level than the rectified signal 104, and when the level decreases, the output signal 111 has a slightly higher level. Therefore, comparator 15
The output signal 112 is at a low level when the level of the rectified signal 104 (FIG. 2B) rises, and rises from a low level to a high level at the peak when the rise changes to a fall. The signal 112 rising at this peak is applied to the clock pulse terminal Cp of the D-flip-flop 13.

As described above, the reset release of the flop flop 13 occurs at the zero cross point of the first AC power signal 107 (FIG. 2E X point). After this reset is released, at the first peak of the rectified signal 104 (point Y in FIG. 2B), the output signal 112 of the comparator 15 rises from low level to high level, and in response, the flop 1
3 is a high level signal V applied to the data terminal
is output from output terminal Q. This C high level signal 110 is applied to the sampling pulse terminal Sp of the sample and hold circuit 14, and this sample and hold circuit 14 is switched from the sample state to the hold state.

As a result, the sample and hold circuit 14 holds the first peak voltage of the rectified signal 104 (point Y in FIG. 2B) after the zero-crossing point (point X in FIG. 2E).
This held peak voltage is converted into digital data by the A/D converter 3 and is converted into digital data by the microcomputer 4.
sent to.

The high level signal 110 is also applied to the microcomputer 4, and in response, the microcomputer 4 takes in the digital data of the peak voltage from the A/D converter 3 and converts this data into the voltage measurement value of the AC signal 101. recognized as

As described above, since the peak voltage immediately after the zero-crossing point of the AC power signal is measured, the AC signal voltage can be accurately determined with almost no influence from /1m. In addition, it does not use circuits with long transient responses such as smoothing circuits, but instead consists of circuits with fast responses such as sample-and-hold circuits, flip-flops, and comparators, so accurate measurements can be made immediately after starting input of AC signals. Therefore, it is possible to measure intermittent AC signals in a short time.

〔Effect of the invention〕

As described above, according to the present invention, the voltage of an AC signal can be measured accurately in a short time.

FIG. 4 is a block diagram showing the configuration of the measuring device, and FIG. 4 is a voltage waveform diagram of the main parts of the conventional device shown in FIG.

1... Rectifier circuit, 3... A/D converter, 4...
- Microcomputer, 6... Sample hold circuit, 7... Zero cross point detection circuit, 8... Photocoupler, 9.13... D-flip-flop, 10...
NOR circuit, ICl3... comparator, 12...
Integrating circuit, 101... AC signal, 107... AC power signal.

Claims (1)

[Claims] 1. A rectifier that receives an AC signal to be measured and outputs a rectified signal obtained by rectifying the AC signal to be measured, and an AC power supply signal that is a cause of hum superimposed on the AC signal to be measured. a zero-crossing point detection means that detects the zero-crossing point of the AC power signal and issues a zero-crossing point detection signal; A voltage measuring device comprising: a peak hold means for holding; and a measured value determining means for determining a voltage measurement value of the AC signal to be measured from the peak voltage held by the peak hold means. 2. The apparatus according to claim 1, wherein the zero-cross point detection means includes: pulse generation means that generates a pulse signal in synchronization with the zero-cross point of the AC power signal; and a logic level of the output signal in response to the pulse signal. a first flip-flop means for changing the signal, an output signal of the first flip-flop means is given to the peak hold means as the zero-crossing point detection signal, and the peak hold means receives the rectified signal as input. sample and hold means that passes the rectified signal in the sample state and holds the voltage of the rectified signal at the time of switching from the sample state to the hold state; and the input signal level and output signal of the sample and hold means. comparator means for forming a peak detection signal whose logic level changes in synchronization with the peak of the rectified signal by comparing the level of the zero-cross point detection signal from the first D-flip-flop means; a second flip-flop means that starts operating in response to a change in logic level and outputs a signal at a predetermined logic level in response to a change in logic level of the peak detection signal from the comparator means; The means is configured to hold the first peak voltage of the rectified signal after the zero-crossing point by switching from the sample state to the hold state in response to the signal of the predetermined logic level from the second flip-flop means. A voltage measuring device featuring: