JPH03153026A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH03153026A JPH03153026A JP29263789A JP29263789A JPH03153026A JP H03153026 A JPH03153026 A JP H03153026A JP 29263789 A JP29263789 A JP 29263789A JP 29263789 A JP29263789 A JP 29263789A JP H03153026 A JPH03153026 A JP H03153026A
- Authority
- JP
- Japan
- Prior art keywords
- etching
- wafer
- electrode
- high frequency
- etched
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 5
- 238000004519 manufacturing process Methods 0.000 title claims description 4
- 238000005530 etching Methods 0.000 claims abstract description 44
- 238000001312 dry etching Methods 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims abstract description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 5
- 238000001020 plasma etching Methods 0.000 description 7
- 230000001681 protective effect Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 238000005513 bias potential Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 230000004083 survival effect Effects 0.000 description 1
Landscapes
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野1
本発明は半導体装置の製造方法、特にドライエツチング
装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application 1] The present invention relates to a method for manufacturing a semiconductor device, and in particular to a dry etching apparatus.
[従来の技術]
反応室に導入したガスに高周波を印加してプラズマを発
生させエツチングを行なう装置を一般にプラズマエツチ
ング装置と呼んでいるが、この中でも平行電極のウェハ
ーの置かれた電極に高周波を印加するものをカソード型
反応性イオンエツチング装置(以下、カソード型RIE
と呼ぶ、)と呼び、ウェハーに対向する電極に高周波を
印加するものをアノード型プラズマエツチング装置(以
下、アノード型PEと呼ぶ、)と呼んでいる。カソード
型RIE (第3図)は自己バイアス電位が大きくイオ
ンが加速されやすいためエツチング速度が高く、又、垂
直に入射されるため異方性形状が得られるが、イオン入
射エネルギーが大きいためダメージが大きいという問題
がある。[Prior Art] A device that performs etching by applying high frequency waves to a gas introduced into a reaction chamber to generate plasma is generally called a plasma etching device. What is applied is a cathode type reactive ion etching device (hereinafter referred to as cathode type RIE).
An apparatus that applies a high frequency to an electrode facing the wafer is called an anode type plasma etching apparatus (hereinafter referred to as an anode type PE). In cathode type RIE (Figure 3), the self-bias potential is large and ions are easily accelerated, resulting in a high etching rate. Also, since the ions are incident perpendicularly, an anisotropic shape can be obtained, but the ion incidence energy is large, so damage may occur. The problem is that it's big.
例えば、表1の条件で多結晶シリコンをエツチングした
場合、エツチング速度は3450人/minで完全な異
方性形状が得られる。しかし、ライフタイム(少数キャ
リアの生存時間:N型半導体の場合は正孔が生成してか
ら消失するまでの時間のことを言う、)を測定したとこ
ろリファレンス値の15〜20%まで減少した。For example, when polycrystalline silicon is etched under the conditions shown in Table 1, a perfectly anisotropic shape can be obtained at an etching rate of 3450 people/min. However, when the lifetime (minority carrier survival time: in the case of an N-type semiconductor, the time from when a hole is generated until it disappears) was measured, it decreased to 15 to 20% of the reference value.
表1
一方、アノード型PEはカソード型RIEはどシース電
位が大きくないのでガス比を変えないと(サイドエツチ
ングが進行しないように側壁保護膜を形成しやすいガス
を多くする。)異方性形状が得られないが、ダメージを
小さくすることができるがエツチング速度は下がる。Table 1 On the other hand, since the sheath potential of anode type PE is not as large as that of cathode type RIE, the gas ratio must be changed (increase the amount of gas that facilitates the formation of a sidewall protective film to prevent side etching from progressing).Anisotropic shape However, the damage can be reduced, but the etching speed will be reduced.
例えば、表2の条件で多結晶シリコンをエツチングした
場合、エツチング速度は2230人/minであり、ラ
イフタイムはリファレンス値の70〜85%であった。For example, when polycrystalline silicon was etched under the conditions shown in Table 2, the etching rate was 2230 people/min, and the lifetime was 70 to 85% of the reference value.
表2
〔発明が解決しようとする課題1
従来技術のようにカソード型RIEを用いればエツチン
グ速度も速く、異方性形状が得られるがダメージが大き
く、又、アノード型PEを用いればダメージは小さいが
エツチング速度が遅いという課題を有していた。Table 2 [Problem to be solved by the invention 1 If cathode type RIE is used as in the prior art, the etching speed is fast and an anisotropic shape can be obtained, but the damage is large, and if anode type PE is used, the damage is small. However, the problem was that the etching speed was slow.
本発明はこのような課題を解決するものでエツチング速
度が速く、且つ、ダメージの小さいエツチング方法を提
供することを目的とする。The present invention solves these problems and aims to provide an etching method that has a high etching speed and causes little damage.
〔課題を解決するための手段]
本発明の半導体装置の製造方法は、平行に置かれた電極
の片方にウェハーを置き、高周波を印加しプラズマを発
生させエツチングを行なうドライエツチング装置におい
て、
a)ウェハーの置かれた電極に高周波を印加し、エツチ
ングを行なう。[Means for Solving the Problems] The method for manufacturing a semiconductor device of the present invention is a dry etching apparatus in which a wafer is placed on one side of electrodes placed in parallel, and a high frequency is applied to generate plasma to perform etching.a) Etching is performed by applying high frequency to the electrode on which the wafer is placed.
b)被エツチング層の残りが25%以下になったところ
でウェハーに対向する電極に高周波の印加を切り換えて
、エツチングを行なうことを特徴とする。b) Etching is performed by switching the application of high frequency to the electrode facing the wafer when the remaining amount of the layer to be etched becomes 25% or less.
〔作 用]
同じ装置で高周波の印加を切り換えてエツチングを行な
うことで第1のエツチング時に発生し、側壁に付着した
デポジションが外気の影響で変質し、本来もっていた側
壁保護膜としての機能がな(なることもなく、第2のエ
ツチングにも側壁保護膜として使用できる。[Function] By performing etching by switching the application of high frequency using the same device, the deposits that occur during the first etching and adhered to the side walls are altered by the influence of the outside air, and their original function as a side wall protective film is lost. (No problem occurs, and it can be used as a sidewall protective film in the second etching as well.
以上、本発明について実施例に基づき詳細に説明する。 The present invention will now be described in detail based on examples.
第1図は本実施例において用いたエツチング装置で、ウ
ェハーの置かれた電極(101)とそれに対向する電極
(102)が平行に置かれており、それぞれに高周波電
源(103,104)がつながっており、エツチングの
途中で切り換えるようになっている。Figure 1 shows the etching apparatus used in this example, in which an electrode (101) on which a wafer is placed and an electrode (102) facing it are placed in parallel, and high frequency power sources (103, 104) are connected to each. It is designed so that it can be switched during etching.
この装置を用い4000人堆積させた多結晶シリコンを
表3及び表4の条件でエツチングを行なった・
まず、エツチング室内にガスを導入した後、圧力を設定
値にしたところで、ウェハーの置かれた電極(lot)
につながっている高周波電源(103)をいれ、表3の
条件で50秒(約3000)エツチングを行い、その後
、ウェハーに対向する電極(102)につながっている
高周波電源(104)に切り換えて表4の条件で残りの
多結晶シリコンをこの条件で最後までエツチングを行な
った。Using this equipment, polycrystalline silicon deposited by 4,000 people was etched under the conditions shown in Tables 3 and 4. First, after introducing gas into the etching chamber and setting the pressure to the set value, the wafer was placed on the etching chamber. Electrode (lot)
Turn on the high frequency power source (103) connected to the wafer and perform etching for 50 seconds (approximately 3000 times) under the conditions shown in Table 3. After that, switch to the high frequency power source (104) connected to the electrode (102) facing the wafer and etching. The remaining polycrystalline silicon was etched to the end under condition 4.
表3
表4
以上のようにエツチングを行なったときの形状は垂直に
なり、ダメージもライフタイムで調べたところ65〜8
0%とアノード型PEと比べて遜色のない良好なエツチ
ング特性が得られた。Table 3 Table 4 When etching is performed as described above, the shape becomes vertical, and the damage is 65 to 8 when examined in terms of lifetime.
0%, good etching characteristics comparable to those of anode type PE were obtained.
なお、エツチング条件は表3.4に示したものに限るも
のではな(、被エツチング材ネ4やエツチング装置によ
り異なるものである。又、高周波電源も2つ設置して切
り換λるタイプに限らず、図2のようにスイッチで切り
換えるものでもよい。Note that the etching conditions are not limited to those shown in Table 3.4 (they differ depending on the material to be etched and the etching equipment.In addition, two high-frequency power supplies are installed and can be switched over). However, the present invention is not limited to this, and may be switched by a switch as shown in FIG.
このように同じ装置で高周波の印加電極を切り換えて行
なうことで第1のエツチング時に発生したデポジション
が外気の影響で変質し、本来もっていた側壁保護膜とし
ての機能がなくなることもなく、第2のエツチングにも
側壁保護膜として使用できる。In this way, by switching the high-frequency application electrode in the same device, the deposition generated during the first etching is not altered by the influence of the outside air and loses its original function as a sidewall protective film, and the second etching is It can also be used as a sidewall protective film for etching.
[発明の効果]
本発明のエツチング速度の速い第1のエツチングとダメ
ージの小さい第2のエツチングを連続して行なうことで
ダメージが小さく、且つエツチング速度の速いエツチン
グを行なうことができるという効果を有している。[Effects of the Invention] By successively performing the first etching with a high etching speed and the second etching with a small damage according to the present invention, it is possible to perform etching with a small damage and a high etching speed. are doing.
第1図は、本実施例におけるエツチング装置の概略図で
ある。
第2図は、本実施例における第2のエツチング装置の概
略図である。
第3図は、従来技術におけるエツチング装置の概略図で
ある。
101.201.301 ・・・・・下部電極102
.202.302 ・・・・・上部電極103.104
.203.303 ・・・高周波電源105.205.
305
106.206.306
107.207.307
208 ・ ・ ・ ・
・ガス導入口
・ガスを非気口
・ウェハー
・スイッチ
以
上FIG. 1 is a schematic diagram of an etching apparatus in this embodiment. FIG. 2 is a schematic diagram of the second etching apparatus in this embodiment. FIG. 3 is a schematic diagram of an etching apparatus in the prior art. 101.201.301 ... lower electrode 102
.. 202.302 ... Upper electrode 103.104
.. 203.303...High frequency power supply 105.205.
305 106.206.306 107.207.307 208 ・ ・ ・ ・ ・Gas inlet, gas inlet, wafer, switch or higher
Claims (1)
印加しプラズマを発生させエッチングを行なうドライエ
ッチング装置において、 a)ウェハーの置かれた電極に高周波を印加し、エッチ
ングを行なう。 b)被エッチング層の残りが25%以下になったところ
でウェハーに対向する電極に高周波の印加を切り換えて
、エッチングを行なうことを特徴とする半導体装置の製
造方法。[Scope of Claims] A dry etching apparatus in which a wafer is placed on one side of electrodes placed in parallel and etching is performed by applying high frequency waves to generate plasma, which includes: a) applying high frequency waves to the electrode on which the wafer is placed to perform etching; Do this. b) A method for manufacturing a semiconductor device, characterized in that when the remaining amount of the layer to be etched becomes 25% or less, application of high frequency waves to an electrode facing the wafer is switched to perform etching.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29263789A JPH03153026A (en) | 1989-11-10 | 1989-11-10 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29263789A JPH03153026A (en) | 1989-11-10 | 1989-11-10 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03153026A true JPH03153026A (en) | 1991-07-01 |
Family
ID=17784369
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29263789A Pending JPH03153026A (en) | 1989-11-10 | 1989-11-10 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03153026A (en) |
-
1989
- 1989-11-10 JP JP29263789A patent/JPH03153026A/en active Pending
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