JPH03150895A - Multilayer circuit board and manufacture thereof - Google Patents
Multilayer circuit board and manufacture thereofInfo
- Publication number
- JPH03150895A JPH03150895A JP1288676A JP28867689A JPH03150895A JP H03150895 A JPH03150895 A JP H03150895A JP 1288676 A JP1288676 A JP 1288676A JP 28867689 A JP28867689 A JP 28867689A JP H03150895 A JPH03150895 A JP H03150895A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- layers
- circuit board
- multilayer circuit
- line wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 239000000919 ceramic Substances 0.000 claims abstract description 13
- KZHJGOXRZJKJNY-UHFFFAOYSA-N dioxosilane;oxo(oxoalumanyloxy)alumane Chemical group O=[Si]=O.O=[Si]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O KZHJGOXRZJKJNY-UHFFFAOYSA-N 0.000 claims abstract description 6
- 229910052863 mullite Inorganic materials 0.000 claims abstract description 6
- 239000004020 conductor Substances 0.000 claims description 28
- 239000000463 material Substances 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 20
- 239000004065 semiconductor Substances 0.000 claims description 20
- 239000003990 capacitor Substances 0.000 claims description 12
- 239000007788 liquid Substances 0.000 claims description 6
- CPLXHLVBOLITMK-UHFFFAOYSA-N Magnesium oxide Chemical compound [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 claims description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 5
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 claims description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 3
- 238000010030 laminating Methods 0.000 claims description 3
- 229910052596 spinel Inorganic materials 0.000 claims description 3
- 239000011029 spinel Substances 0.000 claims description 3
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 2
- 239000011521 glass Substances 0.000 claims description 2
- 239000000395 magnesium oxide Substances 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims description 2
- 239000000377 silicon dioxide Substances 0.000 claims description 2
- 238000005476 soldering Methods 0.000 claims description 2
- 229910052845 zircon Inorganic materials 0.000 claims description 2
- GFQYVLUOOAAOGM-UHFFFAOYSA-N zirconium(iv) silicate Chemical compound [Zr+4].[O-][Si]([O-])([O-])[O-] GFQYVLUOOAAOGM-UHFFFAOYSA-N 0.000 claims description 2
- 230000005540 biological transmission Effects 0.000 abstract description 20
- 239000011810 insulating material Substances 0.000 abstract description 7
- 239000000758 substrate Substances 0.000 description 16
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 12
- 229910000679 solder Inorganic materials 0.000 description 10
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 7
- 229910052757 nitrogen Inorganic materials 0.000 description 6
- 239000012671 ceramic insulating material Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 239000010408 film Substances 0.000 description 4
- 239000000843 powder Substances 0.000 description 4
- LRHPLDYGYMQRHN-UHFFFAOYSA-N N-Butanol Chemical compound CCCCO LRHPLDYGYMQRHN-UHFFFAOYSA-N 0.000 description 3
- 238000010304 firing Methods 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- 239000002002 slurry Substances 0.000 description 3
- XSTXAVWGXDQKEL-UHFFFAOYSA-N Trichloroethylene Chemical group ClC=C(Cl)Cl XSTXAVWGXDQKEL-UHFFFAOYSA-N 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- GPYPVKIFOKLUGD-UHFFFAOYSA-N gold indium Chemical compound [In].[Au] GPYPVKIFOKLUGD-UHFFFAOYSA-N 0.000 description 2
- 229910000833 kovar Inorganic materials 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229920006267 polyester film Polymers 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- ZTQSAGDEMFDKMZ-UHFFFAOYSA-N Butyraldehyde Chemical compound CCCC=O ZTQSAGDEMFDKMZ-UHFFFAOYSA-N 0.000 description 1
- 239000001856 Ethyl cellulose Substances 0.000 description 1
- ZZSNKZQZMQGXPY-UHFFFAOYSA-N Ethyl cellulose Chemical compound CCOCC1OC(OC)C(OCC)C(OCC)C1OC1C(O)C(O)C(OC)C(CO)O1 ZZSNKZQZMQGXPY-UHFFFAOYSA-N 0.000 description 1
- AEMRFAOFKBGASW-UHFFFAOYSA-M Glycolate Chemical compound OCC([O-])=O AEMRFAOFKBGASW-UHFFFAOYSA-M 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 239000000020 Nitrocellulose Substances 0.000 description 1
- CYTYCFOTNPOANT-UHFFFAOYSA-N Perchloroethylene Chemical group ClC(Cl)=C(Cl)Cl CYTYCFOTNPOANT-UHFFFAOYSA-N 0.000 description 1
- 125000000484 butyl group Chemical group [H]C([*])([H])C([H])([H])C([H])([H])C([H])([H])[H] 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000002826 coolant Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229920001249 ethyl cellulose Polymers 0.000 description 1
- 235000019325 ethyl cellulose Nutrition 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 229920001220 nitrocellulos Polymers 0.000 description 1
- 125000001557 phthalyl group Chemical group C(=O)(O)C1=C(C(=O)*)C=CC=C1 0.000 description 1
- 239000004014 plasticizer Substances 0.000 description 1
- 229920002037 poly(vinyl butyral) polymer Polymers 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 229950011008 tetrachloroethylene Drugs 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は高速伝送多層回路基板及びその製造方法に関し
、詳しくは機能モジュールを構成するに好適な多層回路
基板及びその製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a high-speed transmission multilayer circuit board and a method for manufacturing the same, and more particularly to a multilayer circuit board suitable for configuring a functional module and a method for manufacturing the same.
近年、LSI等の集積回路は、高速化、高密度化への要
求に応えるべく、多層回路基板上に直接チップを搭載す
る方式が用いられるようになってきている。上記搭載方
式に用いられる多層回路基板には、従来、アルミナを主
とする焼結体が絶縁材料として使用されている。が、こ
のような基板は一般に電気信号の伝達速度が遅いという
大きな欠点を有する。In recent years, integrated circuits such as LSIs have come to be mounted directly on multilayer circuit boards in order to meet demands for higher speeds and higher densities. Conventionally, a sintered body mainly made of alumina is used as an insulating material in the multilayer circuit board used in the above mounting method. However, such substrates generally have a major drawback in that the transmission speed of electrical signals is slow.
一方、LSI等の集積回路は、一般に複数個の電位を有
する電源を必要とする。これらの電源は、多くの場合基
板外部に電源層を有する基板を設けることにより供給さ
れるため、しばしば高速伝送のための障害となっている
。On the other hand, integrated circuits such as LSIs generally require a power source having multiple potentials. These power sources are often provided by providing a substrate with a power layer outside the substrate, which often poses an obstacle to high-speed transmission.
前記従来の集積回路を通して伝送される信号は絶縁材料
の誘電特性による電位低下やノイズ等による波形の乱れ
などの原因により高速での伝送が困難であり、これらの
問題の解決が望まれていたしたがって、本発明の目的は
、電位変動や反射波による影響が低減され、高性能、か
つ高速伝送の可能な多層回路基板、及びその製造方法を
提供することにある。Signals transmitted through the conventional integrated circuits are difficult to transmit at high speed due to potential drop due to the dielectric properties of insulating materials and waveform disturbances due to noise, etc., and it has been desired to solve these problems. SUMMARY OF THE INVENTION An object of the present invention is to provide a multilayer circuit board that is less affected by potential fluctuations and reflected waves, and is capable of high performance and high-speed transmission, and a method for manufacturing the same.
[課題を解決するための手段]
本発明者らは、前記課題について鋭意検討した結果、本
発明の目的が下記手段により達成することを見出した。[Means for Solving the Problems] As a result of intensive study on the above-mentioned problems, the present inventors found that the object of the present invention can be achieved by the following means.
すなわち、本発明は導体層と絶縁層とを交互に積層して
なる多層回路基板において、導体層がX方向及びY方向
のライン配線層と電源層もしくはグランド層とからなり
、かつX方向及びY方向のライン配線層と電源層もしく
はグランド層との間の絶縁層の誘電率がX方向ライン配
線層とY方向ライン配線層との間の絶縁層の誘電率、及
び電源層もしくはグランド層間の絶縁層の誘電率より小
さいことを特徴とする多層回路基板に関する。That is, the present invention provides a multilayer circuit board formed by alternately laminating conductor layers and insulating layers, in which the conductor layer consists of line wiring layers in the X direction and Y direction, and a power supply layer or a ground layer, and The dielectric constant of the insulating layer between the line wiring layer in the X direction and the power layer or ground layer is the same as the dielectric constant of the insulating layer between the line wiring layer in the X direction and the line wiring layer in the Y direction, and the insulation between the power layer or ground layer The present invention relates to a multilayer circuit board characterized in that the dielectric constant is smaller than the dielectric constant of the layers.
さらに本発明は、絶縁層の上下両面にそれぞれ少な(と
も1層の導体層を有する基板ユニットを複数ユニット積
層することを特徴とする多層回路基板の製造方法に関す
る。Furthermore, the present invention relates to a method for manufacturing a multilayer circuit board, characterized by laminating a plurality of board units each having a small number of conductor layers (each having one conductor layer) on both upper and lower surfaces of an insulating layer.
以下に本発明についてさらに詳細に説明する。The present invention will be explained in more detail below.
本発明の導体層は、従来使用されてきている金属以外に
、さらに抵抗を小さくするため超電導物質も使用される
。回路配線は、従来の印刷済以外に蒸着法、メツキ法に
よっても形成される。In addition to conventionally used metals, the conductor layer of the present invention also uses superconducting materials in order to further reduce resistance. In addition to the conventional printed circuit wiring, the circuit wiring can also be formed by a vapor deposition method or a plating method.
本発明のX方向及びY方向のライン配線層と電源層もし
くはグランド層との間の絶縁層に用いられる材料は、誘
電率のとくに低いものが好ましい。The material used for the insulating layer between the line wiring layer in the X direction and the Y direction and the power supply layer or the ground layer in the present invention preferably has a particularly low dielectric constant.
たとえば、真空、空気、ガス(tle、 Ne、^r、
N、 0など)、液体(ヘリウム、窒素等)などが好
ましく使用される。For example, vacuum, air, gas (tle, Ne, ^r,
N, 0, etc.), liquids (helium, nitrogen, etc.), etc. are preferably used.
本発明のX方向ライン配線層とY方向ライン配線層との
間の絶縁層、及び電源層もしくはグランド層間の絶縁層
に使用される材料は、前記ライン配線層と電源層もしく
はグランド層との間の絶縁層材料よりも高い誘電率を有
するものが使用される。ここで「電源層もしくはグラン
ド層間」とは一方が電源層又はグランド層であり、他方
が電源層又はグランド層である場合のそれらの間をいう
ことはいうまでもない。The material used for the insulating layer between the X-direction line wiring layer and the Y-direction line wiring layer and the insulating layer between the power supply layer or the ground layer of the present invention is the material used for the insulation layer between the line wiring layer and the power supply layer or the ground layer. A material having a dielectric constant higher than that of the insulating layer material is used. It goes without saying that "between the power supply layer or the ground layer" here refers to the space between them when one layer is the power layer or the ground layer and the other layer is the power layer or the ground layer.
上記絶縁層材料は、多層回路基板としての形状を保持し
うる強度のものが好ましく、たとえばセラミックスが挙
げられる。具体例としてはアルミナ、シリカ、マグネシ
ア、ジルコニア、スピネル、ムライト、ジルコン、窒化
アルミニウム、及びガラス等から選ばれる少なくとも一
種が挙げられる。The insulating layer material is preferably strong enough to maintain the shape of the multilayer circuit board, such as ceramics. Specific examples include at least one selected from alumina, silica, magnesia, zirconia, spinel, mullite, zircon, aluminum nitride, glass, and the like.
本発明の多層回路基板は、絶縁層の上下両面にそれぞれ
少なくとも1層の導体層を有する基板ユニットを作成し
、次いでそれらを複数ユニット交互に積層することによ
り製造される。The multilayer circuit board of the present invention is manufactured by creating a board unit having at least one conductor layer on each of the upper and lower surfaces of an insulating layer, and then alternately stacking a plurality of these units.
たとえば、セラミックからなる絶縁層の両面にそれぞれ
X方向、及びX方向のライン配線層を各1層有する基板
と、電源層もしくはグランド層をそれぞれセラミック絶
縁層の両面に各1層有する基板とを空胴絶縁層を介して
交互に積層する。上記基板は、好ましくは公知の半田接
続法により導体を介して接続される。For example, a board that has one line wiring layer in the X direction and one line wiring layer in the They are alternately laminated with the body insulating layers interposed therebetween. The substrates are preferably connected via conductors by a known solder connection method.
電気信号に生じるノイズの原因である電位変動や反射波
の影響を低減させるために、前記積層体の電源層もしく
はグランド層間の絶縁層のうちの少なくとも1層を高誘
電率のコンデンサとすることがとくに好ましい。In order to reduce the effects of potential fluctuations and reflected waves that cause noise occurring in electrical signals, at least one of the insulating layers between the power supply layer or the ground layer of the laminate may be a capacitor with a high dielectric constant. Particularly preferred.
また、前記回路中にコンデンサ及び/又は抵抗を導入、
又はそれらを基板上に搭載することも好ましく、高性能
のハイブリッドIC基板を得ることができる。Also, introducing a capacitor and/or a resistor into the circuit,
Alternatively, it is also preferable to mount them on a substrate, and a high-performance hybrid IC substrate can be obtained.
配線抵抗をより小さくするためには、導体層をより低温
に保持することが好ましい。そのため、X方向及びX方
向のライン配線層を両面に有する基板と電源層もしくは
グランド層を両面に有する基板との間を空胴としその中
に液体窒素等の冷媒を流すことが好ましい。In order to further reduce wiring resistance, it is preferable to maintain the conductor layer at a lower temperature. Therefore, it is preferable to create a cavity between a substrate having X-direction and X-direction line wiring layers on both sides and a substrate having power supply layers or ground layers on both sides, and to flow a coolant such as liquid nitrogen into the cavity.
多層回路基板としての性能をより向上させるため、Si
、 GaAs等からなる半導体を1個以上同一基板上に
搭載し、機能モジュールを形成することがとくに好まし
い。In order to further improve the performance of a multilayer circuit board, Si
It is particularly preferable to mount one or more semiconductors made of GaAs, etc. on the same substrate to form a functional module.
本発明により得られる多層回路基板により電気信号の伝
送を抑制する要因が除かれ、性能向上、及び高速伝送が
可能となる。また、配線の抵抗降下、半導体の搭載、回
路中へのコンデンサや抵抗の組み込みなどによりさらに
性能向上が可能となる。The multilayer circuit board obtained according to the present invention eliminates factors that inhibit the transmission of electrical signals, making it possible to improve performance and achieve high-speed transmission. Furthermore, performance can be further improved by lowering the resistance of wiring, mounting semiconductors, and incorporating capacitors and resistors into the circuit.
本発明の上記多層回路基板は、たとえば大型電子計算機
に使用された場合、それらの性能向上に資すること大で
ある。When the multilayer circuit board of the present invention is used, for example, in large-scale electronic computers, it greatly contributes to improving their performance.
以下に本発明を実施例によりさらに詳細に説明する。 The present invention will be explained in more detail below using examples.
(実施例1)
本実施例で使用する多層回路基板を第1図に断面図とし
て示す。図において、lはX方向とX方向のライン配線
層の間、及び電源層もしくはグランド層の間の絶縁層を
形成するセラミックス絶縁材料であり、2はX方向、及
びX方向のライン配線層と電源層もしくはグランド層と
の間の絶縁層を形成する空気である。また、3はX方向
もしくはX方向のライン配線層を形成する導体材料であ
り4は電源もしくはグランド層を形成する導体材料であ
る。これら導体層の相互間は5で示した半田により接続
されている。6は、金−インジウムろう7で接続された
コバールピン、8、及び9は、半田10で接続されたそ
れぞれ特性の異なる半導体部品を示している。(Example 1) A cross-sectional view of a multilayer circuit board used in this example is shown in FIG. In the figure, l is a ceramic insulating material that forms an insulating layer between the X direction and the line wiring layer in the X direction and between the power supply layer or the ground layer, and 2 is the ceramic insulating material that forms the insulating layer between the This is air that forms an insulating layer between the power supply layer or the ground layer. Further, 3 is a conductive material forming the X direction or a line wiring layer in the X direction, and 4 is a conductive material forming a power supply or ground layer. These conductor layers are connected to each other by solder shown at 5. Reference numeral 6 indicates a Kovar pin connected with gold-indium solder 7, and 8 and 9 indicate semiconductor components each having different characteristics and connected with solder 10.
次に、本発明の高速伝送回路基板の作成方法を説明する
。なお、以下の記載中、部とあるのは重量(ダラム)を
、%とあるのは重量%を意味する。Next, a method for producing a high-speed transmission circuit board according to the present invention will be explained. In the following description, "part" means weight (duram), and "%" means weight %.
平均粒径2.5μmのムライト粉末(3A[20,・2
Sing) 72.0部、平均粒径1.0μmの石英
粉末(Sing) 25.3部、平均粒径0.6 a
mのスピネル粉末(AbOi・Mg0) 2.7部に、
樹脂として平均重合度1oooのポリビニルブチラール
5.9部をボールミルに入れ、3時間乾式混合する。更
に、可塑剤としてブチルフタリルグリコール酸ブチル1
.9 d、溶剤としてトリクロロエチレン46.0Id
、テトラクロロエチレン17 、0 ml 、n−ブチ
ルアルコール18.0部を加え12時時間式混合しスラ
リを作成する。次に、真空脱泡処理によりスラリから気
泡を除去し、粘度調整を行う0次いで、スラリをドクタ
ーブレードを用いてシリコーン処理したポリエステルフ
ィルム支持体上に乾燥後0.23+maの厚さになるよ
うに塗布し、炉を通して乾燥し、セラミックスグリーン
シートを作成する。このセラミックスグリーンシートを
シリコーン処理したポリエステルフィルム支持体より取
外し、220W間隔に切断する。Mullite powder with an average particle size of 2.5 μm (3A[20,・2
Sing) 72.0 parts, average particle size 1.0 μm quartz powder (Sing) 25.3 parts, average particle size 0.6 a
m spinel powder (AbOi・Mg0) 2.7 parts,
As a resin, 5.9 parts of polyvinyl butyral having an average degree of polymerization of 100 was placed in a ball mill and dry mixed for 3 hours. Furthermore, butyl phthalyl glycolate 1 is used as a plasticizer.
.. 9 d, trichlorethylene 46.0Id as solvent
, 17.0 ml of tetrachloroethylene, and 18.0 parts of n-butyl alcohol were added and mixed for 12 hours to prepare a slurry. Next, air bubbles are removed from the slurry by vacuum defoaming treatment, and the viscosity is adjusted.Next, the slurry is dried onto a siliconized polyester film support using a doctor blade to a thickness of 0.23+ ma. It is applied and dried in a furnace to create a ceramic green sheet. This ceramic green sheet was removed from the silicone-treated polyester film support and cut into 220W intervals.
このようにして作成したセラミックスグリーンシートを
グリーンシートパンチ器を用いて、2部0陥口(口は一
辺200mmの正方形を示す。以下同様)に切断すると
ともに、ガイド用の1穴を形成する。Using a green sheet puncher, the ceramic green sheet thus produced was cut into two pieces with zero openings (the openings represent a square with a side of 200 mm; the same shall apply hereinafter), and one hole for a guide was formed.
その後、このガイド用の穴を利用してセラミックスグリ
ーンシートを固定し、パンチ法により所定位置に直径0
.15mmのスルーホールをあけた。更にタングステン
粉末:ニトロセルロース:エチルセルロース:ボリビニ
ルブチラール:トリクロロエチレン=100:3:1:
2:23(重量比)の導体ペーストをセラミックスグリ
ーンシートにあけたスルーホールに充填し、次に、スク
リーン印刷法により所定回路パターンに従って上述の導
体ペーストをセラミックスグリーンシートの両面に印刷
した。次に、このセラミックスグリーンシートを150
M口に切断し、基板焼成炉中に一枚づつセットし、水分
を含有した窒素及び水素の混合ガス中で1時間に200
℃の昇温速度で加熱し、1630℃で1゜5時間保持し
て焼結し、125m5+口の基板を作成した。導体層と
してX方向のライン配線層、及びY方向のライン配線層
を両面にそれぞれ1層づつ有する基板と電源層もしくは
グランド層を両面にそれぞれ1層づつ有する基板を交互
に半田で接続し多層回路基板(高速伝送回路基板)を作
成した。After that, use this guide hole to fix the ceramic green sheet, and use the punching method to place it in a predetermined position with a diameter of 0.
.. I drilled a 15mm through hole. Furthermore, tungsten powder: nitrocellulose: ethyl cellulose: vorivinyl butyral: trichlorethylene = 100:3:1:
A conductor paste of 2:23 (weight ratio) was filled into the through holes made in the ceramic green sheet, and then the above-mentioned conductor paste was printed on both sides of the ceramic green sheet according to a predetermined circuit pattern by screen printing. Next, this ceramic green sheet was
The substrates were cut into M-shaped pieces, placed one by one in a substrate firing furnace, and heated at 200°C per hour in a mixed gas of nitrogen and hydrogen containing moisture.
The material was heated at a temperature increase rate of 1,630°C for 1°5 hours for sintering, and a substrate of 125m5+ size was created. A multilayer circuit in which a substrate having one line wiring layer in the X direction and one line wiring layer in the Y direction on both sides as conductor layers and a substrate having one power supply layer or ground layer on each side are alternately connected by solder. A board (high-speed transmission circuit board) was created.
この多層回路基板の同一面上に、Si、及びGaAsか
らなる半導体部品を25個半田で直接搭載し、機能モジ
ュールとした。多層回路基板の構成は、ライン配線層と
電源層もしくはグランド層との間の絶縁層が空気、ライ
ン配線層としてX方向、及びY方向を両面にそれぞれ1
層有する絶縁材料と電源層もしくはグランド層を両面に
それぞれ1層有する絶縁材料がムライトを主成分とする
セラミックスからなる。ライン配線層と電源層もしくは
グランド層の間の磁場がほとんど発生せず、電気信号の
伝送が妨害されないため、絶縁材料が全てムライトを主
成分とするセラミックスからなる場合に比べて、電気信
号を約4倍速(伝送することができた。On the same surface of this multilayer circuit board, 25 semiconductor components made of Si and GaAs were directly mounted with solder to form a functional module. The structure of the multilayer circuit board is such that the insulating layer between the line wiring layer and the power supply layer or ground layer is air, and the line wiring layer is made of air on both sides in the X direction and Y direction.
The insulating material having layers and the insulating material having one power layer or ground layer on both sides are made of ceramics containing mullite as a main component. Almost no magnetic field is generated between the line wiring layer and the power supply layer or ground layer, and the transmission of electrical signals is not disturbed. 4x speed (transmission was possible.
前記機能モジュールを液体窒素中に浸漬し、作動させた
。その結果、GaAsからなる半導体部品の性能が向上
し、更にライン配線層と電源層もしくはグランド層の間
にも液体窒素で満たされるため導体材料の配線抵抗が小
さくなり、室温において作動させた場合に比べ、電気信
号を約2倍速(伝送することが出来た。The functional module was immersed in liquid nitrogen and activated. As a result, the performance of semiconductor components made of GaAs is improved, and since liquid nitrogen is also filled between the line wiring layer and the power supply layer or ground layer, the wiring resistance of the conductor material is reduced, and when operated at room temperature. In comparison, it was possible to transmit electrical signals approximately twice as fast.
また、X方向とY方向のライン配線層の間、及び電源層
もしくはグランド層の間の絶縁層は、ムライトを主成分
とするセラミックスからなるため、多層回路基板として
の形状を保持するに必要な強度を備えており、信顛性の
高い高速伝送回路基板とすることができた。In addition, the insulating layers between the line wiring layers in the X and Y directions and between the power supply layer or the ground layer are made of ceramics whose main component is mullite, so they are necessary to maintain the shape of the multilayer circuit board. It was possible to create a high-speed transmission circuit board with strength and high reliability.
(実施例2)
第2図に断面図を示すように、コンデンサ部品12及び
抵抗部品11を回路の中に導入、又は、コンデンサ回路
12及び抵抗回路11を基板の焼成後に厚膜法により形
成した以外は、上記実施例1と同様の方法により2種類
の多層回路基板を作成した。(Example 2) As shown in the cross-sectional view in FIG. 2, the capacitor component 12 and the resistor component 11 were introduced into the circuit, or the capacitor circuit 12 and the resistor circuit 11 were formed by a thick film method after baking the substrate. Other than that, two types of multilayer circuit boards were created in the same manner as in Example 1 above.
これらの多層回路基板上にSi、及びGaAsからなる
半導体部品を25個半田で直接搭載し、機能モジュール
とした。上記実施例1で作成した機能モジュールに比べ
、電気信号に生じるノイズの原因である電位変動や反射
波の影響を低減でき、電位変動がなくなり、半導体との
整合がとれるようになり反射波の発生を防止することが
出来るようになった。電気信号の波形に乱れが無くなる
ため、電気信号の周波数を多くしても十分に処理できる
ようになり、半導体部品の性能を十分に発揮できる多層
回路基板とすることが出来た。本実施例で得られた基板
は、ともに上記実施例1で作成した機能モジュールに比
べ、電気信号の周波数を多くできるため、実質的に約1
.5倍速くすることが出来た。Twenty-five semiconductor components made of Si and GaAs were directly mounted on these multilayer circuit boards with solder to form a functional module. Compared to the functional module created in Example 1 above, the effects of potential fluctuations and reflected waves, which are the causes of noise occurring in electrical signals, can be reduced, eliminating potential fluctuations, matching with semiconductors, and generating reflected waves. It is now possible to prevent Since there is no disturbance in the waveform of the electrical signal, it is now possible to process the electrical signal sufficiently even if the frequency of the electrical signal is increased, making it possible to create a multilayer circuit board that can fully demonstrate the performance of semiconductor components. Both of the substrates obtained in this example can increase the frequency of electrical signals compared to the functional module created in Example 1, so the frequency of the electric signal can be increased by approximately 1
.. I was able to make it 5 times faster.
(実施例3)
電源層とグランド層もしくは電位の異なる電源層間の絶
縁層に誘電率が大きい材料を用い、電源層とグランド層
もしくは電位の異なる電源層を焼結した高誘電率材料を
用いて厚膜法により形成した以外は、上記実施例1乃至
2と同様の方法で機能モジュールを作成した。高誘電率
材料は、コンデンサとして作用した。上記実施例2と同
様に電気信号に生じるノイズの原因である電位変動や反
射波の影響を低減でき、電位変動がなくなり、半導体と
の整合がとれるようになり反射波の発生を防止すること
ができた。電気信号の波形に乱れが無くなるため、電気
信号の周波−敗を多くしても十分に処理できるようにな
り、半導体部品の性能を十分に発揮する多層回路基板と
することができた。(Example 3) A material with a high dielectric constant is used for the power layer and the ground layer, or an insulating layer between the power layers with different potentials, and a high dielectric constant material is used for the power layer and the ground layer, or the power layers with different potentials are sintered. Functional modules were created in the same manner as in Examples 1 and 2 above, except that they were formed by the thick film method. The high dielectric constant material acted as a capacitor. As in Example 2 above, it is possible to reduce the effects of potential fluctuations and reflected waves that cause noise in electrical signals, eliminate potential fluctuations, achieve matching with the semiconductor, and prevent the occurrence of reflected waves. did it. Since there is no disturbance in the waveform of the electrical signal, even if the frequency loss of the electrical signal is increased, it can be processed satisfactorily, making it possible to create a multilayer circuit board that fully demonstrates the performance of semiconductor components.
前記実施例1で作成した機能モジュールに比べ、電気信
号の周波数を多くできるために、上記実施例2と同様に
実質的に約1.5倍速くすることが出来た。Compared to the functional module created in Example 1, since the frequency of the electrical signal can be increased, the speed can be substantially increased by about 1.5 times as in Example 2.
(実施例4)
セラミック原料粉末の配合量、導体材料、焼成雰囲気及
び焼成温度を第1表に示すように変更した以外は、上記
実施例1乃至3と同様の方法で機能モジュールを作成し
た。いずれの場合においても、上記実施例1乃至3と同
様の性能が得られた。(Example 4) A functional module was created in the same manner as in Examples 1 to 3 above, except that the blending amount of ceramic raw material powder, conductor material, firing atmosphere, and firing temperature were changed as shown in Table 1. In either case, the same performance as in Examples 1 to 3 was obtained.
(重置以下余白)
(実施例5)
導体材料としてC11% Au5pts peg/pd
s^g/Ptを厚膜法又は薄膜法(蒸着又はめっき法)
により形成した以外は、上記実施例1乃至4と同様の方
法で機能モジュールを作成した。配線抵抗を小さくでき
たため、電圧低下による電気信号の波形の変形が小さく
なり、上記実施例1乃至4により作成した機能モジュー
ルに比べ、電気信号の伝送速度が約1.1倍速かった。(Margin below overlapping) (Example 5) C11% Au5pts peg/pd as conductor material
s^g/Pt by thick film method or thin film method (vapor deposition or plating method)
Functional modules were created in the same manner as in Examples 1 to 4 above, except that they were formed using the following methods. Since the wiring resistance could be reduced, deformation of the waveform of the electrical signal due to voltage drop was reduced, and the transmission speed of the electrical signal was approximately 1.1 times faster than that of the functional modules produced in Examples 1 to 4 above.
(実施例6)
導体材料として超伝導材料を用いた以外は、上記実施例
1乃至4と同様の方法で機能モジュールを作成した。導
体材料に用いた超伝導材料を超伝導現象を起こす温度以
下で作動させることにより、配線抵抗をほぼ0にするこ
とができた。上記操作は、はとんどの場合、液体窒素中
で行なった。そのため、電圧低下による電気信号の波形
の変形がほとんどなくなり、上記実施例1乃至5により
作成した機能モジュールに比べ、電気信号の伝送速度が
約1.1〜1.5倍速かった。(Example 6) A functional module was created in the same manner as in Examples 1 to 4 above, except that a superconducting material was used as the conductor material. By operating the superconducting material used as the conductor at a temperature below the temperature at which superconductivity occurs, it was possible to reduce the wiring resistance to almost zero. The above operations were mostly carried out in liquid nitrogen. Therefore, there was almost no deformation of the waveform of the electrical signal due to voltage drop, and the transmission speed of the electrical signal was approximately 1.1 to 1.5 times faster than the functional modules created in Examples 1 to 5 above.
(実施例7)
コンデンサ部品及び抵抗部品を回路の中に導入、又は、
コンデンサ回路及び抵抗回路を基板を焼成後に厚膜法に
より形成した以外は、上記実施例4乃至5と同様の方法
で多層回路基板(高速伝送回路基板)を作成した。この
多層回路基板上にSi及びGaAsからなる半導体部品
を25個半田により直接搭載し、機能モジュールとした
。前記実施例1で作成した機能モジュールに比べ、電気
信号に生じるノイズの原因である電位変動や反射波の影
響を低減でき、電位変動がなくなり、半導体との整合が
とれるようになり反射波の発生を防止することができた
。電気信号の波形に乱れが無くなるため、電気信号の周
波数を多くしても十分に処理出来るようになり、半導体
部品の性能を十分に発揮出来る多層回路基板とすること
ができた。上記実施例4乃至5で作成した機能モジュー
ルに比べ、電気信号の周波数を多くできるために、伝送
速度を実質的に約1.5倍速くすることができた。(Example 7) Introducing capacitor parts and resistance parts into the circuit, or
A multilayer circuit board (high-speed transmission circuit board) was produced in the same manner as in Examples 4 and 5 above, except that the capacitor circuit and the resistor circuit were formed by the thick film method after baking the board. Twenty-five semiconductor components made of Si and GaAs were directly mounted on this multilayer circuit board by soldering to form a functional module. Compared to the functional module created in Example 1, the influence of potential fluctuations and reflected waves, which are the causes of noise occurring in electrical signals, can be reduced, eliminating potential fluctuations and matching with semiconductors, resulting in the generation of reflected waves. was able to be prevented. Since there is no disturbance in the waveform of the electrical signal, it becomes possible to process the electrical signal sufficiently even if the frequency of the electrical signal is increased, making it possible to create a multilayer circuit board that can fully demonstrate the performance of semiconductor components. Compared to the functional modules created in Examples 4 and 5 above, since the frequency of the electrical signal could be increased, the transmission speed could be substantially increased by about 1.5 times.
本発明によれば、X方向及びY方向のライン配線層と電
源層もしくはグランド層の間の絶縁層の誘電率を小さく
し、X方向とY方向のライン配線層の間、及び電源層も
しくはグランド層の間の絶縁層を大きくすることにより
、電気信号の伝送を抑制していた磁場を少なくできるた
め高速伝送が可能になり、また、形状を保持できる信鯨
性の高い多層回路基板が得られる。また、半導体部品と
してSt、 GaAs等の化合物半導体を搭載し、回路
中にコンデンサや抵抗を取り入れることにより更に高性
能、かつ高速伝送の多層回路基板が得られる。According to the present invention, the dielectric constant of the insulating layer between the line wiring layer in the X direction and the Y direction and the power supply layer or the ground layer is reduced, and the dielectric constant of the insulating layer between the line wiring layer in the X direction and the Y direction and the power supply layer or the ground layer is reduced. By increasing the size of the insulating layer between the layers, the magnetic field that suppresses the transmission of electrical signals can be reduced, making high-speed transmission possible, and creating a highly stable multilayer circuit board that can maintain its shape. . Moreover, by mounting compound semiconductors such as St and GaAs as semiconductor components and incorporating capacitors and resistors into the circuit, a multilayer circuit board with even higher performance and higher speed transmission can be obtained.
本発明の多層回路基板の一実施例を第1図及び第2図に
断面図として示す。
1:X方向とY方向のライン配線層の間、及び電源層も
しくはグランド層の間の絶縁層を形成するセラミックス
絶縁材料
2:X方向及びY方向のライン配線層と電源層もしくは
グランド層との間の絶縁層を形成する絶縁材料
3:X方向もしくはY方向のライン配線層を形成する導
体材料
4:電源層もしくはグランド層を形成する導体材料
5:基板接続用半田
6:コバールピン
7:金−インジウムろう
8:Si半導体部品
9:GaAs等Si半導体部品と特性の異なる半導体部
品
lO二二環導体部品接続用半
田1:抵抗部品又は抵抗回路An embodiment of the multilayer circuit board of the present invention is shown in cross-sectional views in FIGS. 1 and 2. FIG. 1: Ceramic insulating material forming an insulating layer between the line wiring layer in the X direction and the Y direction, and between the power supply layer or the ground layer 2: The ceramic insulating material forming the insulation layer between the line wiring layer in the X direction and the Y direction and the power supply layer or the ground layer Insulating material 3 forming an insulating layer between: Conductor material 4 forming a line wiring layer in the X direction or Y direction: Conductor material 5 forming a power supply layer or ground layer: Solder for board connection 6: Kovar pin 7: Gold - Indium solder 8: Si semiconductor component 9: Semiconductor component such as GaAs that has different characteristics from Si semiconductor components 1O 22-ring conductor component Connecting solder 1: Resistance component or resistance circuit
Claims (13)
基板において、導体層がX方向及びY方向のライン配線
層と電源層もしくはグランド層とからなり、かつX方向
及びY方向のライン配線層と電源層もしくはグランド層
との間の絶縁層の誘電率がX方向ライン配線層とY方向
ライン配線層との間の絶縁層の誘電率及び電源層もしく
はグランド層間の絶縁層の誘電率より小さいことを特徴
とする多層回路基板。1. In a multilayer circuit board formed by alternately laminating conductor layers and insulating layers, the conductor layer consists of a line wiring layer in the X direction and the Y direction and a power supply layer or a ground layer, and the line wiring layer in the X direction and the Y direction. The dielectric constant of the insulating layer between the and the power layer or ground layer is smaller than the dielectric constant of the insulating layer between the A multilayer circuit board characterized by:
なる電源層の間の絶縁層の誘電率が、X方向及びY方向
のライン配線層と電源層もしくはグランド層との間の絶
縁層の誘電率よりも大きい請求項1記載の多層回路基板
。2. The dielectric constant of the insulating layer between the power layer and the ground layer, or between the power layers with different potentials, is higher than the dielectric constant of the insulating layer between the line wiring layer in the X direction and the Y direction and the power layer or the ground layer. The multilayer circuit board according to claim 1, which is large.
しくはグランド層との間の絶縁層が空気、ガス、液体、
又は真空である請求項1に記載の多層回路基板。3. The insulating layer between the line wiring layer in the X direction and the Y direction and the power supply layer or the ground layer is made of air, gas, liquid,
The multilayer circuit board according to claim 1, which is a vacuum.
、電源層もしくはグランド層間の絶縁層とがセラミック
スからなる請求項1又は2に記載の多層回路基板。4. 3. The multilayer circuit board according to claim 1, wherein the insulating layer between the X-direction and Y-direction line wiring layers and the insulating layer between the power supply layer or the ground layer are made of ceramic.
と、電源層もしくはグランド層間の絶縁層とが、アルミ
ナ、シリカ、マグネシア、ジルコニア、スピネル、ムラ
イト、ジルコン、窒化アルミニウム、及びガラスから選
ばれる少なくとも1種を主成分とする請求項4記載の多
層回路基板。5. The insulating layer between the line wiring layers in the X direction and the Y direction and the insulating layer between the power supply layer or the ground layer are at least one selected from alumina, silica, magnesia, zirconia, spinel, mullite, zircon, aluminum nitride, and glass. 5. The multilayer circuit board according to claim 4, wherein the main component is a seed.
請求項1に記載の多層回路基板。6. 2. The multilayer circuit board according to claim 1, wherein the conductor layer has a metal or a superconducting material as a main component.
イン配線層、及び2層の電源層もしくはグランド層から
なるユニットを構成し、かつ該ユニットが順次積層され
ており、上記電源層もしくはグランド層間の絶縁層のう
ちの少なくとも1層がコンデンサーで形成される請求項
1又は2に記載の多層回路基板。7. The conductor layer constitutes a unit consisting of an X-direction line wiring layer, a Y-direction line wiring layer, and two power supply layers or ground layers, and the units are stacked in order, and the conductor layers constitute a unit consisting of an X-direction line wiring layer, a Y-direction line wiring layer, and two power supply layers or ground layers, and the units are laminated in order, and the The multilayer circuit board according to claim 1 or 2, wherein at least one of the insulating layers is formed of a capacitor.
かに記載の多層回路基板。8. The multilayer circuit board according to any one of claims 1 to 7, on which a semiconductor component is mounted.
8に記載の多層回路基板。9. 9. The multilayer circuit board according to claim 8, wherein the semiconductor components are composed of at least two types.
は抵抗部品もしくはコンデンサ部品を搭載したハイブリ
ッドIC用基板を形成する請求項1乃至7のいずれかに
記載の多層回路基板。10. 8. The multilayer circuit board according to claim 1, wherein the multilayer circuit board forms a hybrid IC board incorporating a resistor circuit or a capacitor circuit or mounting a resistor component or a capacitor component.
請求項1乃至10のいずれかに記載の多層回路基板。11. The multilayer circuit board according to any one of claims 1 to 10, at least one of which is used in a large-sized computer.
導体層を配設した基板ユニットを複数ユニット積層する
ことを特徴とする多層回路基板の製造方法。12. A method for manufacturing a multilayer circuit board, comprising stacking a plurality of board units each having at least one conductor layer on both upper and lower surfaces of an insulating layer.
ット積層する請求項12記載の多層回路基板の製造方法
。13. 13. The method of manufacturing a multilayer circuit board according to claim 12, wherein a plurality of said board units are stacked by a soldering method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1288676A JPH03150895A (en) | 1989-11-08 | 1989-11-08 | Multilayer circuit board and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1288676A JPH03150895A (en) | 1989-11-08 | 1989-11-08 | Multilayer circuit board and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03150895A true JPH03150895A (en) | 1991-06-27 |
Family
ID=17733245
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1288676A Pending JPH03150895A (en) | 1989-11-08 | 1989-11-08 | Multilayer circuit board and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03150895A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5454161A (en) * | 1993-04-29 | 1995-10-03 | Fujitsu Limited | Through hole interconnect substrate fabrication process |
US5966294A (en) * | 1996-12-20 | 1999-10-12 | Nec Corporation | Printed circuit board for prevention of unintentional electromagnetic interference |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5077865A (en) * | 1973-10-17 | 1975-06-25 | ||
JPS5082559A (en) * | 1973-11-26 | 1975-07-04 | ||
JPS55108797A (en) * | 1979-02-13 | 1980-08-21 | Hitachi Ltd | Circuit board |
JPS60177696A (en) * | 1984-02-23 | 1985-09-11 | 日本電気株式会社 | Composite ceramic board |
JPS61220499A (en) * | 1985-03-27 | 1986-09-30 | 株式会社日立製作所 | Hybrid multilayer interconnection substrate |
JPS62117395A (en) * | 1985-11-18 | 1987-05-28 | 富士通株式会社 | Manufacture of multilayer printed circuit board |
JPS62188399A (en) * | 1986-02-14 | 1987-08-17 | 日本電気株式会社 | Ceramic wiring board |
JPS63202090A (en) * | 1987-02-18 | 1988-08-22 | 株式会社日立製作所 | Multilayer printed interconnection board |
JPS63299298A (en) * | 1987-05-29 | 1988-12-06 | Seiko Epson Corp | Multilayered printed board |
JPS6427294A (en) * | 1987-04-27 | 1989-01-30 | Fujitsu Ltd | Multilayer circuit board for superconducting ceramics circuit and manufacture thereof |
JPH01245594A (en) * | 1988-03-16 | 1989-09-29 | Internatl Business Mach Corp <Ibm> | Manufacture of printed circuit board assembly |
-
1989
- 1989-11-08 JP JP1288676A patent/JPH03150895A/en active Pending
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5077865A (en) * | 1973-10-17 | 1975-06-25 | ||
JPS5082559A (en) * | 1973-11-26 | 1975-07-04 | ||
JPS55108797A (en) * | 1979-02-13 | 1980-08-21 | Hitachi Ltd | Circuit board |
JPS60177696A (en) * | 1984-02-23 | 1985-09-11 | 日本電気株式会社 | Composite ceramic board |
JPS61220499A (en) * | 1985-03-27 | 1986-09-30 | 株式会社日立製作所 | Hybrid multilayer interconnection substrate |
JPS62117395A (en) * | 1985-11-18 | 1987-05-28 | 富士通株式会社 | Manufacture of multilayer printed circuit board |
JPS62188399A (en) * | 1986-02-14 | 1987-08-17 | 日本電気株式会社 | Ceramic wiring board |
JPS63202090A (en) * | 1987-02-18 | 1988-08-22 | 株式会社日立製作所 | Multilayer printed interconnection board |
JPS6427294A (en) * | 1987-04-27 | 1989-01-30 | Fujitsu Ltd | Multilayer circuit board for superconducting ceramics circuit and manufacture thereof |
JPS63299298A (en) * | 1987-05-29 | 1988-12-06 | Seiko Epson Corp | Multilayered printed board |
JPH01245594A (en) * | 1988-03-16 | 1989-09-29 | Internatl Business Mach Corp <Ibm> | Manufacture of printed circuit board assembly |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5454161A (en) * | 1993-04-29 | 1995-10-03 | Fujitsu Limited | Through hole interconnect substrate fabrication process |
US5966294A (en) * | 1996-12-20 | 1999-10-12 | Nec Corporation | Printed circuit board for prevention of unintentional electromagnetic interference |
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