JPH03159221A - Electric two layered capacitor - Google Patents
Electric two layered capacitorInfo
- Publication number
- JPH03159221A JPH03159221A JP1298913A JP29891389A JPH03159221A JP H03159221 A JPH03159221 A JP H03159221A JP 1298913 A JP1298913 A JP 1298913A JP 29891389 A JP29891389 A JP 29891389A JP H03159221 A JPH03159221 A JP H03159221A
- Authority
- JP
- Japan
- Prior art keywords
- double layer
- buffer means
- lead terminals
- electric double
- layer capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 title claims description 28
- 239000002184 metal Substances 0.000 claims description 3
- 238000003466 welding Methods 0.000 abstract description 8
- 238000005452 bending Methods 0.000 abstract description 4
- 239000000758 substrate Substances 0.000 abstract description 4
- 238000000034 method Methods 0.000 abstract 5
- 238000013016 damping Methods 0.000 description 2
- 229910001220 stainless steel Inorganic materials 0.000 description 2
- 239000010935 stainless steel Substances 0.000 description 2
- 239000002390 adhesive tape Substances 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
- H05K3/308—Adaptations of leads
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/13—Energy storage using capacitors
Landscapes
- Electric Double-Layer Capacitors Or The Like (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は電気二重層コンデンサに関し、さらに詳しく
言えば、そのリード端子に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an electric double layer capacitor, and more specifically, to a lead terminal thereof.
第5図および第6図には1例えば2つのコイン状コンデ
ンサセル2,3を積層した電気二重層コンデンサ1が示
されている。すなわちこの従来例によると、一方のコン
デンサセル2の例えば陽極面2a側にステンレスなどの
金属からなる皿状のホルダー4が例えば溶接により固定
されており、同ホルダー4に他方のコンデンサセル3の
陰極面3b側が嵌合され、この場合その陰極面3bとホ
ルダー4は数個所において溶接されている。そして、こ
のコンデンサセル積層体の周囲に、熱収縮性樹脂からな
る電気絶縁性スリーブ5が被せられるとともに、その外
側に露出された一方のコンデンサセル2の陰極面2bと
他方のコンデンサセル3の陽極面3aにそれぞれリード
端子6,7が溶接などにより取付けられる。5 and 6 show an electric double layer capacitor 1 in which, for example, two coin-shaped capacitor cells 2 and 3 are laminated. That is, according to this conventional example, a dish-shaped holder 4 made of metal such as stainless steel is fixed, for example, by welding, to the anode surface 2a side of one capacitor cell 2, and the cathode of the other capacitor cell 3 is fixed to the holder 4, for example, on the anode surface 2a side. The surface 3b side is fitted, and in this case, the cathode surface 3b and the holder 4 are welded at several places. Then, an electrically insulating sleeve 5 made of heat-shrinkable resin is placed around this capacitor cell laminate, and the cathode surface 2b of one capacitor cell 2 and the anode of the other capacitor cell 3 are exposed to the outside. Lead terminals 6 and 7 are respectively attached to the surface 3a by welding or the like.
この電気二重層コンデンサ1は、自動機などにより把持
されてそのリード端子6,7が例えば回路基板に穿設さ
れている取付孔に挿入されるように実装されるのである
が、取付孔の位置誤差や寸法誤差などがあると、リード
端子6,7に過大な力がかかり、その溶接部が剥がれて
しまうという欠点があった。This electric double layer capacitor 1 is mounted such that it is gripped by an automatic machine or the like and its lead terminals 6 and 7 are inserted into a mounting hole drilled in a circuit board, for example, but the position of the mounting hole is determined. If there is an error or dimensional error, excessive force is applied to the lead terminals 6, 7, resulting in the welded portions peeling off.
上記課題を解決するため、この発明においては。 In order to solve the above problems, in this invention.
コイン形をなすコンデンサセルの陽極面と陰極面の各電
極面にリード端子を取付けてなる電気二重層コンデンサ
において、リード端子の電極面に対する溶接部と回路基
板に対する取付脚との間に、所定のバネ弾性を有する緩
衝手段を設けた構成としている。In an electric double layer capacitor in which lead terminals are attached to the anode and cathode surfaces of a coin-shaped capacitor cell, there is a predetermined distance between the welded part of the lead terminal to the electrode surface and the mounting leg to the circuit board. The structure includes a buffer means having spring elasticity.
この場合、緩衝手段は好ましくはリード端子の一部分を
ほぼU字状に折り曲げた屈曲部からなる。In this case, the buffer means preferably consists of a bent portion formed by bending a portion of the lead terminal into a substantially U-shape.
また、リード端子は金属の丸棒体からなり、溶接部はそ
の一端を偏平に押しつぶすことにより形成される。Further, the lead terminal is made of a round metal rod, and the welded portion is formed by flattening one end of the rod.
上記の構成によれば、実装時の過大ストレスや衝撃は緩
衝手段によって和らげられるため、リード端子の脱落事
故を大幅に低下させることができる。According to the above configuration, excessive stress and impact during mounting are alleviated by the buffer means, so that accidents of lead terminals falling off can be significantly reduced.
以下、この発明の実施例を第1図ないし第4図を参照し
ながら詳細に説明する。Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS. 1 to 4.
まず第1図を参照すると、この電気二重層コンデンサl
Oは先に説明の従来例と同様1例えば2つのコイン状コ
ンデンサセル2,3を積層したコンデンサセル積層体を
備えているが、その各電極面2b、3a(第6図参照)
には次のようなリード端子11.12が取付けられる。First, referring to Figure 1, this electric double layer capacitor l
O is equipped with a capacitor cell laminate in which, for example, two coin-shaped capacitor cells 2 and 3 are stacked, as in the conventional example previously described, and each electrode surface 2b, 3a (see FIG. 6).
The following lead terminals 11 and 12 are attached to the terminals.
すなわち、各リード端子11.12は、上記電極面2b
、3aに対して溶接される溶接部11a、12aと、図
示しない回路基板への実装時にその基板に穿設されてい
る取付孔に挿入される取付脚11b。That is, each lead terminal 11.12 is connected to the electrode surface 2b.
, 3a, and mounting legs 11b that are inserted into mounting holes drilled in the circuit board (not shown) when mounted on the circuit board.
12bとを備えているが、それらの間には所定のバネ弾
性を有する緩衝手段13.13が形成されている。12b, between which a buffer means 13.13 having a predetermined spring elasticity is formed.
この実施例において、同緩衝手段13.13は取付脚1
1b、 12bの所定部位をほぼ直角に折り曲げ、さら
に溶接部11a 、 12a側を約180度折り返すこ
とによってほぼU字状に形成された屈曲部11c、12
Cからなる。このリード端子11.12は好ましくはス
テンレスの丸棒体からなるが、溶接部11’a、12a
については必要な溶接面積を確保するため、同部分をプ
レスなどにて偏平に押しつぶして板状体としている。し
たがって、このリード端子11.12によれば基板実装
時の機械的ストレスが上記屈曲部11c、12cにて緩
衝されるとともに、電極面に対してより強固に溶接する
ことができる。なお、説明の便宜1各リード端子に別々
の参照符号11゜12を付けているが、それらは同一構
成であって、図示のように左右対称的に配置して、取付
脚11b。In this embodiment, the damping means 13.13 are arranged on the mounting leg 1.
Bent portions 11c, 12 are formed into approximately U-shapes by bending predetermined portions of 1b, 12b at approximately right angles, and then folding back the welded portions 11a, 12a by approximately 180 degrees.
Consists of C. This lead terminal 11.12 is preferably made of a stainless steel round bar, and has welded parts 11'a and 12a.
In order to secure the necessary welding area, the same part is flattened using a press or the like to form a plate-like body. Therefore, according to the lead terminals 11, 12, the mechanical stress at the time of board mounting is buffered by the bent portions 11c, 12c, and it is possible to weld more firmly to the electrode surface. For convenience of explanation 1, each lead terminal is given a separate reference numeral 11 and 12, but they have the same structure and are arranged symmetrically as shown in the figure, with the mounting legs 11b.
12b間の間隔を広くすることにより、基板実装時の取
付安定性を高めることができる。また、リード端子11
.12の取付脚11b、12bの部分はハンダ付は性を
向上させるため、ハンダメツキもしくは鈎メツキ処理を
施しておくと好ましい、さらには、リード端子11.1
2の溶接部11a、12aのコンデンサセル積層体の電
極面2b、3aへの取付位置は自動機などのチャックに
よる把持との関係でコンデンサセル2,3の中心より下
方、すなわち回路基板などへの実装側であることが好ま
しい。By widening the distance between the parts 12b, it is possible to improve the mounting stability during board mounting. In addition, the lead terminal 11
.. The mounting legs 11b and 12b of No. 12 are preferably solder-plated or hook-plated in order to improve solderability.
The attachment positions of the welded parts 11a and 12a of No. 2 to the electrode surfaces 2b and 3a of the capacitor cell laminate are below the center of the capacitor cells 2 and 3, that is, to the circuit board etc. in relation to the gripping by a chuck of an automatic machine. Preferably on the implementation side.
第2WIおよび第3w!Iには上記電気二重層コンデン
サ10を電子部品連とするためテーピング可能とした例
が示されている。すなわち、各リード端子11、12の
取付脚11b、12bの例えばほぼ中間部分にクランク
状の折曲部11d、12dを形成して、第3図に示され
ているように、各取付脚11b、12bを同一平面上に
位置させる。これによれば、所定の間隔をもって各電気
二重層コンデンサ10の取付脚11b、12bを台紙1
4上に並べ、それらを粘着テープ15にて台紙14に押
えることにより、電子部品連とすることができる。2nd WI and 3rd w! 1 shows an example in which the electric double layer capacitor 10 can be taped to form a series of electronic components. That is, crank-shaped bent portions 11d and 12d are formed, for example, at approximately the middle portions of the mounting legs 11b and 12b of each lead terminal 11 and 12, so that each mounting leg 11b, 12b are located on the same plane. According to this, the mounting legs 11b and 12b of each electric double layer capacitor 10 are attached to the mount 1 at predetermined intervals.
By arranging them on 4 and pressing them onto the mount 14 with adhesive tape 15, it is possible to form a series of electronic parts.
一方、第4図には電気二重層コンデンサ1oをその電極
面2b、3aが図示しない基板面に対して平行となるよ
うに実装する所謂横置実装型の例が示されている。この
横置実装型にあっては、各す−ド端子16.17はその
溶接部16a、17aが取付脚16b、17bに対して
ほぼ直角に折り曲げられるが、この場合においても取付
脚16b、17bの所定部位、好ましくは折曲部の近傍
に上記実施例と同様にほぼU字状をなす屈曲部11c、
12cからなる緩衝手段18.18が設けられる。On the other hand, FIG. 4 shows an example of a so-called horizontal mounting type in which an electric double layer capacitor 1o is mounted so that its electrode surfaces 2b and 3a are parallel to a substrate surface (not shown). In this horizontal mounting type, the welded portions 16a, 17a of each side terminal 16, 17 are bent approximately at right angles to the mounting legs 16b, 17b; A bent portion 11c having a substantially U-shape as in the above embodiment at a predetermined portion, preferably near the bent portion,
A damping means 18.18 consisting of 12c is provided.
上記各実施例では、緩衝手段13.18としてほぼU字
状折り曲げられた屈曲部11c 、 12c ; 16
c 。In each of the embodiments described above, the bending portions 11c, 12c;
c.
17cを例示したが、例えばv字状若しくはΩなどであ
ってもよい。17c is shown as an example, but it may be V-shaped or Ω-shaped, for example.
以上説明したように、この発明によれば、リード端子の
電極面に対する溶接部と回路基板に対する取付脚との間
に、所定のバネ弾性を有する緩衝手段を設けたことによ
り、実装時の過大ストレスや衝撃は同緩衝手段によって
和らげられるため、リード端子の脱落事故を大幅に低下
させることができる。As explained above, according to the present invention, by providing a buffer means having a predetermined spring elasticity between the welded part of the lead terminal to the electrode surface and the mounting leg to the circuit board, excessive stress during mounting can be avoided. Since the shock and impact are softened by the same buffering means, the chance of lead terminals falling off can be significantly reduced.
第1図はコンデンサセル積層体と各リード端子とを分離
して示した実施例の斜視図、第2図は電子部品連とする
場合の正面図、第3図は同電子部品連の側面図、第4図
は他の実施例を示した第1図と同様の斜視図、第5図は
従来例を示した第1図と同様の斜視図、第6図は同従来
例の断面図である6
図中、2,3はコンデンサセル、4はホルダー5はスリ
ーブ、lOは電気二重層コンデンサ、11゜12; 1
6.17はリード端子、 lla 、 12a ; 1
6a 。
17aは溶接部、16b、17bは取付脚、llc *
12c :16c、17cは屈曲部、13.18は緩
衝手段である。
特 許 出 願 人 エルナー株式会社特 許 出 願
人 旭硝子株式会社Figure 1 is a perspective view of the embodiment showing the capacitor cell stack and each lead terminal separated, Figure 2 is a front view of the electronic component series, and Figure 3 is a side view of the same electronic component series. , FIG. 4 is a perspective view similar to FIG. 1 showing another embodiment, FIG. 5 is a perspective view similar to FIG. 1 showing a conventional example, and FIG. 6 is a sectional view of the same conventional example. 6 In the figure, 2 and 3 are capacitor cells, 4 is a holder 5 is a sleeve, IO is an electric double layer capacitor, 11° 12; 1
6.17 is the lead terminal, lla, 12a; 1
6a. 17a is the welding part, 16b and 17b are the mounting legs, llc *
12c: 16c and 17c are bent portions, and 13.18 is a buffer means. Patent applicant: ELNA Co., Ltd. Patent applicant: Asahi Glass Co., Ltd.
Claims (3)
の各電極面にリード端子を取付けてなる電気二重層コン
デンサにおいて、 上記リード端子の上記電極面に対する溶接部と回路基板
に対する取付脚との間に、所定のバネ弾性を有する緩衝
手段が設けられていることを特徴とする電気二重層コン
デンサ。(1) In an electric double layer capacitor in which lead terminals are attached to the anode and cathode surfaces of a coin-shaped capacitor cell, the welded portion of the lead terminal to the electrode surface and the mounting leg to the circuit board An electric double layer capacitor characterized in that a buffer means having a predetermined spring elasticity is provided between them.
字状に折り曲げた屈曲部からなる請求項1に記載の電気
二重層コンデンサ。(2) The buffer means has a portion of the lead terminal approximately U
The electric double layer capacitor according to claim 1, comprising a bent portion bent in a letter shape.
接部はその一端を偏平に押しつぶした板状体よりなる請
求項1に記載の電気二重層コンデンサ。(3) The electric double layer capacitor according to claim 1, wherein the lead terminal is made of a metal round bar, and the welded part is made of a plate-shaped body with one end crushed flat.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1298913A JPH03159221A (en) | 1989-11-17 | 1989-11-17 | Electric two layered capacitor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1298913A JPH03159221A (en) | 1989-11-17 | 1989-11-17 | Electric two layered capacitor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03159221A true JPH03159221A (en) | 1991-07-09 |
Family
ID=17865799
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1298913A Pending JPH03159221A (en) | 1989-11-17 | 1989-11-17 | Electric two layered capacitor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03159221A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001175194A (en) * | 1999-12-21 | 2001-06-29 | Ise Electronics Corp | Fluorescent display tube and electronic parts |
WO2013121668A1 (en) * | 2012-02-14 | 2013-08-22 | 日立オートモティブシステムズ株式会社 | Rotating electrical machine and method for manufacturing rotating electrical machine |
CN104772541A (en) * | 2015-04-10 | 2015-07-15 | 安徽铜峰电子股份有限公司 | Welding method capable of increasing connecting strength of gold-sprayed end surface of capacitor and leading wire |
WO2020221925A1 (en) * | 2019-05-01 | 2020-11-05 | Norton (Waterford) Limited | Electronic module for medical device |
-
1989
- 1989-11-17 JP JP1298913A patent/JPH03159221A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001175194A (en) * | 1999-12-21 | 2001-06-29 | Ise Electronics Corp | Fluorescent display tube and electronic parts |
JP4684381B2 (en) * | 1999-12-21 | 2011-05-18 | ノリタケ伊勢電子株式会社 | Fluorescent display tube |
WO2013121668A1 (en) * | 2012-02-14 | 2013-08-22 | 日立オートモティブシステムズ株式会社 | Rotating electrical machine and method for manufacturing rotating electrical machine |
US9496773B2 (en) | 2012-02-14 | 2016-11-15 | Hitachi Automotive Systems, Ltd. | Rotating electrical machine and method for manufacturing rotating electrical machine |
CN104772541A (en) * | 2015-04-10 | 2015-07-15 | 安徽铜峰电子股份有限公司 | Welding method capable of increasing connecting strength of gold-sprayed end surface of capacitor and leading wire |
WO2020221925A1 (en) * | 2019-05-01 | 2020-11-05 | Norton (Waterford) Limited | Electronic module for medical device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7190571B2 (en) | Chip capacitor and method for the production thereof | |
JPH03159221A (en) | Electric two layered capacitor | |
JP2570140B2 (en) | Three terminal dip type capacitor | |
JP2630495B2 (en) | Single in-line hybrid integrated circuit device | |
JPH05114392A (en) | Mounting structure of flat type power supply element on circuit board and mounting method thereof | |
JPH0950939A (en) | Electric double-layer capacitor | |
JPH0963894A (en) | Electric double layer capacitor | |
JP2542956Y2 (en) | Terminal mounting structure for electrical components | |
JPH0629161A (en) | Manufacture of chip type electrolytic capacitor | |
JPH0950938A (en) | Electric double-layer capacitor | |
JPH0532935Y2 (en) | ||
JP2855309B2 (en) | Lead frame for semiconductor device and method for manufacturing semiconductor device | |
JP2574102Y2 (en) | Electronic components | |
JP3294479B2 (en) | Carrier plate for holding chip-shaped component and method for transferring chip-shaped component printing paste | |
JPH0138621Y2 (en) | ||
JPH0412482A (en) | Connector for inter-board connection | |
JP4481757B2 (en) | Electronic components | |
JP2000306710A (en) | Electronic component | |
JP2004165537A (en) | Coin type electric double layer capacitor with terminal, and battery | |
JP4066709B2 (en) | Coin-type storage cell for surface mounting | |
JPS5824432Y2 (en) | Cotai Denkai Capacitor | |
JP3388934B2 (en) | Structure of package type solid electrolytic capacitor | |
JP2539889Y2 (en) | Holding structure of piezoelectric diaphragm | |
JPH0963893A (en) | Electric double layer capacitor | |
JPH07283571A (en) | Manufacture of shield frame |