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JPH0250518A - Driving circuit for static induced type self-arc extinction element and inverter device static induced type self-arc-suppressing element - Google Patents

Driving circuit for static induced type self-arc extinction element and inverter device static induced type self-arc-suppressing element

Info

Publication number
JPH0250518A
JPH0250518A JP63199888A JP19988888A JPH0250518A JP H0250518 A JPH0250518 A JP H0250518A JP 63199888 A JP63199888 A JP 63199888A JP 19988888 A JP19988888 A JP 19988888A JP H0250518 A JPH0250518 A JP H0250518A
Authority
JP
Japan
Prior art keywords
gate
voltage
self
electrostatic induction
extinguishing element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63199888A
Other languages
Japanese (ja)
Other versions
JP2747911B2 (en
Inventor
Arata Kimura
新 木村
Kiichi Tokunaga
紀一 徳永
Nobuyoshi Muto
信義 武藤
Satoshi Ibori
敏 井堀
Shuji Musha
武者 修二
Yasuo Matsuda
松田 靖夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP63199888A priority Critical patent/JP2747911B2/en
Priority to DE68925163T priority patent/DE68925163T2/en
Priority to EP89114091A priority patent/EP0354435B1/en
Priority to US07/390,378 priority patent/US5210479A/en
Priority to KR1019890011497A priority patent/KR0144679B1/en
Publication of JPH0250518A publication Critical patent/JPH0250518A/en
Application granted granted Critical
Publication of JP2747911B2 publication Critical patent/JP2747911B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Power Conversion In General (AREA)
  • Inverter Devices (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To always decrease and interrupt and over-current and to prevent the element destruction by taking priority to the fact that a gate voltage is lowered to a prescribed value more than the stopping signal at a control side after the over-current is detected. CONSTITUTION:The gate and collector of a static induced type self-arc extinction element IGBT 10 are connected through a resistance 11 and a diode 12 and the connecting point of the resistance 11 and the diode 12 is connected to the base of a transistor 15. An equivalent overcurrent detecting circuit to detect the collector voltage during the gate voltage impression is constituted at an IGBT 10. An overcurrent detecting signal is transferred to a control side by the transistor 15, the resistance 17, a diode 18 and a capacitor 19 and a gate voltage adjusting circuit is constituted. To the emitter of the transistor 15, a resistance 20 and a capacitor 21 are connected, one side of the capacitor 21 is connected to the base of a transistor 23, the collector of a transistor 23 is the collector of a transistor 3 and an ON holding circuit is constituted. Thus, when the overcurrent is detected, after the flow is surely decreased, the interruption can be performed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は自己消弧素子の駆動回路に係り、特に素子に過
大な電流が流れた時に安全に遮断するに好適な駆動方法
に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a drive circuit for a self-extinguishing element, and particularly to a drive method suitable for safely shutting off an excessive current flowing through the element.

〔従来の技術〕[Conventional technology]

電源装置の小形化や低騒音化のニーズにより、高速スイ
ッチング動作が可能な静電誘導形自己消弧素子(MOS
−FETやIGBT等)が用いられ始めている。これら
の素子、例えばIGBTを例にすると第5図に示すよう
にゲート電圧とコレクタ電圧によって、流れるコレクタ
電流が決定される。
Due to the need for smaller power supplies and lower noise, electrostatic induction self-extinguishing devices (MOS), which can perform high-speed switching operations, have been developed.
-FET, IGBT, etc.) are beginning to be used. Taking these elements, such as IGBTs, as an example, the flowing collector current is determined by the gate voltage and collector voltage, as shown in FIG.

この様な素子をインバータ等の主スィッチに使用して高
速で動作させようとすると、次の様な問題が生じてくる
If such an element is used in a main switch of an inverter or the like to operate at high speed, the following problems will arise.

インバータ等の電源装置ではアーム短絡や負荷短絡が生
じると、電源電圧がオン動作中の素子に印加される。そ
の結果、例えば第5図に示すような関係により、過大な
短絡電流が流れる。IGBTの場合は、特開昭61−1
85064号公報に記載のように、コレクタ電流が過大
になりすぎるとゲート電圧による制御が出来ないという
ラッチアップ現象による素子破壊もあるが、むしろ過大
な電流を高速で遮断するために、遮断時の回路インダク
タンスのエネルギによる跳ね上り電圧が大きく、それが
素子の耐圧を越えて破壊する場合が多く見られる。
In a power supply device such as an inverter, when an arm short circuit or a load short circuit occurs, a power supply voltage is applied to elements that are in an on-operation state. As a result, an excessive short circuit current flows due to the relationship shown in FIG. 5, for example. In the case of IGBT, JP-A-61-1
As described in Publication No. 85064, if the collector current becomes too large, the device may be destroyed due to the latch-up phenomenon in which it cannot be controlled by the gate voltage. The jump voltage due to the energy of the circuit inductance is large, and it often exceeds the withstand voltage of the element and causes destruction.

このため静電誘導形の自己消弧素子ではゲート電圧を制
御する提案がなされている(特開昭61−147736
号公報、特開昭61−185064号公報、特開昭62
−277063号公報、米国特許第4,581.540
号、米国特許第4,721,869号)。これらは過大
になった電流を減流して遮断するものであり、通電期間
中に過電流を検出し減流して遮断できる範囲においては
好適な方法である。
For this reason, a proposal has been made to control the gate voltage in an electrostatic induction type self-extinguishing element (Japanese Patent Laid-Open No. 147736/1983).
Publication No. 185064/1983, Japanese Patent Application Laid-open No. 185064/1983
-277063, U.S. Patent No. 4,581.540
No. 4,721,869). These methods reduce and cut off the excessive current, and are suitable methods as long as the excess current can be detected during the energization period and the current can be reduced and cut off.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

しかしながら、高速のスイッチング動作を行うインバー
タ装置等では、これらの素子の通電期間が狭いため、過
電流を検出しても減流中に通電期間が終了し、結局過大
な電流を遮断して素子が破壊するという問題がある。
However, in inverters and other devices that perform high-speed switching operations, the energizing period of these elements is narrow, so even if an overcurrent is detected, the energizing period ends while the current is decreasing, and the excessive current is eventually cut off and the elements are damaged. There is a problem of destruction.

この問題は、過電流を検出しそれを制御側に転送して通
電期間を広げることで解決できそうにも思われるが、検
出から制御まで遅れ時間があるため、容易に解決できな
い問題である。
It seems that this problem can be solved by detecting the overcurrent and transmitting it to the control side to extend the energization period, but since there is a delay time from detection to control, this problem cannot be solved easily.

本発明はこのような問題を解決するためになされたもの
で゛、過電流を検出した時は必ず減流してから遮断する
という、過電流保護機能付の駆動回路を提供することを
目的とする。
The present invention has been made in order to solve such problems.It is an object of the present invention to provide a drive circuit with an overcurrent protection function that always reduces the current and then shuts off the current when an overcurrent is detected. .

〔課題を解決するための手段〕[Means to solve the problem]

上記目的を達成する本発明静電誘導形自己消弧素子の駆
動回路の特徴とするところは、定電圧電源と、 コレクタ、エミッタ、及びゲートを有する静電誘導形自
己消弧素子と、 入力されたオン・オフ指令信号の大きさに応じて上記定
電圧電源から発生した電圧を上記静電誘導形自己消弧素
子のゲートに印加するゲート電圧入力回路と、 上記静電誘導形自己消弧素子のコレクタ電圧が所定の値
以上のとき、上記ゲート電圧を低下させ、上記ゲート電
圧が所定の値に低下するまで、上記静電誘導形自己消弧
素子がオンし続ける電圧を上記静電誘導形自己消弧素子
のゲートに印加する手段と を具備することにある。
The driving circuit for an electrostatic induction type self-extinguishing element of the present invention that achieves the above object is characterized by: a constant voltage power source; an electrostatic induction type self-extinguishing element having a collector, an emitter, and a gate; a gate voltage input circuit that applies a voltage generated from the constant voltage power source to the gate of the electrostatic induction type self-extinguishing element according to the magnitude of the on/off command signal; and the electrostatic induction type self-extinguishing element. When the collector voltage of the electrostatic induction type self-extinguishing element is equal to or higher than a predetermined value, the gate voltage is lowered, and the electrostatic induction type self-extinguishing element continues to turn on until the gate voltage decreases to a predetermined value. and means for applying voltage to the gate of the self-extinguishing element.

更に、上記目的を達成する本発明静電誘導形自己消弧素
子を有するインバータ装置の特徴とするところは、 第1.第2及び第3の定電圧電源と、 負荷と。
Further, the inverter device having the electrostatic induction type self-extinguishing element of the present invention which achieves the above object has the following features: 1. second and third constant voltage power supplies, and a load.

コレクタ、エミッタ、及びゲートを有し、コレクタ・エ
ミッタ電流路が第3の定電圧電源の一方の端子と他方の
端子との間に直列に接続され、該接続点に負荷が接続さ
れる第1及び第2の静電誘導形自己消弧素子と。
A first circuit having a collector, an emitter, and a gate, a collector-emitter current path connected in series between one terminal and the other terminal of a third constant voltage power supply, and a load connected to the connection point. and a second electrostatic induction type self-extinguishing element.

入力されたオン・オフ指令信号の大きさに応じて上記第
1の定電圧電源から発生した電圧を上記第1の静電誘導
形自己消弧素子のゲートに印加する第1のゲート電圧入
力回路と、 入力されたオン・オフ指令信号の大きさに応じて上記第
2の定電圧電源から発生した電圧を上記第2の静電誘導
形自己消弧素子のゲートに印加する第2のゲート電圧入
力回路と、 上記第1の静電誘導形自己消弧素子のコレクタ電圧が所
定の値以上のとき、上記第1の静電誘導形自己消弧素子
のゲート電圧を低下させ、上記ゲート電圧が所定の値に
低下するまで、オフ指令信号の大きさに応じて上記第1
の定電圧電源から発生した電圧を上記第1の静電誘導形
自己消弧素子のゲートに印加せずに、上記第1の静電誘
導形自己消弧素子がオンし続ける電圧を上記第1の静電
誘導形自己消弧素子のゲートに印加する手段と上記第2
の静電誘導形自己消弧素子のコレクタ電圧が所定の値以
上のとき、上記第2の静電誘導形自己消弧素子のゲート
電圧を低下させ、上記ゲート電圧が所定の値に低下する
まで、オフ指令信号の大きさに応じて上記第2の定電圧
電源から発生した電圧を上記第2の静電誘導形自己消弧
素子のゲートに印加せずに、上記第2の静電誘導形自己
消弧素子がオンし続ける電圧を上記第2の静電誘導形自
己消弧素子のゲートに印加する手段とを具備することに
ある。
a first gate voltage input circuit that applies a voltage generated from the first constant voltage power source to the gate of the first electrostatic induction type self-extinguishing element in accordance with the magnitude of the input on/off command signal; and a second gate voltage that applies a voltage generated from the second constant voltage power supply to the gate of the second electrostatic induction self-extinguishing element in accordance with the magnitude of the input on/off command signal. When the input circuit and the collector voltage of the first electrostatic induction self-turning element are equal to or higher than a predetermined value, the gate voltage of the first electrostatic induction self-turning element is lowered, and the gate voltage is lowered. The above-mentioned first OFF command signal is
Without applying the voltage generated from the constant voltage power supply to the gate of the first electrostatic induction type self-extinguishing element, the voltage at which the first electrostatic induction type self-extinguishing element continues to be turned on is applied to the first electrostatic induction type self-extinguishing element. means for applying voltage to the gate of the electrostatic induction type self-extinguishing element;
When the collector voltage of the electrostatic induction type self-extinguishing element is equal to or higher than a predetermined value, the gate voltage of the second electrostatic induction type self-extinguishing element is lowered until the gate voltage decreases to a predetermined value. , without applying the voltage generated from the second constant voltage power supply to the gate of the second electrostatic induction type self-extinguishing element according to the magnitude of the off command signal. and means for applying a voltage to the gate of the second electrostatic induction type self-extinguishing element to keep the self-extinguishing element turned on.

具体的には、制御信号により所定のゲート電圧を供給す
る駆動回路に、前記ゲート電圧を供給中に静電誘導形自
己消弧素子のオン電圧が所定の電圧以上の時、検出信号
を出力する過電流検出回路と、前記ゲート電圧を所定の
時定数をもって低下するゲート電圧調整回路と、前記ゲ
ート電圧の立ち上りにおいては、ターンオンの遅れ期間
にオン電圧が高いことを過電流と見なさない検出遅れ回
路で構成し、さらにこのゲート電圧調整回路が制御信号
に優先して所定の時間動作するためのオン保持回路を設
けた。
Specifically, a detection signal is output to a drive circuit that supplies a predetermined gate voltage according to a control signal, when the on-voltage of the electrostatic induction type self-turning element exceeds a predetermined voltage while the gate voltage is being supplied. an overcurrent detection circuit, a gate voltage adjustment circuit that reduces the gate voltage with a predetermined time constant, and a detection delay circuit that does not consider a high on-voltage during a turn-on delay period to be an overcurrent when the gate voltage rises. In addition, an on-holding circuit is provided so that the gate voltage adjustment circuit operates for a predetermined period of time in priority to the control signal.

〔作用〕[Effect]

上記構成において、通常の素子のターンオン遅れ動作は
、検出遅れ回路によりマスクされ過電流検出回路は動作
しない、そして負荷等の異常により過電流が流れそれを
検出した時は、ゲート電圧調整回路が動作し、制御側に
過電流信号を出力すると共に、ゲート電圧を所定の時定
数で低下して過電流を減流する。そして制御側からの停
止(オフ指令)信号によりゲート電圧の印加を停止する
が、この場合ゲート電圧を所定の時定数で低下中の所定
の期間は、制御側から停止信号が入ってきてもゲート電
圧の印加は停止せず、過電流を充分に減流してから遮断
するようになっている。
In the above configuration, the normal turn-on delay operation of the element is masked by the detection delay circuit and the overcurrent detection circuit does not operate, and when an overcurrent flows due to an abnormality such as a load and is detected, the gate voltage adjustment circuit operates. Then, an overcurrent signal is output to the control side, and the gate voltage is lowered with a predetermined time constant to reduce the overcurrent. Application of the gate voltage is then stopped in response to a stop (off command) signal from the control side. The voltage application is not stopped, but the overcurrent is sufficiently reduced before being cut off.

したがって、停止(オフ指令)信号の直前に過電流を検
出した場合でも、過電流を直接遮断することなく、素子
破壊を防止することが出来る。
Therefore, even if an overcurrent is detected immediately before a stop (off command) signal, element destruction can be prevented without directly interrupting the overcurrent.

〔実施例〕〔Example〕

以下図面を参照しながら、本発明を実施例に基づいて詳
細に説明する。
The present invention will be described in detail below based on embodiments with reference to the drawings.

第1図は本発明の一実施例で、静電誘導形自己消弧素子
IGBTに適用した例である。ゲート用電源1,2の電
圧は、コンブリメンタルに接続されたNPNトランジス
タ7、PNPトランジスタ8および抵抗9を介してIG
BTIOのゲートに印加され、トランジスタ7.8のベ
ース共通点はNPN トランジスタ5のコレクタに接続
されている。そしてトランジスタ5のベースはホトトラ
ンジスタ3のコレクタに接続されており、トランジスタ
3のベースにオン又はオフのオン・オフ指令信号を与え
ることによってIGBTIOのオン。
FIG. 1 shows one embodiment of the present invention, which is an example applied to an electrostatic induction type self-extinguishing element IGBT. The voltages of the gate power supplies 1 and 2 are connected to the IG via an NPN transistor 7, a PNP transistor 8, and a resistor 9, which are connected conjointly.
It is applied to the gate of BTIO, and the common base of transistors 7.8 is connected to the collector of NPN transistor 5. The base of the transistor 5 is connected to the collector of the phototransistor 3, and IGBTIO is turned on by giving an on/off command signal to the base of the transistor 3.

オフ状態を制御する駆動回路を構成している。It constitutes a drive circuit that controls the off state.

また、IGBTIOのゲートとコレクタは抵抗11とダ
イオード12を介して接続され、抵抗11とダイオード
12の接続点はツェナーダイオード14を介してトラン
ジスタ15のベースに接続しており、IGBTIOにゲ
ート電圧印加中のコレクタ電圧のレベルを検出する等測
的な過電流検出回路を構成する。
Further, the gate and collector of IGBTIO are connected through a resistor 11 and a diode 12, and the connection point between the resistor 11 and the diode 12 is connected to the base of a transistor 15 through a Zener diode 14, and when a gate voltage is applied to IGBTIO, An isometric overcurrent detection circuit is constructed to detect the level of the collector voltage of the circuit.

次に、トランジスタ15のコレクタは、ホトカプラ16
、抵抗17、ダイオード18を介してトランジスタ7.
8のベースに接続され、抵抗17とダイオード18の接
続点にはコンデンサ19が接続されている。これにより
過電流検知信号を制御側に転送すると共に、ゲート電圧
調整回路を構成している。
Next, the collector of the transistor 15 is connected to the photocoupler 16
, resistor 17 and diode 18 to transistor 7.
A capacitor 19 is connected to the connection point between the resistor 17 and the diode 18. This transfers the overcurrent detection signal to the control side and constitutes a gate voltage adjustment circuit.

そしてトランジスタ15のエミッタには抵抗20とコン
デンサ21が接続され、コンデンサ21の一方はトラン
ジスタ23のベースに接続しており、トランジスタ23
のコレクタをトランジスタ3のコレクタに接続してオン
保持回路を構成している。
A resistor 20 and a capacitor 21 are connected to the emitter of the transistor 15, and one end of the capacitor 21 is connected to the base of the transistor 23.
The collector of the transistor 3 is connected to the collector of the transistor 3 to form an on-holding circuit.

次に、この回路の動作を第7図のタイムチャートを交え
ながら説明する。
Next, the operation of this circuit will be explained with reference to the time chart shown in FIG.

まず、トランジスタ3が制御側からの信号により時刻t
oでオンすると、トランジスタ5はベース電流が止まる
のでオフする。その結果抵抗6を介してトランジスタ7
にベース電流が流れ、NPNトランジスタ7がオン状態
となり、抵抗9を介してIGBTIOのゲートに電流を
供給する。そしてIGBTIOはゲート−エミッタ間の
容量が所定の値まで充電された後オン状態となる。
First, transistor 3 is activated at time t by a signal from the control side.
When the transistor 5 is turned on at o, the base current stops and the transistor 5 is turned off. As a result, the transistor 7
A base current flows through the NPN transistor 7, turning on the NPN transistor 7, and supplying current to the gate of the IGBTIO via the resistor 9. IGBTIO is turned on after the gate-emitter capacitance is charged to a predetermined value.

なお通常のオン期間にゲート電流の一部を抵抗11、ダ
イオード12を介してIGBTIOのコレクタにも流し
ている。これはIGBTIOのコレクタ電流が過電流と
なってコレクタ電圧が高くなった時に、その電流をトラ
ンジスタ15のベースに流して、トランジスタ15をオ
ンするためのものである。ターンオン初期においては、
IGBTIOのターンオン遅れ(tl)によりコレクタ
電圧が高く、過電流の時と同じ状態が現われるが、コン
デンサ13により検出遅れを作り、過電流検出回路が動
作しないようにしている。
Note that during the normal on-period, a part of the gate current also flows through the resistor 11 and diode 12 to the collector of IGBTIO. This is to flow the current to the base of the transistor 15 and turn on the transistor 15 when the collector current of the IGBTIO becomes an overcurrent and the collector voltage becomes high. At the early stage of turn-on,
Due to the turn-on delay (tl) of IGBTIO, the collector voltage is high and the same state as an overcurrent occurs, but a detection delay is created by the capacitor 13 to prevent the overcurrent detection circuit from operating.

過電流検知は、この抵抗11とコンデンサ13及びツェ
ナーダイオード14で決まる検査遅れ時間以降もIGB
TIOのコレクタ電圧が所定の電圧以上の場合にのみ行
なわれる。それが前述のトランジスタ15のオン状態(
t3)である。
Overcurrent detection continues after the inspection delay time determined by this resistor 11, capacitor 13, and Zener diode 14.
This is performed only when the collector voltage of TIO is higher than a predetermined voltage. This is the ON state of the transistor 15 mentioned above (
t3).

トランジスタ15がオン(t3)すると、コンデンサ1
9の充電々荷が抵抗17.22およびホトカプラ16を
介して放電を開始する。そして、トランジスタ7のベー
ス電圧は最終的には抵抗6と抵抗17および抵抗22と
の比率で決る値まで低下する。ただし、ツェナーダイオ
ード14の検出レベル以下には下がらない。
When transistor 15 turns on (t3), capacitor 1
9 starts discharging through resistor 17, 22 and photocoupler 16. Then, the base voltage of the transistor 7 eventually decreases to a value determined by the ratio of the resistor 6, the resistor 17, and the resistor 22. However, the voltage does not fall below the detection level of the Zener diode 14.

以上の様にしてIGBTIOのゲート電圧をCRの時定
数をもたせて下げることにより、過電流を徐々に減流さ
せて制御側からの停止(オフ)指令信号を待つ訳である
が、本実施例の特徴はその停止信号より先、すなわちゲ
ート電圧が低下中に制御側から停止信号(t4)を受け
ても、ゲート電圧が所定の値に低下するまで(t5)は
オン状態を保持する回路を設けていることである。
As described above, by lowering the gate voltage of IGBTIO with the time constant of CR, the overcurrent is gradually reduced and a stop (off) command signal from the control side is waited for. The feature is that even if a stop signal (t4) is received from the control side prior to the stop signal, that is, while the gate voltage is decreasing, the circuit maintains the on state until the gate voltage drops to a predetermined value (t5). This is what we have in place.

これを実現しているのが抵抗22.24、コンデンサ2
1、トランジスタ23で構成するオン保持回路である。
This is achieved by resistors 22 and 24 and capacitors 2
1. An on-holding circuit composed of a transistor 23.

過電流検知回路のトランジスタ15がオン(t3)する
と、最初はコンデンサ21を介してトランジスタ23に
ベース電流が流れ、オン保持回路が動作する。そして時
間と共にコンデンサ21に電荷が充電され、かつコンデ
ンサ19の放電が進んでトランジスタ15のコレクタ電
流が小さくなると、トランジスタ23のベースに電流が
小さくなるとトランジスタ23のコレクタ電圧が上昇し
てオン保持回路が停止(tδ)する。
When the transistor 15 of the overcurrent detection circuit is turned on (t3), a base current initially flows to the transistor 23 via the capacitor 21, and the on-holding circuit operates. Then, as time passes, the capacitor 21 is charged with electric charge, and the capacitor 19 is discharged and the collector current of the transistor 15 becomes smaller.As the current at the base of the transistor 23 becomes smaller, the collector voltage of the transistor 23 rises and the on-holding circuit is activated. Stop (tδ).

このようにして過電流検知回路が動作した当初の所定の
時間のみトランジスタ23にベース電流を流してオンす
ることにより、たとえこの期間に制御側からオフ信号が
きてトランジスタ3がオフ(t a) したとしても、
IGBTIOのゲート電圧が所定の値に下がるまではオ
ン状態が保持される。
In this way, by flowing the base current to the transistor 23 and turning it on only for a predetermined time when the overcurrent detection circuit operates, even if an off signal is received from the control side during this period and the transistor 3 is turned off (ta). Even though
The on state is maintained until the gate voltage of IGBTIO falls to a predetermined value.

以上のように本発明では、過電流を検知後は制御信号よ
りゲート電圧を所定の値まで低下させることを優先させ
ているので、過大となった電流は常にゆっくりと小さく
してから遮断できる。このため過電流遮断のようなオフ
時跳ね上り電圧の発生を防止でき、素子破壊を防止でき
るものである。
As described above, in the present invention, after an overcurrent is detected, priority is given to reducing the gate voltage to a predetermined value over the control signal, so that an excessive current can always be slowly reduced and then shut off. For this reason, it is possible to prevent the occurrence of a voltage jump when turned off, such as when an overcurrent is cut off, and it is possible to prevent element destruction.

第2図は本発明の第2の実施例を示す回路図である。第
1図と同一機能のものには同一符号を記しである。第1
図とはIGBTIOのコレクタに接続する過電流の、検
出方法が異なる。第1図の実施例では、過電流と判定す
るレベルより、絞り込むゲート電圧の値を小さくできな
かった。この実施例では検出回路とゲート電圧の絞り込
み回路が別々になっているので、検出レベルと絞り込み
の最終のゲート電圧を個別に選定することが出来る特徴
がある。
FIG. 2 is a circuit diagram showing a second embodiment of the present invention. Components with the same functions as those in FIG. 1 are denoted by the same reference numerals. 1st
The method for detecting overcurrent connected to the collector of IGBTIO is different from the figure. In the embodiment shown in FIG. 1, the value of the gate voltage to be narrowed down could not be made smaller than the level at which overcurrent is determined. In this embodiment, since the detection circuit and the gate voltage narrowing down circuit are separate, the detection level and the final gate voltage for narrowing down can be individually selected.

第3図は本発明の第3の実施例を示す回路図である。第
2図とはトランジスタ27のコレクタとIGBTIOの
ゲート間にダイオード29およびゲートとゲート電源の
正極間にダイオード30が挿入されていることである。
FIG. 3 is a circuit diagram showing a third embodiment of the present invention. In FIG. 2, a diode 29 is inserted between the collector of the transistor 27 and the gate of IGBTIO, and a diode 30 is inserted between the gate and the positive electrode of the gate power supply.

前者はオフ時の逆バイアス期間に抵抗9を介さないで逆
バイアスができ、安定した逆バイアスが得られる2ので
逆バイアス電圧を下げることを可能にする特徴がある。
The former has the feature that reverse bias can be applied without using the resistor 9 during the off-time reverse bias period, and a stable reverse bias can be obtained2, making it possible to lower the reverse bias voltage.

その結果、駆動回路の低損失化が計られる。As a result, the loss of the drive circuit can be reduced.

後者は、オン期間のゲート電圧の最大値をゲート電源電
圧にクランプするものである0本発明者の実験によれば
、IGBTIOがオン状態にあって、インバータのアー
ム短絡や負荷短絡時のように過電流が流れる状態におい
ては、コレクタ電流の過大な増大と共にコレクタ電圧も
上昇する。コレクタ電圧が上昇するとコレクタとゲート
間の容量を介して、ゲート電圧がゲート電源用電圧以上
に主電源側から充電される。このためコレクタ電流が再
び増大するという問題があり、これを防止したものであ
る。
The latter clamps the maximum value of the gate voltage during the on period to the gate power supply voltage.According to the inventor's experiments, when the IGBTIO is in the on state and the inverter arm is short-circuited or the load is short-circuited, In a state where an overcurrent flows, the collector current increases excessively and the collector voltage also increases. When the collector voltage increases, the gate voltage is charged from the main power supply side to a voltage higher than the gate power supply voltage via the capacitance between the collector and the gate. For this reason, there is a problem that the collector current increases again, and this problem is prevented.

第4図は本発明の第4の実施例を示す回路図である。第
3図とは過電流検知信号を、制御側へ転送するためのホ
トカプラ16の位置が異なる。このようにすると、ゲー
ト電圧が印加されかつコレクタ電圧が低くなっている期
間、すなわち通電幅を制御側で把握することが出来るの
で、制御性能を向上することが出来る。
FIG. 4 is a circuit diagram showing a fourth embodiment of the present invention. The position of the photocoupler 16 for transferring the overcurrent detection signal to the control side is different from that in FIG. 3. In this way, the control side can grasp the period during which the gate voltage is applied and the collector voltage is low, that is, the energization width, so that control performance can be improved.

本発明の第1〜第4の実施例の過電流保護回路において
、過電流検知用のダイオード12はIGBTloのコレ
クタに接続されている。高圧部分がゲート回路に近づく
ことは、ノイズの関係で不利である。
In the overcurrent protection circuits of the first to fourth embodiments of the present invention, the overcurrent detection diode 12 is connected to the collector of IGBTlo. Having the high voltage portion close to the gate circuit is disadvantageous in terms of noise.

第6図は、IGBTの断面を模式的に示した図である。FIG. 6 is a diagram schematically showing a cross section of the IGBT.

IGBTの中はセルと称している小容量のIGBTが多
数電極で並列接続されている。図示したように1セルの
カソード電極を分離して、IGBTの内部に過電流検知
用のダイオード12を設けたものである。
Inside the IGBT, small-capacity IGBTs called cells are connected in parallel through multiple electrodes. As shown in the figure, the cathode electrode of one cell is separated, and a diode 12 for overcurrent detection is provided inside the IGBT.

このようにIGBT自身に過電流検知用の端子を設ける
ことによって、ゲート回路に近づく高圧部分が減るので
、ゲート回路のノイズに対する信頼性を向上することが
出来る。
By providing the IGBT itself with a terminal for overcurrent detection in this way, the number of high-voltage portions approaching the gate circuit is reduced, so that the reliability of the gate circuit against noise can be improved.

第8図に3相電圧形インバータ装置の回路図を示す、3
相インバータは、直列接続された2個のIGBTスイッ
チ(S1+S4.S2+S5゜S3+S8)及びダイオ
ードDz* Di Da、D41Ds* Daで構成さ
れる1アームが、3組直流電源1に並列接続され、各ア
ームのスイッチ接続点に負荷である誘導電導機IMを接
続する構成となっているa IGBTSt* St、S
ll、S4.S5.S8は、本発明の第1〜第4の実施
例で示した過電流保護回路を夫々有するものであるが、
第8図には、その保護回路は省略しである。
Figure 8 shows a circuit diagram of a three-phase voltage source inverter device, 3
The phase inverter has one arm consisting of two series-connected IGBT switches (S1 + S4. The inductive conductor IM, which is a load, is connected to the switch connection point of a IGBTSt* St, S.
ll, S4. S5. S8 each has the overcurrent protection circuit shown in the first to fourth embodiments of the present invention,
In FIG. 8, the protection circuit is omitted.

〔発明の効果〕〔Effect of the invention〕

以上のように本発明では、過電流を検知後は制御側の停
止信号よりもゲート電圧を所定の値に下げることを優先
するので、過電流は常に減流して遮断され、素子破壊を
防止することが出来る。
As described above, in the present invention, after an overcurrent is detected, priority is given to lowering the gate voltage to a predetermined value rather than a stop signal from the control side, so the overcurrent is always reduced and cut off, preventing element destruction. I can do it.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の実施例を示す回路図、第2図、
第3図、第4図は本発明の第2.第3゜第4の実施例を
示す回路図、第5図はIGBTの特性図、第6図は本発
明の第1から第4の実施例におけるIGBTの断面図、
第7図は第1@の動作を示すタイムチャート、第8図は
、本発明の実施例となるインバータ装置の一構成例を示
す図である。 1.2・・・直流電源、3,5,7,8,15,23゜
27・・トランジスタ、4,6,9,11,17゜20
.22.24,25,26.28・・・抵抗、10・・
・IGBT、12,18,29,30・・・ダイオード
、13,19.21・・・コンデンサ、14・・・ツェ
ナーダイオード、16・・・ホトカプラ。 tot tz t3i、tp ts
FIG. 1 is a circuit diagram showing a first embodiment of the present invention, FIG.
FIGS. 3 and 4 show the second embodiment of the present invention. 3゜A circuit diagram showing the fourth embodiment, FIG. 5 is a characteristic diagram of the IGBT, and FIG. 6 is a sectional view of the IGBT in the first to fourth embodiments of the present invention.
FIG. 7 is a time chart showing the operation of the first @, and FIG. 8 is a diagram showing an example of the configuration of an inverter device according to an embodiment of the present invention. 1.2...DC power supply, 3,5,7,8,15,23゜27...Transistor, 4,6,9,11,17゜20
.. 22.24, 25, 26.28...Resistance, 10...
- IGBT, 12, 18, 29, 30... Diode, 13, 19.21... Capacitor, 14... Zener diode, 16... Photocoupler. tot tz t3i, tp ts

Claims (1)

【特許請求の範囲】 1、定電圧電源と、 コレクタ、エミッタ、及びゲートを有する静電誘導形自
己消弧素子と、 入力されたオン・オフ指令信号の大きさに応じて上記定
電圧電源から発生した電圧を上記静電誘導形自己消弧素
子のゲートに印加するゲート電圧入力回路と、 上記静電誘導形自己消弧素子のコレクタ電圧が所定の値
以上のとき、上記ゲート電圧を低下させ、上記ゲート電
圧が所定の値に低下するまで、上記静電誘導形自己消弧
素子がオンし続ける電圧を上記静電誘導形自己消弧素子
のゲートに印加する手段と を具備すること静電誘導形自己消弧素子の駆動回路。 2、定電圧電源と、 コレクタ、エミッタ、及びゲートを有する静電誘導形自
己消弧素子と、 入力されたオン・オフ指令信号の大きさに応じて上記定
電圧電源から発生した電圧を上記静電誘導形自己消弧素
子のゲートに印加するゲート電圧入力回路と、 上記静電誘導形自己消弧素子のコレクタ電圧が所定の値
以上のとき、上記ゲート電圧を低下させ、上記ゲート電
圧が所定の値に低下するまで、オフ指令信号の大きさに
応じて上記定電圧電源から発生した電圧を上記静電誘導
形自己消弧素子のゲートに印加せずに、上記静電誘導形
自己消弧素子がオンし続ける電圧を上記静電誘導形自己
消弧素子のゲートに印加する手段とを具備すること静電
誘導形自己消弧素子の駆動回路。 3、定電圧電源と、 コレクタ、エミッタ、及びゲートを有する静電誘導形自
己消弧素子と、 入力されたオン・オフ指令信号の大きさに応じて上記定
電圧電源から発生した電圧を上記静電誘導形自己消弧素
子のゲートに印加するゲート電圧入力回路と、 上記静電誘導形自己消弧素子のコレクタ電圧が所定の値
以上のとき、上記ゲート電圧を低下させ、上記ゲート電
圧が所定の値に低下するまで、上記静電誘導形自己消弧
素子のオン状態を保持させる回路と を具備すること静電誘導形自己消弧素子の駆動回路。 4、オンオフ指令信号に応じて静電誘導形自己消弧素子
のゲートにゲート電圧を供給するものにおいて、前記自
己消弧素子のコレクタ電圧が所定値以上の時、ゲート電
圧を低下する手段を備え、ゲート電圧が所定の値に低下
するまではオンオフ指令信号によつてオフできないよう
にしたことを特徴とする静電誘導形自己消弧素子の駆動
回路。 5、上記ゲート電圧を供給する駆動スイッチを、オンオ
フ指令信号と過電流検出による信号の両者で駆動するよ
うにしたことを特徴とする請求項1から請求項4の何れ
かに記載された静電誘導形自己消弧素子の駆動回路。 6、ゲート電圧が前記自己消弧素子のコレクタ側から所
定のゲート電圧以上に充電されないようにしたことを特
徴とする請求項1から請求項4の何れかに記載された静
電誘導形自己消弧素子の駆動回路。 7、ゲート電圧をゲート回路の電源にダイオードを用い
てクランプしたことを特徴とする請求項1から請求項4
の何れかに記載された静電誘導形自己消弧素子の駆動回
路。 8、自己消弧素子の中の1部のエミッタを分割して、コ
レクタ電圧検出用としたことを特徴とする、コレクタ電
圧検出端子付静電誘導形自己消弧素子。 9、ゲート電圧が所定の値に低下するまでオン信号の幅
を広げたことを特徴とする請求項1から請求項4の何れ
かに記載された静電誘導形自己消弧素子の駆動回路。 10、ゲート用電源と自己消弧素子のゲート端子間に、
ゲート端子電圧がゲート用電源電圧より大きくなつたと
きバイパスする手段を設けたことを特徴とする静電誘導
形自己消弧素子の駆動回路。 11、前記自己消弧素子のゲート端子とコレクタ端子と
の間に抵抗とダイオードを直列接続し、その接続点の電
位を比較信号に利用することを特徴とした請求項1から
請求項4の何れかに記載された静電誘導形自己消弧素子
の駆動回路。 12、前記自己消弧素子のゲート端子に供給するゲート
電圧発生回路とは別に比較信号発生回路有し、比較信号
と前記自己消弧素子のコレクタ端子との間に抵抗とダイ
オードを直列接続し、その接続点の電位を比較信号に利
用したことを特徴とする請求項1から請求項4の何れか
に記載された静電誘導形自己消弧素子の駆動回路。 13、前記比較信号発生回路と前記自己消弧素子のゲー
ト端子がダイオードを介して接続されていることを特徴
とする請求項12に記載の静電誘導形自己消弧素子の駆
動回路。 14、第1、第2及び第3の定電圧電源と、負荷と、 コレクタ、エミッタ、及びゲートを有し、コレクタ・エ
ミッタ電流路が第3の定電圧電源の一方の端子と他方の
端子との間に直列に接続され、該接続点に負荷が接続さ
れる第1及び第2の静電誘導形自己消弧素子と、 入力されたオン・オフ指令信号の大きさに応じて上記第
1の定電圧電源から発生した電圧を上記第1の静電誘導
形自己消弧素子のゲートに印加する第1のゲート電圧入
力回路と、 入力されたオン・オフ指令信号の大きさに応じて上記第
2の定電圧電源から発生した電圧を上記第2の静電誘導
形自己消弧素子のゲートに印加する第2のゲート電圧入
力回路と、 上記第1の静電誘導形自己消弧素子のコレクタ電圧が所
定の値以上のとき、上記第1の静電誘導形自己消弧素子
のゲート電圧を低下させ、上記ゲート電圧が所定の値に
低下するまで、オフ指令信号の大きさに応じて上記第1
の定電圧電源から発生した電圧を上記第1の静電誘導形
自己消弧素子のゲートに印加せずに、上記第1の静電誘
導形自己消弧素子のゲートに印加する手段と 上記第2の静電誘導形自己消弧素子のコレクタ電圧が所
定の値以上のとき、上記第2の静電誘導形自己消弧素子
のゲート電圧を低下させ、上記ゲート電圧が所定の値に
低下するまで、オフ指令信号の大きさに応じて上記第2
の定電圧電源から発生した電圧を上記第2の静電誘導形
自己消弧素子のゲートに印加せずに、上記第2の静電誘
導形自己消弧素子がオンし続ける電圧を上記第2の静電
誘導形自己消弧素子のゲートに印加する手段と を具備する静電誘導形自己消弧素子を有するインバータ
装置。
[Claims] 1. A constant voltage power source; an electrostatic induction type self-extinguishing element having a collector, an emitter, and a gate; a gate voltage input circuit for applying the generated voltage to the gate of the electrostatic induction type self-extinguishing element; , means for applying a voltage to the gate of the electrostatic induction type self-extinguishing element to keep the electrostatic induction type self-extinguishing element on until the gate voltage decreases to a predetermined value. Drive circuit for inductive self-extinguishing element. 2. A constant voltage power supply, an electrostatic induction type self-extinguishing element having a collector, an emitter, and a gate, and a voltage generated from the constant voltage power supply according to the magnitude of the input on/off command signal. A gate voltage input circuit that applies to the gate of the electrostatic induction self-extinguishing element, and when the collector voltage of the electrostatic induction self-extinguishing element is equal to or higher than a predetermined value, reduce the gate voltage so that the gate voltage reaches a predetermined value. According to the magnitude of the off command signal, the voltage generated from the constant voltage power supply is not applied to the gate of the electrostatic induction self-extinguishing element until the voltage decreases to the value of . and means for applying a voltage that keeps the element on to the gate of the electrostatic induction self-turning off element. 3. A constant voltage power supply, an electrostatic induction type self-extinguishing element having a collector, an emitter, and a gate, and a voltage generated from the constant voltage power supply according to the magnitude of the input on/off command signal to be connected to the static A gate voltage input circuit that applies to the gate of the electrostatic induction self-extinguishing element, and when the collector voltage of the electrostatic induction self-extinguishing element is equal to or higher than a predetermined value, reduce the gate voltage so that the gate voltage reaches a predetermined value. and a circuit for maintaining the on-state of the electrostatic induction self-turn-off element until the value of the electrostatic induction self-turn-off element decreases to a value of . 4. A device that supplies a gate voltage to the gate of an electrostatic induction type self-extinguishing element in response to an on/off command signal, comprising means for lowering the gate voltage when the collector voltage of the self-extinguishing element exceeds a predetermined value. 1. A drive circuit for an electrostatic induction self-extinguishing element, characterized in that it cannot be turned off by an on/off command signal until the gate voltage drops to a predetermined value. 5. The electrostatic capacitor according to any one of claims 1 to 4, wherein the drive switch for supplying the gate voltage is driven by both an on/off command signal and a signal from overcurrent detection. Drive circuit for inductive self-extinguishing element. 6. The electrostatic induction type self-extinguishing device according to any one of claims 1 to 4, wherein the gate voltage is not charged from the collector side of the self-extinguishing element to a level higher than a predetermined gate voltage. Arc element drive circuit. 7. Claims 1 to 4, characterized in that the gate voltage is clamped using a diode as a power source of the gate circuit.
A drive circuit for an electrostatic induction self-extinguishing element according to any one of the above. 8. An electrostatic induction type self-extinguishing element with a collector voltage detection terminal, characterized in that a part of the emitter in the self-extinguishing element is divided and used for collector voltage detection. 9. The drive circuit for an electrostatic induction type self-extinguishing element according to any one of claims 1 to 4, characterized in that the width of the ON signal is widened until the gate voltage drops to a predetermined value. 10. Between the gate power supply and the gate terminal of the self-extinguishing element,
1. A drive circuit for an electrostatic induction type self-extinguishing element, characterized in that it is provided with means for bypassing when the gate terminal voltage becomes higher than the gate power supply voltage. 11. Any one of claims 1 to 4, characterized in that a resistor and a diode are connected in series between the gate terminal and the collector terminal of the self-extinguishing element, and the potential at the connection point is used as a comparison signal. A drive circuit for an electrostatic induction type self-extinguishing element as described above. 12. A comparison signal generation circuit is provided separately from a gate voltage generation circuit that supplies the gate terminal of the self-extinguishing element, and a resistor and a diode are connected in series between the comparison signal and the collector terminal of the self-extinguishing element; 5. A drive circuit for an electrostatic induction type self-extinguishing element according to claim 1, wherein the potential at the connection point is used as a comparison signal. 13. The drive circuit for a static induction type self-turning element according to claim 12, wherein the comparison signal generating circuit and the gate terminal of the self-turning off element are connected via a diode. 14, comprising first, second, and third constant voltage power supplies, a load, a collector, an emitter, and a gate, with a collector-emitter current path connecting one terminal and the other terminal of the third constant voltage power supply; first and second electrostatic induction type self-extinguishing elements connected in series between them and a load connected to the connection point; a first gate voltage input circuit that applies a voltage generated from a constant voltage power source to the gate of the first electrostatic induction type self-extinguishing element; a second gate voltage input circuit that applies a voltage generated from a second constant voltage power supply to the gate of the second electrostatic induction self-extinguishing element; When the collector voltage is above a predetermined value, the gate voltage of the first electrostatic induction self-extinguishing element is lowered, and the gate voltage is lowered according to the magnitude of the OFF command signal until the gate voltage is reduced to a predetermined value. 1st above
means for applying a voltage generated from a constant voltage power source to the gate of the first electrostatic induction self-turning element without applying it to the gate of the first electrostatic induction self-turning element; When the collector voltage of the second electrostatic induction type self-extinguishing element is equal to or higher than a predetermined value, the gate voltage of the second electrostatic induction type self-extinguishing element is lowered, and the gate voltage is reduced to a predetermined value. up to the second turn according to the magnitude of the off command signal
Without applying the voltage generated from the constant voltage power source to the gate of the second electrostatic induction self-turn-off element, the voltage at which the second electrostatic induction self-turn-off element continues to be turned on is applied to the second electrostatic induction self-turn-off element. An inverter device having an electrostatic induction type self-extinguishing element, comprising means for applying voltage to the gate of the electrostatic induction type self-extinguishing element.
JP63199888A 1988-08-12 1988-08-12 Driving circuit of electrostatic induction type self-extinguishing element and inverter device having electrostatic induction type self-extinguishing element Expired - Fee Related JP2747911B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP63199888A JP2747911B2 (en) 1988-08-12 1988-08-12 Driving circuit of electrostatic induction type self-extinguishing element and inverter device having electrostatic induction type self-extinguishing element
DE68925163T DE68925163T2 (en) 1988-08-12 1989-07-31 Insulated gate transistor driver circuit; and their use in a switching circuit, a current switching device, and an induction motor system
EP89114091A EP0354435B1 (en) 1988-08-12 1989-07-31 A drive circuit for an insulated gate transistor; and its use in a switching circuit, a current switching apparatus and an induction motor system
US07/390,378 US5210479A (en) 1988-08-12 1989-08-07 Drive circuit for an insulated gate transistor having overcurrent detecting and adjusting circuits
KR1019890011497A KR0144679B1 (en) 1988-08-12 1989-08-12 Drive circuit for an insulted gate transistor having overcurrent detecting and adjusting circuits

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JP63199888A JP2747911B2 (en) 1988-08-12 1988-08-12 Driving circuit of electrostatic induction type self-extinguishing element and inverter device having electrostatic induction type self-extinguishing element

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JPH0250518A true JPH0250518A (en) 1990-02-20
JP2747911B2 JP2747911B2 (en) 1998-05-06

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03183209A (en) * 1988-11-16 1991-08-09 Fuji Electric Co Ltd Drive circuit for voltage driven type semiconductor element
JPH04261370A (en) * 1991-01-24 1992-09-17 Mitsubishi Electric Corp Current type inverter
JP2002135097A (en) * 2000-10-26 2002-05-10 Mitsubishi Electric Corp Semiconductor device and module thereof
JP2007030690A (en) * 2005-07-27 2007-02-08 Ntn Corp Bearing device for driving wheel, and axle module equipped with the same
JP2012034528A (en) * 2010-08-02 2012-02-16 Fuji Electric Co Ltd Power conversion device
JP2012065530A (en) * 2010-09-17 2012-03-29 Hyundai Motor Co Ltd Inverter drive device
JP2014079037A (en) * 2012-10-09 2014-05-01 Fuji Electric Co Ltd Gate drive circuit having failure detection circuit for semiconductor switch element
JP2014187443A (en) * 2013-03-22 2014-10-02 Nissin Electric Co Ltd Drive circuit
JP2014207620A (en) * 2013-04-15 2014-10-30 株式会社デンソー Drive circuit for switching element to be driven

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JP5612942B2 (en) * 2010-07-16 2014-10-22 株式会社ハーマン Stripping spatula for grilling net

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Publication number Priority date Publication date Assignee Title
JPS61185064A (en) * 1985-02-08 1986-08-18 Toshiba Corp Drive circuit of static induction type self-extinguishing element
JPS6258827A (en) * 1985-09-03 1987-03-14 株式会社日立製作所 Overcurrent protection system for transistor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61185064A (en) * 1985-02-08 1986-08-18 Toshiba Corp Drive circuit of static induction type self-extinguishing element
JPS6258827A (en) * 1985-09-03 1987-03-14 株式会社日立製作所 Overcurrent protection system for transistor

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03183209A (en) * 1988-11-16 1991-08-09 Fuji Electric Co Ltd Drive circuit for voltage driven type semiconductor element
JPH04261370A (en) * 1991-01-24 1992-09-17 Mitsubishi Electric Corp Current type inverter
JP2002135097A (en) * 2000-10-26 2002-05-10 Mitsubishi Electric Corp Semiconductor device and module thereof
JP2007030690A (en) * 2005-07-27 2007-02-08 Ntn Corp Bearing device for driving wheel, and axle module equipped with the same
JP2012034528A (en) * 2010-08-02 2012-02-16 Fuji Electric Co Ltd Power conversion device
JP2012065530A (en) * 2010-09-17 2012-03-29 Hyundai Motor Co Ltd Inverter drive device
JP2014079037A (en) * 2012-10-09 2014-05-01 Fuji Electric Co Ltd Gate drive circuit having failure detection circuit for semiconductor switch element
JP2014187443A (en) * 2013-03-22 2014-10-02 Nissin Electric Co Ltd Drive circuit
JP2014207620A (en) * 2013-04-15 2014-10-30 株式会社デンソー Drive circuit for switching element to be driven
US9461457B2 (en) 2013-04-15 2016-10-04 Denso Corporation Driver for target switching element and control system for machine using the same

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