Nothing Special   »   [go: up one dir, main page]

JPH0235763A - Substrate with terminal pin - Google Patents

Substrate with terminal pin

Info

Publication number
JPH0235763A
JPH0235763A JP18580788A JP18580788A JPH0235763A JP H0235763 A JPH0235763 A JP H0235763A JP 18580788 A JP18580788 A JP 18580788A JP 18580788 A JP18580788 A JP 18580788A JP H0235763 A JPH0235763 A JP H0235763A
Authority
JP
Japan
Prior art keywords
solder
terminal pin
weight
terminal
content
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18580788A
Other languages
Japanese (ja)
Other versions
JP2674789B2 (en
Inventor
Masaki Tanimoto
谷本 正樹
Toru Higuchi
徹 樋口
Takeshi Kano
武司 加納
Kaoru Mukai
薫 向井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP63185807A priority Critical patent/JP2674789B2/en
Publication of JPH0235763A publication Critical patent/JPH0235763A/en
Application granted granted Critical
Publication of JP2674789B2 publication Critical patent/JP2674789B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447Lead-in-hole components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent removal of a terminal pin from a substrate and to prevent deterioration in solder wettability of the terminal pin even under hot and humid conditions by fixing the head of a terminal pin to the substrate with a particular solder while coating at least the tip end of the terminal pin with a specified solder. CONSTITUTION:The whole surface of a pin body 13 is coated with an underlying layer 14 and the whole surface of the underlying layer 14 is coated with a solder coat layer 15, so that a terminal pin 3 is provided. The solder coat layer is provided by a solder material containing 80% by weight or less Sn. The head 4 of the terminal pin 3 is inserted in a through hole 2 from the bottom and soldered to the through hole 2 by supplying molten solder into the through hole 2. The solder 5 used for soldering the terminal pin contains 80% by weight or more Sn.

Description

【発明の詳細な説明】[Detailed description of the invention]

【産業上の利用分野] 本発明は、ビングリッドアレイなと半導体ノ(ツケーノ
を構成する端子ピン付き基板に関するものである。 【従来の技術] ピングリッド7・レイなどICチップ等の半導体チップ
8を搭載した半導体パッケージAはtISi図に示すよ
うに形成されている。すなわち、プリント配線板などで
作成される基板1の上面の中央にキャビティ用四所9を
形成すると共に基板1の上面にキャビティ用四所9を中
心とした放射状の回路(図示省略)を形成し、基板1に
形成したスルーホール2,2・・・に各回路と電気的に
接続されたスルーホールメツキを施し、スルーホール2
に端子ピン3の基部を挿入して端子ピン3を基板1の下
面に突出させ、そしてキャビティ用四所9に半導体チッ
プ7を実装すると共に半導体チップ7と各回路とをボン
ディングすることによって、基板1の上面に形成した回
路を介して半導体チップ7を各端子ピン3に電気的に接
続させるようにして作成される。さらに基板1の上面に
封止樹脂を注入して半導体チップ7を封止することによ
って仕上げられる。 そしてこのように形成される半導体パッケージAは、端
子ピン3の先部をマザーボード11などのスルーホール
やプラグ等に差し込んで半田付けすることによって、取
り付けがおこなわれるものである。 【発明が解決しようとする課題1 しかしこのものにあって、高温高温等が作用して端子ビ
ン3の母材金属が酸化されると半田に対する濡れが悪く
なり、マザーボード11に対する端子ビン3の半田付は
不良が発生するおそれがある。またマザーボード11に
端子ビン3を半田付けする際などに基板1と端子ビン3
とを固定する半田が溶けて基板1と端子ビン3との開に
抜けが発生するおそれがある。 本発明は上記の点に鑑みて為された6のであり、高温高
温が作用しても端子ビンの半田の濡れ性が低下すること
を防止できると共に端子ビンの抜けを防止することがで
きる端子ビン付き基板を提供することを目的とするもの
である。 【課題を解決するための手段1 本発明は、基板1に形成したスルーホール2に端子ビン
3の頭部4を挿入して取り付けた端子ビン付き基板にお
いて、端子ビン3の頭ff54を基板1にSn含有率8
0重量%以上の半田5で固定すると共に、端子ビン3の
少なくとも先端部をSn含有率が80重量%以下の半田
61′被覆して成ることを特徴とするものである。 【作 用】 本発明にあっては、端子ビン3の先端部をSn含有率が
80重量%以下の半田6で被覆することによって、高温
高湿の状態におかれても端子ビン3の半田濡れ性が低下
することを防止することができ、また端子ビン3の頭部
4を基板1にSn含有率80重量%以上の半田5で固定
することによって、実装半田付は時などに端子ビン3が
基板1から抜けることを防止することができる。 以下本発明の詳細な説明する。 端子ビン3はその上部に鍔12を介して頭部4を設けて
全体として円柱状に形成されるものであり、その母材と
なるビン本体13はリン青銅やコバール(7エルニコ)
などによって形成しである。 そして第2図に示すようにビン本体13の全表面に下地
メツキ14を施すと共にさらに下地メツキ14の全表面
に半田をコーティングして半田メツJ+15を施すこと
によって端子ビン3を形成するものである。下地メツキ
としてはNiメツキやCuメツキなどを用いることがで
きる。また、半田メツキ15はSn含有率が80重量%
以上の半田で形成されるようにしである。半田はSnと
pbあるいはこれらにさらに微量の金属を含む合金であ
り、Sn含有率を80重量%以上に設定することによっ
てpb含有率は20重量%程度以下になる。 一方、基板1はti4箔張り〃ラス布エポキシ樹脂積層
板などを加工したプリント配線板等で形成されるもので
あり、その上面の中央に半導体チップ8を搭載するため
のキャビティ用日所9を形成すると共に基板1の上面に
斗ヤビティ用凹所9を中心とした放射状の回路を形成し
、基板1に穿孔加工したスルーホール2,2・・・に各
回路と電気的に接続されたスルーホールメツキを施しで
ある、そしてスルーホール2に下側から端子ビン3の頭
部4を差し込み、スルーホール2に溶融半田を供給して
スルーホール2内に頭部4を半田付けし、基板1に端子
ビン3を固定する。例えば端子ビン3ごと基板1の下部
を半田浴に浸漬することよってこの半田付けをおこなう
ことができる。半田付けに用いる半田5としてはSn含
有率が80重景%以上(例えば90重量%程度)のもの
を用いるものである。 このようにSn含有率が80重量%以上の半田浴に浸漬
して半田付けすると端子ビン3はその先端部に至るまで
Sn含有率が80重量%以上の半田で被覆されることに
なるが、この後に端子ビン3の先端部をSn含有率が8
0重量%以下(例えば60重量%程度)の半田浴に浸漬
することによって、端子ビン3の先端部の半田をSn含
有率が80重量%以下のものと入れ換えて、このSn含
有率が80重量%以下の半田6で端子ビン3の先端部を
被覆する。端子ビン3の先端部をSn含有率が80m景
%以下の半田6で被覆することによって、高温高温が作
用しても端子ビン3の先端部の金属に酸化が生じること
を防止し、牛EE?濡れ性が低下することを有効に防ぐ
ことができるのである。 端子ビン3の金属が酸化されることを防止して半田の濡
れ性が低下することを防ぐ必要が特にあるのは、半導体
パッケージAとして仕上げた後にマザーボード11に差
し込んで半田付けする端子ビン3の先端部であるので、
端子ビン3の先端部(先端から1mm程度以上の範囲)
のみをSn含有率が80重量%以下の半田で被覆するよ
うにすれ1rよいのである。マザーボード11への実装
半田付けに用いられる半田はSn含有率が80重量%以
下のものが一般的である。またこのようにマザーボード
11に実装する際の牛[H付は時の熱の作用等で基板]
のスルーホール2に端子ビン3の頭部4を接合している
半田5が溶融して、端子ビン3が基板1から抜けるおそ
れがあるが、この半田5はSn含有率が80重量%以上
であるために融烹が高く、マザーボード11への実装に
用いる半田浴の温度では溶融しにくく、また溶融しても
溶融粘度が高く、端子ビン3が基板1から抜けることを
防ぐことができるものである。
[Industrial Field of Application] The present invention relates to a board with terminal pins constituting a pin grid array and a semiconductor chip. [Prior Art] A semiconductor chip 8 such as an IC chip such as a pin grid 7 or a lay The semiconductor package A equipped with the is formed as shown in the tISi diagram.That is, four cavities 9 are formed in the center of the top surface of a substrate 1 made of a printed wiring board, etc., and a cavity is formed on the top surface of the substrate 1. A radial circuit (not shown) is formed around the four points 9, and the through holes 2, 2... formed in the substrate 1 are plated with through holes that are electrically connected to each circuit. 2
By inserting the base of the terminal pin 3 into the substrate 1 to make the terminal pin 3 protrude from the bottom surface of the substrate 1, and mounting the semiconductor chip 7 in the four cavities 9 and bonding the semiconductor chip 7 and each circuit, the substrate is assembled. The semiconductor chip 7 is electrically connected to each terminal pin 3 through a circuit formed on the top surface of the semiconductor chip 1. Further, a sealing resin is injected into the upper surface of the substrate 1 to seal the semiconductor chip 7, thereby completing the process. The semiconductor package A thus formed is attached by inserting the tips of the terminal pins 3 into through holes, plugs, etc. of the motherboard 11 and soldering. Problem to be Solved by the Invention 1 However, in this device, when the base metal of the terminal pin 3 is oxidized due to high temperature, etc., wetting of the terminal pin 3 becomes poor, and the solder of the terminal pin 3 to the motherboard 11 becomes poor. There is a risk that defects may occur. Also, when soldering the terminal pin 3 to the motherboard 11, the board 1 and the terminal pin 3 are
There is a risk that the solder that fixes them will melt and the board 1 and the terminal pins 3 will come loose. The present invention has been made in view of the above points, and is a terminal bin that can prevent the solder wettability of the terminal bin from decreasing even when high temperatures are applied, and also prevent the terminal bin from coming off. The purpose of this invention is to provide a printed circuit board. [Means for Solving the Problems 1] The present invention provides a board with a terminal bin in which the head 4 of the terminal bin 3 is inserted and attached to the through hole 2 formed in the board 1. Sn content 8
It is characterized in that it is fixed with solder 5 of 0% by weight or more, and at least the tip of the terminal pin 3 is coated with solder 61' having a Sn content of 80% by weight or less. [Function] In the present invention, by coating the tip of the terminal pin 3 with the solder 6 having an Sn content of 80% by weight or less, the solder of the terminal pin 3 can be easily removed even under high temperature and high humidity conditions. It is possible to prevent the wettability from decreasing, and by fixing the head 4 of the terminal pin 3 to the board 1 with the solder 5 having an Sn content of 80% by weight or more, the terminal pin can be used for mounting soldering. 3 can be prevented from coming off from the substrate 1. The present invention will be explained in detail below. The terminal bottle 3 is formed into a columnar shape as a whole with a head 4 provided at the top via a collar 12, and the bottle body 13, which is the base material, is made of phosphor bronze or Kovar (7 Elnico).
It is formed by etc. Then, as shown in FIG. 2, the terminal pin 3 is formed by applying a base plating 14 to the entire surface of the bottle body 13, and further coating the entire surface of the base plating 14 with solder and applying a solder patch J+15. . As the base plating, Ni plating, Cu plating, etc. can be used. In addition, the Sn content of solder plating 15 is 80% by weight.
It is designed to be formed with the above solder. Solder is Sn and PB, or an alloy containing these and a trace amount of metal, and by setting the Sn content to 80% by weight or more, the PB content becomes about 20% by weight or less. On the other hand, the substrate 1 is formed of a printed wiring board made of a TI4 foil-covered lath cloth epoxy resin laminate, etc., and has a cavity 9 in the center of its upper surface for mounting a semiconductor chip 8. At the same time, radial circuits are formed on the upper surface of the substrate 1 around the dowel recess 9, and through holes 2, 2, . . . are electrically connected to the respective circuits. The head 4 of the terminal pin 3 is inserted into the through hole 2 from below, and the head 4 of the terminal pin 3 is soldered inside the through hole 2 by supplying molten solder to the through hole 2. Fix the terminal pin 3 to the For example, this soldering can be performed by immersing the lower part of the board 1 together with the terminal pin 3 in a solder bath. The solder 5 used for soldering has an Sn content of 80% by weight or more (for example, about 90% by weight). If the terminal pin 3 is immersed in a solder bath with an Sn content of 80% by weight or more and soldered in this way, the terminal pin 3 will be covered with solder with an Sn content of 80% by weight or more up to its tip. After this, the tip of the terminal pin 3 has a Sn content of 8
By immersing it in a solder bath with a Sn content of 80% by weight or less (for example, about 60% by weight), the solder at the tip of the terminal pin 3 is replaced with one with a Sn content of 80% by weight or less. % or less of solder 6 to cover the tip of the terminal pin 3. By coating the tip of the terminal pin 3 with solder 6 with an Sn content of 80% or less, oxidation of the metal at the tip of the terminal pin 3 is prevented even when exposed to high temperatures, and ? This effectively prevents the wettability from decreasing. It is especially necessary to prevent the metal of the terminal pin 3 from being oxidized and the wettability of the solder to decrease. Since it is the tip,
Tip of terminal pin 3 (range of about 1mm or more from the tip)
It is only necessary to cover only the solder with a solder having an Sn content of 80% by weight or less. The solder used for mounting and soldering to the motherboard 11 generally has an Sn content of 80% by weight or less. Also, when mounting on the motherboard 11 like this
There is a risk that the solder 5 that joins the head 4 of the terminal pin 3 to the through hole 2 will melt and the terminal pin 3 will come off from the board 1, but this solder 5 has an Sn content of 80% by weight or more. Because of this, it has a high melting temperature and is difficult to melt at the temperature of the solder bath used for mounting on the motherboard 11, and even if it melts, it has a high melt viscosity and can prevent the terminal pin 3 from coming off the board 1. be.

【実施例】【Example】

次に本発明を実施例によって例証する。。 ビン本体13をリン青銅で形成し、ビン本体13の表面
に下地メツキ14として厚み5μ簿のNiメツキを施す
と共にこの表面にSn/Pb=90/10(重量比)の
組成の半田/ツキ15を1μIの厚みで施しで端子ビン
3を作成した。次に@箔張りがラス布エポキシ樹脂積層
板を加工して作成した基板1にスルーホール2をドリル
加工して設け、このスルーホール2に上記端子ビン30
頭部4を差し込み、さらに半田浴に端子ビン3とともに
基@1の下部を浸漬して端子ビン3を基@1に半田付け
した。ここで、この半田5としてSn含有率を第1表の
ように変えた種々のものを用いた。 そしてこのように基板1に端子ビン3を半田接続した状
態で、端子ビン3の先端部を280℃の半田浴に10秒
間浸漬し、端子ビン3が基板1 )’l−ら抜けるか否
かを試験した。結果をplS1表に示す。 fpJ1表において分子に抜けた端子ビン3の数を、分
母に全体の端子ビン3の数を示す。 第1表にみられるように、Sl′!含有率が80重1%
以上の半田を用いることによって、端子ビン3の抜けを
防止できることが確認される。 次にSn含有率が90重量%の半田を用いて基Jfi1
に端子ビン3を半田接続したもの(No6)を用い、端
子ビン3の先端部を半田浴に4秒間浸漬してこの半田浴
の半田で端子ビン3の先端部を被覆した。ここで、この
半田6としてSn含有率を第2表のように変えた種々の
ものを用いた。 そしてこのものを1.00°Cのスチームを満たした容
器内で8時間放置するスチームエージング処理をおこな
い、さらに端子ビンの先端部をSn/Pb=90/10
(重量比)の組成の280°Cの半田浴に4秒間浸漬す
る試験をおこない、端子ビンの先端の濡れの状態を目視
でa察した。結果を第2表に示す、第2表において半田
濡れ性の良好なものを「○」、少し悪いものを「Δ」、
悪いものを「×」で表示した。また、175”Cのオー
プン中で12時間放置するエージング処理したものにつ
いても同様に試験した。 第2表にみられるように、端子ビン3の先端部をSn含
有率が80重量%以下の半田で被覆することによって、
半田濡れ性が低下することを防止でさることが確認され
る。セしてfpJ1表の結果を総合すると、端子ビン3
の抜けを防止すると共に端子ビン3の半田濡れ性の低下
を防止するためには、端子ビン3の頭部を基板】にSn
含有率80重量%以上の半田5″C固定すると共に、端
子ビンの先端部をSn含有率が80重量%以下の半田6
で被覆する必要のあることが確認される。
The invention will now be illustrated by examples. . The bottle body 13 is made of phosphor bronze, and the surface of the bottle body 13 is coated with Ni plating with a thickness of 5 μm as a base plating 14, and this surface is coated with solder/plating 15 having a composition of Sn/Pb=90/10 (weight ratio). Terminal pin 3 was made by applying it to a thickness of 1 μI. Next, a through hole 2 is drilled into the board 1 which @Foil Co., Ltd. has created by processing a lath cloth epoxy resin laminate, and the terminal pin 30 is inserted into this through hole 2.
The head 4 was inserted, and the lower part of the base 1 together with the terminal pin 3 was immersed in a solder bath to solder the terminal pin 3 to the base 1. Here, as the solder 5, various solders were used whose Sn content was changed as shown in Table 1. With the terminal pin 3 connected to the board 1 by soldering in this way, the tip of the terminal pin 3 is immersed in a 280°C solder bath for 10 seconds, and it is determined whether the terminal pin 3 can be removed from the board 1). was tested. The results are shown in table plS1. In the fpJ1 table, the number of missing terminal bins 3 is shown in the numerator, and the total number of terminal bins 3 is shown in the denominator. As seen in Table 1, Sl′! Content is 80% by weight
It is confirmed that by using the above solder, it is possible to prevent the terminal pin 3 from coming off. Next, using solder with a Sn content of 90% by weight, the base Jfi1
The tip of the terminal pin 3 was immersed in a solder bath for 4 seconds to cover the tip of the terminal pin 3 with the solder in the solder bath (No. 6). Here, as the solder 6, various solders with Sn content changed as shown in Table 2 were used. Then, this material was subjected to steam aging treatment by leaving it in a container filled with steam at 1.00°C for 8 hours.
A test was conducted in which the terminal pin was immersed in a solder bath at 280° C. having a composition of (weight ratio) for 4 seconds, and the state of wetting at the tip of the terminal pin was visually observed. The results are shown in Table 2. In Table 2, those with good solder wettability are marked "○", those with slightly poor solder wettability are marked "Δ",
Bad ones are marked with an "x". In addition, the same test was carried out on those that had been aged for 12 hours in an open environment at 175"C. As shown in Table 2, the tip of the terminal pin 3 was soldered with solder with an Sn content of 80% by weight or less. By covering with
It is confirmed that the reduction in solder wettability can be prevented. Terminal bin 3
In order to prevent the solder wettability of the terminal pin 3 from falling off and to prevent the solder wettability of the terminal pin 3 from decreasing, the head of the terminal pin 3 must be attached to the substrate.
Solder 5''C with a Sn content of 80% by weight or more is fixed, and the tip of the terminal pin is fixed with solder 6 with a Sn content of 80% by weight or less.
It is confirmed that it is necessary to cover with

【発明の効果】【Effect of the invention】

上述のように本発明にあっては、端子ビンの頭部を基板
にSnn含有率8垂 定すると共に、端子ビンの少なくとも先端部をSn含有
率が80重量%以下の半田で被覆しであるので、実装半
田付は時などに端子ビンが基板から抜けることをSn含
有率80重量%以上の半田による固定で防止することが
でき、また高温高湿の状態におかれても端子ビンの半田
濡れ性が低下することをSn含有率が80重量%以下の
半田による被覆で防止することができるものである。
As described above, in the present invention, the Snn content of the head of the terminal bin is 8% perpendicular to the substrate, and at least the tip of the terminal bin is coated with solder having an Sn content of 80% by weight or less. Therefore, during mounting soldering, it is possible to prevent the terminal pin from coming off the board by fixing it with solder with an Sn content of 80% by weight or more, and the soldering of the terminal pin can be prevented even if it is placed in high temperature and high humidity conditions. Deterioration of wettability can be prevented by coating with solder having an Sn content of 80% by weight or less.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の断面図、第2図は同上の端
子ビンの一部切欠拡大断面図である。 111基[、2はスルーホール、3は端子ビン、4は頭
部、5、6は半田である。
FIG. 1 is a sectional view of one embodiment of the present invention, and FIG. 2 is a partially cutaway enlarged sectional view of the same terminal bin. 111 units [, 2 is a through hole, 3 is a terminal pin, 4 is a head, 5 and 6 are solder.

Claims (1)

【特許請求の範囲】[Claims] (1)基板に形成したスルーホールに端子ピンの頭部を
挿入して取り付けた端子ピン付き基板において、端子ピ
ンの頭部を基板にSn含有率80重量%以上の半田で固
定すると共に、端子ピンの少なくとも先端部をSn含有
率が80重量%以下の半田で被覆して成ることを特徴と
する端子ピン付き基板。
(1) In a board with a terminal pin attached by inserting the head of the terminal pin into a through hole formed in the board, the head of the terminal pin is fixed to the board with solder having an Sn content of 80% by weight or more, and the terminal A board with terminal pins, characterized in that at least the tips of the pins are coated with solder having an Sn content of 80% by weight or less.
JP63185807A 1988-07-26 1988-07-26 Board with terminal pins Expired - Lifetime JP2674789B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63185807A JP2674789B2 (en) 1988-07-26 1988-07-26 Board with terminal pins

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63185807A JP2674789B2 (en) 1988-07-26 1988-07-26 Board with terminal pins

Publications (2)

Publication Number Publication Date
JPH0235763A true JPH0235763A (en) 1990-02-06
JP2674789B2 JP2674789B2 (en) 1997-11-12

Family

ID=16177232

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63185807A Expired - Lifetime JP2674789B2 (en) 1988-07-26 1988-07-26 Board with terminal pins

Country Status (1)

Country Link
JP (1) JP2674789B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112601353A (en) * 2020-12-23 2021-04-02 新沂市承翔电子有限公司 Electronic component pin and electronic component

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5875861A (en) * 1981-10-30 1983-05-07 Fuji Denka:Kk Lead wire for circuit element hermetically sealing package and manufacture thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5875861A (en) * 1981-10-30 1983-05-07 Fuji Denka:Kk Lead wire for circuit element hermetically sealing package and manufacture thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112601353A (en) * 2020-12-23 2021-04-02 新沂市承翔电子有限公司 Electronic component pin and electronic component

Also Published As

Publication number Publication date
JP2674789B2 (en) 1997-11-12

Similar Documents

Publication Publication Date Title
KR100398716B1 (en) Semiconductor module and circuit substrate
JP2518987B2 (en) Board soldering method using reducing atmosphere
US6307160B1 (en) High-strength solder interconnect for copper/electroless nickel/immersion gold metallization solder pad and method
KR100716094B1 (en) Semiconductor device
KR0124924B1 (en) Method of forming a solder layer on pads of a circuit and method of mounting an electric part on a circuit board
JP6280875B2 (en) Method for forming solder bump and solder bump
JPH0528000B2 (en)
KR100733556B1 (en) Bump forming method
US6029882A (en) Plastic solder array using injection molded solder
KR20120102803A (en) Lead-free solder joint structure and solder ball
US4509994A (en) Solder composition for high-density circuits
JP4799997B2 (en) Method for manufacturing printed circuit board for electronic device and electronic device using the same
US6433417B1 (en) Electronic component having improved soldering performance and adhesion properties of the lead wires
JPH0235763A (en) Substrate with terminal pin
Prasad et al. Introduction to surface mount technology
JPH0758173A (en) Semiconductor-device burning in method, and semiconductor device
JPH0235764A (en) Terminal pin for semiconductor package
WO1987004008A1 (en) Lead finishing for a surface mount package
JPH0235762A (en) Terminal pin for semiconductor package
Nguty et al. Rework of CSP: the effect on surface intermetallic growth
JPH05343593A (en) Connecting terminal
JP2903711B2 (en) Pre-soldering method for flat package
JPH0385750A (en) Semiconductor device and its mounting method
JPH0536695A (en) Semiconductor device and manufacture thereof
Kuttiyil Thomas et al. Soldering Defects