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JPH02294723A - Duplex control method for auxiliary memory device - Google Patents

Duplex control method for auxiliary memory device

Info

Publication number
JPH02294723A
JPH02294723A JP1115507A JP11550789A JPH02294723A JP H02294723 A JPH02294723 A JP H02294723A JP 1115507 A JP1115507 A JP 1115507A JP 11550789 A JP11550789 A JP 11550789A JP H02294723 A JPH02294723 A JP H02294723A
Authority
JP
Japan
Prior art keywords
auxiliary storage
storage device
data
memory
auxiliary memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1115507A
Other languages
Japanese (ja)
Inventor
Takeshi Niifuku
新福 健
Takane Kakuno
覚埜 高音
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1115507A priority Critical patent/JPH02294723A/en
Publication of JPH02294723A publication Critical patent/JPH02294723A/en
Pending legal-status Critical Current

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  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To secure the holding of the identity in the contents of duplexed auxiliary memory devices within the same time as a data writing time with one auxiliary memory device by writing/reading the data in/from either one of the duplexed devices and simultaneously wiring the writing data in the memory of the other auxiliary memory device, as well. CONSTITUTION:A processor 4 in a CPU 1 reads out/writes the data from/in the memories 5 in the auxiliary memory devices 2 through a duplex control part 7. Each of memory control parts 8, 9 reads out the data from the memory of its own auxiliary memory device, but writes the data simultaneously in the memory of the self-auxiliary memory device and the memory of the other device. Since the same data are written in both memories 5, 6 of the duplexed auxiliary memory devices 2, 3 within the same data writing time as the one used for the data writing time of one device, identity in the contents of the memories 5, 6 of the auxiliary memory devices 2, 3 can be secured.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、補助記憶装置の2重化制御方法に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a duplex control method for auxiliary storage devices.

〔従来の技術〕[Conventional technology]

第2図は、例えば特開昭82−115555号公報に示
された従来の計算機システム構成図であり、図において
、(1)は中央処理装置、(2)および(3)は補助記
憶装置、(4)はプロセッサ、(5)および(6》はメ
モリ、(7)は2重化制御部を示し、上記中央処理装置
(1)のプロセッサ(4) は、2重化制御部(7)を
介して補助記憶装置(2) . (3)のメモリ(5)
 , (8)を制御するようになされている。
FIG. 2 is a configuration diagram of a conventional computer system disclosed in, for example, Japanese Patent Application Laid-Open No. 82-115555. In the figure, (1) is a central processing unit, (2) and (3) are auxiliary storage devices, (4) is a processor, (5) and (6) are memories, and (7) is a duplication control unit, and the processor (4) of the central processing unit (1) is a duplication control unit (7). Auxiliary storage (2) through (3) memory (5)
, (8).

(発明が解決しようとする課題) 従来の計算機システムは以上のように構成されているた
め、中央処理装置のプロセッサは、2重化された補助記
憶装置のそれぞれに同一のデータを書き込まれなければ
ならず、補助記憶装置が1台のときより2倍のデータ書
き込み時間が必要であった。
(Problem to be Solved by the Invention) Since the conventional computer system is configured as described above, the processor of the central processing unit must write the same data to each of the duplicated auxiliary storage devices. Therefore, data writing time was twice as long as when there was only one auxiliary storage device.

この発明は、上記のような問題点を解消するためになさ
れたもので、補助記憶装置が1台のデータ書き込み時間
と同じ時間で2重化された補助記憶装置のメモリ内容の
同一性を保持することができる補助記憶装置の2重化制
御方法を提供するものである。
This invention was made to solve the above-mentioned problems, and it is possible to maintain the sameness of the memory contents of a duplicated auxiliary storage device in the same amount of time as the data writing time of one auxiliary storage device. The present invention provides a method for controlling redundancy of an auxiliary storage device that can perform the following steps.

〔課題を解決するための手段〕[Means to solve the problem]

この発朗に係る補助記憶装置の2重化制御方法は、中央
処理装置からアクセス可能な2重化されている補助記憶
装置を備える計算機システムにおいて、中央処理装置は
、2重化された補助記憶装置の各々が異常であること及
び復旧したことを検出する機能を持ち、2重化された補
助記憶装置のうち一方の補助記憶装首に異常を検出する
と、その補助記憶装置へのアクセスを中断して以降、他
方の健全な補助記憶装置のみで運転し、異常であった補
助記憶装置が復旧したことを検出すると、他方の健全な
補助記憶装置の内容をメモリ制御部を介して上記復旧し
た補助記憶装置ヘコビーした後、補助記憶装買の2重化
運転を再開し、データの書き込み及び読み出しは上記2
重化さわたどちらか一方の補助記憶装置に行い、一方の
補助記憶装置の書ぎ込みデータは補助記憶装置のメモリ
制御部を介して他方の補助記憶装置のメモリにも同時に
書ぎ込まれる機能を有するものである。
The duplication control method for auxiliary storage devices according to this invention is such that in a computer system equipped with a duplexed auxiliary storage device that can be accessed from a central processing unit, the central processing unit It has a function to detect whether each device is abnormal or has recovered, and if an abnormality is detected in one of the dual auxiliary storage devices, access to that auxiliary storage device will be interrupted. Since then, the system has operated only with the other healthy auxiliary storage device, and when it detects that the abnormal auxiliary storage device has been restored, the contents of the other healthy auxiliary storage device are restored via the memory control unit. After the auxiliary storage device has been damaged, redundant operation of the auxiliary storage device will be resumed, and data writing and reading will be performed as described in 2 above.
A function in which data written to one auxiliary storage device is simultaneously written to the memory of the other auxiliary storage device via the memory control unit of the auxiliary storage device. It has the following.

〔作用〕[Effect]

この発明において、中央処理装置は、データの書き込み
及びデータの読み出しは一方の補助記憶装置で行うが、
補助記憶装置のメモリ制御部は、中央処理装置から書ぎ
込みデータがきたときには、もう一方の補助記憶装置に
もそのデータを転送し、一方の補助記憶装置にデータを
書き込むと同時に他方の補助記憶装置にも同一データが
書き込まれ、補助記憶装置が1台のときのデータN %
込み時間と同じ時間で、2重化されている補助記憶装置
の両方のメモリにデータを書き込む。
In this invention, the central processing unit writes data and reads data in one of the auxiliary storage devices,
When the memory control unit of the auxiliary storage device receives write data from the central processing unit, it also transfers the data to the other auxiliary storage device, and simultaneously writes data to one auxiliary storage device and writes the data to the other auxiliary storage device. The same data is also written to the device, and the data N% when there is only one auxiliary storage device
Data is written to both memories of the duplicated auxiliary storage device in the same time as the write time.

〔実施例〕〔Example〕

第1図はこの発明を適用した場合の計算機システムのブ
ロック図であり、図中、(1)は中央処理装置、(2)
および(3)は補助記憶装置、(4)はプロセッサ、(
5)および(6)はメモリ、(7)は2重化制御部、(
8)および(9)はメモリ制御部を示し・、中央処理装
置(1)のプロセッサ(4)は2重化制御部(7) を
介して補助記憶装置(2)のメモリ(5)に対してデー
タの読み出し書き込みを行うようになされ、メモリ制御
部(8) , (9)はデータの読み出しは各自の補助
記憶装置のメモリから読み出すが、データの書き込みは
各自の補助記憶装置のメモリとともに他方の補助記憶装
置のメモリにも同時に行う。
FIG. 1 is a block diagram of a computer system to which this invention is applied, in which (1) is a central processing unit, (2)
and (3) is an auxiliary storage device, (4) is a processor, (
5) and (6) are memories, (7) is a duplex control unit, (
8) and (9) indicate memory control units. The processor (4) of the central processing unit (1) controls the memory (5) of the auxiliary storage device (2) via the duplication control unit (7). The memory control units (8) and (9) read data from the memory of each auxiliary storage device, but write data from the memory of each auxiliary storage device as well as the other memory. This is also done simultaneously for the memory of the auxiliary storage device.

例えば、ここで補助記憶装置(2)を現用、補助記憶装
置(3)を予備用とし、今、中央処理装置(1)より現
用の補助記憶装置(2)にデータの書込みがあると、現
用の補助記憶装置(2)内のメモリ制御部(8)は自装
置内のメモリ(5)に中央処理装置(1)からの書込み
データを書くとともに、予備の補助記憶装置(3)内の
メモリ(6)にも上記同じデータを書込む。
For example, if the auxiliary storage device (2) is currently used and the auxiliary storage device (3) is used as a backup, and now the central processing unit (1) writes data to the currently used auxiliary storage device (2), the current The memory control unit (8) in the auxiliary storage device (2) writes the write data from the central processing unit (1) to the memory (5) in its own device, and also writes the write data from the central processing unit (1) to the memory in the spare auxiliary storage device (3). The same data as above is also written in (6).

次に、補助記憶装置(2)に障害が発生した時と回復時
の動作について以下に記す。
Next, the operation when a failure occurs in the auxiliary storage device (2) and when it recovers will be described below.

補助記憶装置(2)の障害は、中央処理装置(1)の2
重化制御部(7) において検出され、プロセッサ(4
)に通知される。2重化制御部(7)は、補助記憶装置
(2)の障害を検出すると、プロセッサ(4)からの補
助記憶装置(2)又は(3)へのデータの読出し書込み
に対して、補助記憶装置(2)へのアクセスを中断し、
補助記憶装置(3)にデータの読出し書込みを行う。
The failure of the auxiliary storage device (2) is caused by the failure of the central processing unit (1).
The processor (4) detects the
) will be notified. When a duplication control unit (7) detects a failure in the auxiliary storage device (2), the duplication control unit (7) controls the auxiliary storage device (2) or (3) for reading and writing data from the processor (4) to the auxiliary storage device (2) or (3). suspending access to the device (2);
Data is read and written to the auxiliary storage device (3).

補助記憶装置(2)が障害から復旧すると、2重化制御
部(7)はこれを検出し、その旨をプロセッサ(4)に
通知する。プロセッサ(4)は、上記通知により、2重
化制御部(7)を介して補助記憶装置(2)にメモリ(
6)の内容をメモリ(5) にコピーするように指示す
る。この指示を受けた補助記憶装置(2)のメモリ制御
部(8)は、補助記憶装置(3)のメモリ(δ)の内容
を自装置(2)のメモリ(5)にコピー後、2重化運転
を再開する。
When the auxiliary storage device (2) recovers from the failure, the duplication control unit (7) detects this and notifies the processor (4) to that effect. In response to the above notification, the processor (4) stores the memory (
Instructs to copy the contents of 6) to memory (5). Having received this instruction, the memory control unit (8) of the auxiliary storage device (2) copies the contents of the memory (δ) of the auxiliary storage device (3) to the memory (5) of its own device (2), and then duplicates the contents. Resume operation.

以上説明したように、2重化された両方の補助記憶装置
(2) , (3)のメモリ(5) , (6)の内容
を同一にするために一方の補助記憶装置に書き込まれる
データはメモリ制御部(8) , (9)によって他方
の補助記憶装置のメモリに対しても同時に書き込まれる
ので、補助記憶装置が1台のときのデータ書き込み時間
と同じ時間で、2重化されている補助記憶装置の両方の
メモリにデータを書き込み、補助記憶装置(2) , 
(3)のメモリ(5) , (61 の内容を同一にす
ることができる。
As explained above, in order to make the contents of the memories (5) and (6) of both the duplicated auxiliary storage devices (2) and (3) the same, the data written to one of the auxiliary storage devices is Since data is simultaneously written to the memory of the other auxiliary storage device by the memory control units (8) and (9), the data is written in the same time as when there is only one auxiliary storage device, making it redundant. Write data to both memories of the auxiliary storage device, auxiliary storage device (2),
The contents of memories (5) and (61) in (3) can be made the same.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、補助記憶装置が2重化
になっても、メモリ制御部により各メモリにデータの書
き込みが同時に行われるので、補助記憶装置が1台のと
きのデータ書ぎ込み時間と同じ時間で、2重化されてい
る補助記憶装置の両方のメモリにデータを書き込み、補
助記憶装置のメモリの内容を同一性を保つことができる
As described above, according to the present invention, even if the auxiliary storage devices are duplicated, the memory control unit writes data to each memory at the same time, so data writing when there is only one auxiliary storage device is possible. Data can be written to both memories of the duplicated auxiliary storage device in the same time as the write time, and the contents of the memory of the auxiliary storage device can be kept identical.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明による計算機システムのブロック図、
第2図は従来の計算機システムのブロック図である。 図において、(1)は中央処理装置、(2)および(3
)は補助記憶装置、(4)はプロセッサ、(5)および
(6)はメモリ、(7)は2重化制御部、(8)および
(9)はメモリ制御部である。 なお、図中、同一符号は、同一又は相当部分を示す。 代理人  大  岩  増  雄 第 図 第 図 6 . 補正の内容 明細書第7頁第18行の 「内容を」 という記載を 稙 1年 8月29・日 「内容の」 と補正する。
FIG. 1 is a block diagram of a computer system according to this invention.
FIG. 2 is a block diagram of a conventional computer system. In the figure, (1) is the central processing unit, (2) and (3
) is an auxiliary storage device, (4) is a processor, (5) and (6) are memories, (7) is a duplication control section, and (8) and (9) are memory control sections. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Agent Masuo Oiwa Figure 6. On August 29, 1999, the statement ``Contents'' on page 7, line 18 of the Specification of Contents of the Amendment is amended to read ``Contents''.

Claims (1)

【特許請求の範囲】[Claims] 中央処理装置からアクセス可能な2重化されている補助
記憶装置を備える計算機システムにおいて、中央処理装
置は、2重化された補助記憶装置の各々が異常であるこ
と及び復旧したことを検出する機能を持ち、2重化され
た補助記憶装置のうち一方の補助記憶装置に異常を検出
すると、その補助記憶装置へのアクセスを中断して以降
、他方の健全な補助記憶装置のみで運転し、異常であっ
た補助記憶装置が復旧したことを検出すると、他方の健
全な補助記憶装置の内容をメモリ制御部を介して上記復
旧した補助記憶装置へコピーした後、補助記憶装置の2
重化運転を再開し、データの書き込み及び読み出しは上
記2重化されたどちらか一方の補助記憶装置に行い、一
方の補助記憶装置の書き込みデータは補助記憶装置のメ
モリ制御部を介して他方の補助記憶装置のメモリにも同
時に書き込まれる機能を有することを特徴とする補助記
憶装置の2重化制御方法。
In a computer system equipped with duplicated auxiliary storage devices accessible from the central processing unit, the central processing unit has a function of detecting that each of the duplicated auxiliary storage devices is abnormal and has been restored. If an abnormality is detected in one of the duplicated auxiliary storage devices, access to that auxiliary storage device is interrupted, and the operation is continued using only the other healthy auxiliary storage device, and the abnormality is detected. When it is detected that the auxiliary storage device that was previously restored has been restored, the contents of the other healthy auxiliary storage device are copied to the recovered auxiliary storage device via the memory control unit, and then the contents of the auxiliary storage device 2 are restored.
The duplication operation is restarted, data is written and read to one of the duplexed auxiliary storage devices, and the data written in one auxiliary storage device is transferred to the other auxiliary storage device via the memory control unit of the auxiliary storage device. 1. A redundant control method for an auxiliary storage device, characterized by having a function of simultaneously writing data into the memory of the auxiliary storage device.
JP1115507A 1989-05-09 1989-05-09 Duplex control method for auxiliary memory device Pending JPH02294723A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1115507A JPH02294723A (en) 1989-05-09 1989-05-09 Duplex control method for auxiliary memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1115507A JPH02294723A (en) 1989-05-09 1989-05-09 Duplex control method for auxiliary memory device

Publications (1)

Publication Number Publication Date
JPH02294723A true JPH02294723A (en) 1990-12-05

Family

ID=14664232

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1115507A Pending JPH02294723A (en) 1989-05-09 1989-05-09 Duplex control method for auxiliary memory device

Country Status (1)

Country Link
JP (1) JPH02294723A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0528538A2 (en) * 1991-07-18 1993-02-24 Tandem Computers Incorporated Mirrored memory multi processor system
JPH076099A (en) * 1992-12-17 1995-01-10 Internatl Business Mach Corp <Ibm> System and method for duplexing of remote data
JPH08147205A (en) * 1994-11-18 1996-06-07 Nec Corp Disk sharing system
JP4556003B2 (en) * 1999-03-29 2010-10-06 株式会社大一商会 Game machine
JP2011108007A (en) * 2009-11-18 2011-06-02 Internatl Business Mach Corp <Ibm> System formed by optical interconnection, method, io controller, memory unit, optical rink, and method of manufacturing the optical link (redundant storage fored with loop between two x type couplers)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0528538A2 (en) * 1991-07-18 1993-02-24 Tandem Computers Incorporated Mirrored memory multi processor system
EP0528538A3 (en) * 1991-07-18 1994-05-18 Tandem Telecomm Syst Mirrored memory multi processor system
US5495570A (en) * 1991-07-18 1996-02-27 Tandem Computers Incorporated Mirrored memory multi-processor system
JPH076099A (en) * 1992-12-17 1995-01-10 Internatl Business Mach Corp <Ibm> System and method for duplexing of remote data
JPH08147205A (en) * 1994-11-18 1996-06-07 Nec Corp Disk sharing system
JP4556003B2 (en) * 1999-03-29 2010-10-06 株式会社大一商会 Game machine
JP2011108007A (en) * 2009-11-18 2011-06-02 Internatl Business Mach Corp <Ibm> System formed by optical interconnection, method, io controller, memory unit, optical rink, and method of manufacturing the optical link (redundant storage fored with loop between two x type couplers)
US8521916B2 (en) 2009-11-18 2013-08-27 International Business Machines Corporation Method and system for connecting a host and multiple storage devices formed by optical interconnects and optical link creation method

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