JPH02193122A - Thin film transistor panel - Google Patents

Abstract

PURPOSE:To prevent a defect of a TFT from being recognized as a defect of an image by dividing a semiconductor layer for constituting a thin film transistor into plural pieces on the drain electrode side or the source electrode side. CONSTITUTION:A semiconductor layer 43 of a thin film transistor (TFT) 32 and a TFT 33 is formed as one body on the source electrode 38 side, and a one-body part 42 of this semiconductor layer is divided into two on the drain electrode 35 side and the drain electrode 47 side and comes to a semiconductor layer 36 and a semiconductor layer 37. Also, the semiconductor layer 36 is connected to the drain electrode 35 and the semiconductor layer 37 is connected to the drain electrode 47. Accordingly, the TFT 32 and the TFT 33 have the same function as two independent TFTs and operate as defect relief use TFTs each other. In such a way, a TFT panel in which even if a defect is generated, it is scarcely recognized as a defect of an image is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a thin film transistor in which pixel electrodes are arranged in a matrix on a substrate, and thin film transistors are arranged as switch elements for driving each of the pixels. The present invention relates to a panel that is applied to a liquid crystal display (LCD), which is a flat panel display.

-Arashime□□□Shige- With the advancement of advanced information technology in recent years, there is a desire for higher definition and higher brightness in the field of displays for displaying images. Currently, CRTs (cathode ray tubes) are the mainstream in most household and other fields. However, there is an increasing demand for flat panel displays that are small, lightweight, consume low power, and can provide high image quality. Among flat panel displays, LCDs using liquid crystals are currently the most widely used and promising displays. As driving methods for this LCD, there are a simple matrix driving method and an active matrix driving method. Among these, the active matrix driving method is a method in which a switch element is provided for each pixel to independently drive and control each pixel. Therefore 100 for each pixel
It is possible to drive with a duty ratio close to %, and it is possible to obtain a large pixel contrast ratio.

A thin film transistor (TPT) type switching element using amorphous silicon is considered promising because it can be made in a large area and can be manufactured at low cost, and much research is being conducted thereon. Characteristics of thin film transistor (TPT) displays using amorphous silicon include the possibility of large-area displays and the relatively low-temperature process (3
It can be manufactured at a temperature of around 00°C (around 00°C), so an inexpensive glass substrate can be used, and the continuous film formation maintains the cleanliness of the outer surface of the film.

Based on the above, thin film transistor (TPT) type displays employing an active matrix drive method and using amorphous silicon are expected to develop as candidates for future new media displays.

Next, we will discuss the conventional TFT-type devidis
The PT panel is shown in FIG. In this TPT panel, a large number of pixel electrodes 11 are arranged in a matrix on a roughly glass substrate, and each pixel electrode 11 is provided with one TFT 12 as a switch element for driving each pixel. A gate line 20 and a drain line 21 are patterned vertically and horizontally on the glass substrate, and a drain electrode 14 is formed to extend at a predetermined location of the drain line 21, and a gate electrode 13 is formed at a predetermined location of the gate line 2o. It becomes. A semiconductor layer 15 is laminated on the upper surface of this gate electrode 13 . A drain electrode 14 is connected to the semiconductor layer 15 , a source electrode 17 is formed opposite the drain electrode 14 with the semiconductor layer 15 in between, and the source electrode 17 is connected to the pixel electrode 11 .

The feature of the above method is that each pixel on the display surface is
Since the drive can be controlled independently by the PT, a display with a high contrast ratio without crosstalk between pixels can be obtained.

When such a TPT panel is applied to an LCD, it becomes a display in which each pixel is driven by each TFTL, and as the area of the display or the number of pixels increases, TPT defects increase. Alternatively, the number of display defects due to wiring breakage or wiring short-circuiting increases rapidly, and the yield of manufacturing switch elements decreases significantly. Normally, in a TPT panel, more than 100,000 TPTs are formed as switching elements on a glass substrate with a diagonal of 5 inches or more. Since it is recognized as always on or always off, it becomes impossible to achieve a sufficient display function as a display. Therefore, all TPTs must be fabricated without defects.

However, in the panel manufacturing process, it is difficult to eliminate TPT defects and variations in electrical characteristics.
As a result, the yield of TPT panels is low.

Therefore, as a means to solve such problems, conventionally,
It has been proposed to arrange a plurality of TPTs for one pixel. This type of TPT includes, for example, the one shown in FIG. This TPT has multiple channels divided,
Here, it is divided into two parts, and has a configuration in which two TFTs 18 are arranged. Therefore, even if one TPT becomes inoperable due to a defect, voltage can be applied to the pixel using the other TPT.

However, when a plurality of TPTs (for example, n TPTs) are arranged in one pixel, when a defect occurs in one TPT, the defect repair of the divided TPT as described above is difficult. The voltage applied to the pixel is reduced by 1/n. Therefore, when two TPTs are arranged in one pixel (n=2), if one of them is defective, the pixel current will be reduced by half.

In addition, since the channels of split-type TPTs are simply divided, each TPT is close to each other, and if dust or the like adheres, defects will occur in multiple TPTs that are close to each other.
The drawback was that defect relief did not work. For example, the sixth
If a disconnection occurs at location C in the figure, source electrode 1
Both of the 7's don't work.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a TPT panel in which TPT defects due to deposits are less likely to occur, and even if a TPT defect occurs, it is unlikely to be recognized as an image defect.

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a method in which pixel electrodes are arranged in a matrix on a substrate, and thin film transistors are arranged as switching elements for driving each pixel. The thin film transistor panel is characterized in that the semiconductor layer constituting the thin film transistor is divided into a plurality of pieces on the drain electrode side or the source electrode side.

- The TPT panel of the present invention is such that the semiconductor layer constituting the TPT is divided into a plurality of parts on the drain electrode side or the source electrode side, and between the divided electrode side and the undivided electrode side. As many current flows as the number of divided TPTs will occur, and there will be as many TPTs as the number of divided TPTs.

In this case, the divided semiconductor layers can be placed at positions apart from each other, and even if defects occur due to adhesion of dust to the divided parts of the semiconductor layer or the drain or source electrodes connected to these parts, other A current normally flows through the semiconductor layer and the drain electrode or source electrode connected thereto, and functions as a TPT.

Furthermore, when looking at the equivalent circuit of channel resistance for a plurality of TPTs formed by dividing a semiconductor layer, the divided portion is equivalent to resistors connected in parallel. On the other hand, the undivided portion of the semiconductor layer also functions as one resistor.

Therefore, the equivalent circuit of a plurality of TPT channels is the same as a parallel circuit with one resistor connected in series.

In this case, if the semiconductor layer is divided into n pieces, the resistance of the parallel circuit is R/n. Resistance connected in series R/n
Then, the combined resistance R8 of the entire TPT becomes 2R/n.

Now, if there is a defect in one part of the divided part, the resistance of the parallel circuit will be (n-11 pieces), and the resistance will be R/(n-1
It becomes 1. Therefore, the combined resistance R8 is as follows.

For example, when n=2, the combined resistance is (3721R,
From the combined resistance R when there are no defects in the divided parts of the semiconductor (
1/21 Only R becomes larger. If the voltage between the drain and source is 1, and the current is ID8, then the relationship 1os=V/Re holds true. When n = = 2, if there is no defect in the divided part of the semiconductor, ID, = V/R, and if there is a defect in one place, I
D, = (2/31 R), and Ios decreases by 173 compared to the case without defects.

From equation (1), it can be seen that when n is large (indeed, when a defect exists, Ro becomes small, so conversely, . . . , becomes large, and therefore the amount of decrease in IDS becomes small.

-1- Group One Example of the TPT panel according to the present invention will be described based on the drawings.

Figure 1 shows the TPT when the semiconductor layer of the TPT is divided into two parts.
An example of a panel is shown. In the figure, a large number of pixel electrodes 31 are arranged in a matrix on a glass substrate, and in order to drive these pixel electrodes 31, a TF is used as a switch element.
T32 and TFT33 are provided. Further, between each pixel electrode 31, a gate line 44 is formed in the horizontal direction, and a drain line 45 is formed in the vertical direction, and the gate electrode 34 is formed at a predetermined location of the gate line 44.
A drain electrode 35 is formed to extend at a predetermined location on the drain line 45 . The semiconductor layers 43 of the TFT 32 and the TFT 33 are integrated on the source electrode 38 side, and the integrated portion 42 of this semiconductor layer is connected to the drain electrode 38.
The semiconductor layer 36 and the semiconductor layer 37 are divided into two on the 5 side and the drain electrode 47 side. The semiconductor layer 36 is connected to the drain electrode 35, and the semiconductor layer 36 is connected to the drain electrode 35.
7 is connected to the drain electrode 47, and the semiconductor layer 43
An integral portion 42 of is connected to the source electrode 38. This source electrode 38 is connected to the pixel electrode 31.

The TFT 32 and the TFT 33 have the same function as two independent TPTs, and each work as a TPT for defect relief. The respective channels, namely the semiconductor layer 36 and the semiconductor layer 3
7 and the integral portion 42 of the semiconductor layer, where the charge mainly flows are shown in FIG.
-A line), and TPT33 flows from left to right (
B-B&91) Aya at the flowing part. That is, TFT32
The channels of TFT 32 and TFT 33 are separated on the drain electrode side, but have a part in common on the source electrode side, that is, the pixel electrode side, so that the drain-source currents Ins of TFT 32 and TFT 33 merge.

Next, FIG. 2 shows the cross-sectional structure of the TFT 32 and TFT 33 in the TPT panel described above. The sectional view shown in FIG. 2 shows the AA cross section and the BB cross section in FIG. 1, and shows the structures of the TFT 32 and the TFT 33. Note that although the TFT 32 and the TFT 33 have the same structure, they do not necessarily have to have the same shape. In the figure, a pixel electrode 31 is formed on a glass substrate 39, and a gate electrode 34 is patterned between the left and right pixel electrodes 31. A gate insulating film 40 is provided on the upper surface of the gate electrode 34,
Further, semiconductor layers 36, 37, and 42 and a protective layer 41 are formed in layers.

A protective layer 41 is formed on a part of the upper surface and side surfaces of the stacked layer of the gate insulating film 40 and the semiconductor layers 36, 37, and 42. Further, in the figure, a source electrode 38 is laminated on the right side with the protective layer 41 in the center in between, and a drain electrode 35 is laminated on the left side. In addition, the pixel electrode 31 is connected to the source electrode 38.
is connected.

To explain each laminated layer, the pixel electrode 31 is a transparent electrode made of, for example, indium oxide or tin oxide. For example, a metal such as chromium, tantalum, or molybdenum is used for the gate electrode 34. A low resistance metal such as aluminum is used for the drain electrode 35 and the source electrode 38, for example.

For example, hydrogenated amorphous silicon, polycrystalline silicon, or the like is used for the semiconductor layer 36, the semiconductor layer 37, and the integral portion 42 of the semiconductor layer. For example, silicon nitride, silicon oxide, or the like is used for the gate insulating film 40. For example, silicon nitride is used for the protective layer 41.

Next, the channel resistance in the TPT panel of this embodiment shown in FIGS. 1 and 2 will be explained. Figure 3 is T
An equivalent circuit of channel resistance of a combination of FT32 and TFT33 is shown. In FIG. 3(a), the part of the parallel circuit of two resistors R corresponds to the semiconductor layer 36 and the semiconductor layer 37, and the resistor R/2 corresponds to the integral part 42 of the semiconductor layer. Therefore, the combined resistance R8 of this equivalent circuit is R.

Next, FIG. 3(b) shows an equivalent circuit when a defect occurs in TFT 32 or TFT 33. The combined resistance R8 of this circuit is (3/2JR).

Comparing the currents flowing in the equivalent circuits of FIGS. 3(a) and 3(b), in the case of (a) where there is no defect in TFT32 and TFT33, 1. g=V/R, TPT32, TPT33
If there is a defect in any of , ■, 8 = [2/3L (
It becomes V/R1. Therefore, when a defect occurs, ■as decreases due to the fact that some channels are common.
Stay in. From this, the conventional two-part TFT1
8 had decreased to the normal level of 172 when the defect occurred, but the amount of decrease in ■D11 is small. Therefore, TFT
Even if a defect occurs in either TFT 33 or TFT 33, the contrast ratio of the image decreases little, so it is difficult to recognize it as a defect.

Further, as shown in FIG. 1, a semiconductor layer 36 and a semiconductor layer 37
are arranged so that they are separated from each other, so that deposits such as dust may adhere to the area indicated by D, for example, and cause the drain electrode 3
5 is disconnected and TFT32 does not operate, TPT3
3 is activated. Therefore, the TFT 33 works to relieve defects in the TFT 32, and the probability that both the TFT 32 and the TFT 33 will be defective is small.

Next, a method for manufacturing the above-mentioned TPT panel will be explained based on FIG. 4.

First, the glass substrate 39 is sufficiently cleaned and etched to form the pixel electrode 31 of indium oxide or tin oxide.
is formed to have a thickness of 1100 nm ((a) in the same figure).

Next, etching is performed on the glass substrate 39 to form a gate electrode 34 made of chromium or the like with a width of 16 μm.

Next, a gate insulating film 40 of silicon oxide, silicon nitride, etc. is formed to a thickness of 300 nm using a plasma CVD apparatus (Fig. C)).

Next, using the same apparatus, a semiconductor layer 36, a semiconductor layer 37, and an integral part 42 of the semiconductor layer made of amorphous silicon or the like are formed to have a gate line thickness of 200 nm, and etched (FIG. 4(d)).

Next, using the same apparatus, a protective layer 41 of silicon nitride, silicon oxide, etc. is formed to a thickness of 300 nm and etched (FIG. 4(e)).

Finally, a drain electrode 35 and a source electrode 38 made of aluminum or the like are formed to a thickness of 1 LL using a vacuum evaporation device.
Formed by m.

As mentioned above, since the TFT 32 and the TFT 33 are formed at the same time, the number of steps in the manufacturing process is the same as in the case of one thin film transistor.

The characteristics of the TPT panel thus produced were as shown below. The channel width was 160 μm and the channel length was 16 μm.

When the source-drain voltage is 5μ, the characteristics of the combined TFT32 and TFT33 are on-current. S is 50uA
(at gate voltage 15■), off current (gate voltage -5
■ time) was 11 pA, and the threshold value was 2 ■. TFT3
The characteristics when only TPT33 is activated when 2 is disconnected are as follows:
■Dll was 31 μA, which was about a 30% decrease in current. Also, regarding the yield, TFT32, TFT3
An improvement of approximately 5% was observed for all three items that were defective.

In this embodiment, the drain electrode side of the TPT semiconductor layer is divided, but it goes without saying that the same function can be achieved even if the source electrode side is divided. Also, the number of divisions is 2.
It is not limited to individuals. Further, the resistance value of the equivalent circuit is also for explanation, and is not limited to these values.

- Light Ban ■ Ying Mei - As is clear from the above explanation, the TPT according to the present invention
In the panel, the semiconductor layer constituting the TPT is divided into multiple parts on the drain electrode side or the source electrode side, so that part of the semiconductor layer is integrated and the other part is divided, and the number of divisions is A number of TPTs equal to . The equivalent circuit of the channel resistance in these TPTs is such that the resistor of the integral part is connected in series with the parallel resistor corresponding to the divided part. Therefore, if a defect occurs in a part of multiple TPTs corresponding to the divided portion, the number of parallel resistors decreases, the amount of increase in the combined resistance of multiple TPTs is small, and correspondingly, the drain The amount of decrease in the source current (2) can also be suppressed to a small value. As a result, the reduction in image contrast ratio is also reduced, and TPT defects are less likely to be recognized as image defects.

Furthermore, since the divided portions of the semiconductor layer can be placed apart, even if a defect occurs in a part of the TPT corresponding to the divided portion, the TPTs in other divided portions will operate normally, resulting in a large defect relief effect. .

As described above, the present invention can provide a TPT panel in which TPT defects are less likely to occur, and even if a defect occurs, it is unlikely to be recognized as an image defect.

[Brief explanation of the drawing]

FIG. 1 is a plan view showing an embodiment of a TFT panel according to the present invention, FIG. 2 is a cross-sectional view taken along A-A and B-B in FIG. 1, and FIG. 3 is a diagram showing the channel resistance of TPT. A circuit diagram showing an equivalent circuit, Fig. 4 is a cross-sectional view showing the process of manufacturing a TPT panel, Fig. 5 is a plan view showing a conventional TPT panel, and Fig. 6 is a diagram of a TPT panel with conventional defect relief. FIG.

Claims (1)

[Claims] In a thin film transistor panel in which pixel electrodes are arranged in a matrix on a substrate and thin film transistors are arranged as switch elements for driving each pixel, the semiconductor layer constituting the thin film transistor is located on the drain electrode side or the source electrode side. A thin film transistor panel characterized in that it is divided into a plurality of pieces on the side.