JPH02130912A - thin film semiconductor device - Google Patents
thin film semiconductor deviceInfo
- Publication number
- JPH02130912A JPH02130912A JP63285066A JP28506688A JPH02130912A JP H02130912 A JPH02130912 A JP H02130912A JP 63285066 A JP63285066 A JP 63285066A JP 28506688 A JP28506688 A JP 28506688A JP H02130912 A JPH02130912 A JP H02130912A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- semiconductor device
- layer
- film semiconductor
- amorphous
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 29
- 239000010409 thin film Substances 0.000 title claims description 14
- 239000000758 substrate Substances 0.000 claims description 12
- 239000011521 glass Substances 0.000 claims description 8
- 239000010408 film Substances 0.000 description 11
- 229910021417 amorphous silicon Inorganic materials 0.000 description 9
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 238000010894 electron beam technology Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 239000010453 quartz Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 239000006121 base glass Substances 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 210000004709 eyebrow Anatomy 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
- H10D30/6743—Silicon
Landscapes
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】 〔産業上の利用分野1 本発明は薄膜半導体装置の半導体薄膜構造に関する。[Detailed description of the invention] [Industrial application field 1 The present invention relates to a semiconductor thin film structure of a thin film semiconductor device.
従来薄膜半導体装置として、石英基板上に多結晶Si膜
を形成し、該多結晶Si膿に半導体装置を形成した薄膜
半導体装置や、コーニング#7059ガラス基板上にア
モルファスSi膜を形成し、該アモルファスSi膜に半
導体装置を形成した薄膜半導体装置があった。Conventional thin film semiconductor devices include thin film semiconductor devices in which a polycrystalline Si film is formed on a quartz substrate and a semiconductor device is formed on the polycrystalline Si, and an amorphous Si film is formed on a Corning #7059 glass substrate and the amorphous There has been a thin film semiconductor device in which a semiconductor device is formed in a Si film.
〔発明が解決しようとする課題1
しかし、上記従来技術によると1石英基板上の多結晶S
i膜による薄膜半導体装置は半導体装置の動作速度は速
いが、石英基板がガラス基板に比し、1桁程度高価にな
ると云う課題があり、ガラス基板上のアモルファスSi
膜による薄膜半導体装置はガラス基板の価格は低廉では
あるが半導体装置の動作速度が遅いと云う課題があった
。[Problem to be solved by the invention 1 However, according to the above conventional technology, polycrystalline S on a quartz substrate
Thin film semiconductor devices using i-films have a high operating speed, but there is a problem in that quartz substrates are about an order of magnitude more expensive than glass substrates, and amorphous silicon on glass substrates
Although the cost of a glass substrate for a thin film semiconductor device using a film is low, there is a problem in that the operating speed of the semiconductor device is slow.
本発明は、かかる従来技術の課題を解決し、低廉で且つ
動作速度の速い薄膜半導体装置を提供する事を目的とす
る。It is an object of the present invention to solve the problems of the prior art and to provide a thin film semiconductor device that is inexpensive and operates at high speed.
【課題を解決するための手段]
上記課題を解決するために、本発明は薄膜半導体装置に
関し、ガラス基板上にアモルファス半導体層と多結晶半
導体層との2層構造から成る半導体層を形成し、該2層
構造半導体層に半導体装置が形成する手段をとる事を基
本とする。[Means for Solving the Problems] In order to solve the above problems, the present invention relates to a thin film semiconductor device, in which a semiconductor layer having a two-layer structure of an amorphous semiconductor layer and a polycrystalline semiconductor layer is formed on a glass substrate, Basically, a method is adopted in which a semiconductor device is formed in the two-layer structure semiconductor layer.
[実 施 例] 以下、実施例により本発明を詳述する。[Example] Hereinafter, the present invention will be explained in detail with reference to Examples.
第1図は本発明の一実施例を示す薄膜半導体トランジス
タ(TFT:Th1n FilmTrans i 5
tor)の断面図である。すなわち、コーニング#70
59等から成るガラス基板1の表面には、CVD法ある
いはスパッタ法等によるアモルファスSi層2を形成し
、該アモルファスSi層2の表面な遠紫外線光や遠紫外
線レーザー光線あるいは、低加速電子線を走査法あるい
は一括照射法等による照射し、多結晶Si層3となし、
該多結晶Si層3にゲート絶縁膜4、ゲート電極5及び
層間絶縁膜6から成るMOSFET (Metal−O
xide−Semic。FIG. 1 shows a thin film semiconductor transistor (TFT) showing an embodiment of the present invention.
FIG. i.e. Corning #70
An amorphous Si layer 2 is formed on the surface of a glass substrate 1 made of 59 or the like by a CVD method or a sputtering method, and the surface of the amorphous Si layer 2 is scanned with deep ultraviolet light, far ultraviolet laser light, or a low-acceleration electron beam. irradiation by a method or a batch irradiation method to form a polycrystalline Si layer 3,
A MOSFET (Metal-O
xide-Semic.
nductor Field EffectTra
ns i 5tar)をリース7、ドレイン8及びゲー
ト9として形成したものである0本例によるアモルファ
スSi層は、光線や電子線によるアニール膜の熱緩衝の
作用をし、下地ガラス基板lのアニール膜の融解や熱歪
発生によるクラック等を防止する作用がある。又、アニ
ール時の多結晶Si層3の厚さは、光線の波長や電子線
の加速エネルギーによって極く表面の900人程残存限
定する事ができ、下地アモルファスSi層2は。ndductor Field EffectTra
The amorphous Si layer according to this example, which is formed of ns i 5 tar) as the lease 7, drain 8, and gate 9, acts as a thermal buffer for the annealed film against light beams and electron beams, and the annealed film on the base glass substrate l. This has the effect of preventing cracks and the like caused by melting and thermal strain. Further, the thickness of the polycrystalline Si layer 3 during annealing can be limited to approximately 900 layers remaining on the surface depending on the wavelength of the light beam and the acceleration energy of the electron beam, and the thickness of the underlying amorphous Si layer 2 can be limited to approximately 900 layers.
1000人程度残存させれば良く、予め形成されるアモ
ルファスSi層は2000人程度以下でも良い、又、ゲ
ート絶縁膜は、CVD、SiO□膜等低温で形成される
ものとなる。更に、アモルファスSi層2の作用は熱緩
衝の外・抵抗値が絶縁物に近いので、素子分離としても
用いることができる。Approximately 1,000 people may remain, and the pre-formed amorphous Si layer may be about 2,000 people or less, and the gate insulating film may be formed at a low temperature, such as by CVD or a SiO□ film. Furthermore, since the amorphous Si layer 2 has a function other than thermal buffering and has a resistance value close to that of an insulator, it can also be used for element isolation.
尚、半導体層はSi層のみならず、Ge、SiC,Se
、GaAs、InP等の他の半導体材料で構成されても
良い事は云うまでもない。Note that the semiconductor layer is not only a Si layer but also Ge, SiC, Se
It goes without saying that it may be made of other semiconductor materials such as , GaAs, and InP.
[発明の効果]
本発明により低廉で且つ動作速度の速い薄膜半導体装置
が製作できる効果がある。[Effects of the Invention] The present invention has the advantage that a thin film semiconductor device that is inexpensive and has a high operating speed can be manufactured.
第1図は本発明の一実施例を示す薄膜半導体装置の断面
図である。
1 ・ ・ ・
2 ・ ・ ・
3 ・ ・ ・
4 ・ ・ ・
5 ・ ・ ・
6 ・ ・ ・
7 ・ ・ ・
8 ・ ・ ・
9 ・ ・ ・
ガラス基板
アモルファスSi層
多結晶Si層
ゲート絶縁膜
ゲート電極
眉間絶縁膜
リース
ドレイン
ゲート
以
上
出願人 セイコーエプソン株式会社FIG. 1 is a sectional view of a thin film semiconductor device showing one embodiment of the present invention. 1 ・ ・ ・ 2 ・ ・ ・ 3 ・ ・ 4 ・ ・ ・ 5 ・ ・ 6 ・ ・ 7 ・ ・ ・ 8 ・ ・ ・ 9 ・ ・ ・ Glass substrate Amorphous Si layer Polycrystalline Si layer Gate Insulating film Gate electrode Applicant for eyebrow insulating film lease drain gate and above Seiko Epson Corporation
Claims (1)
層との2層構造から成る半導体層が形成され、該2層構
造半導体層に半導体装置が形成されて成る事を特徴とす
る薄膜半導体装置。A thin film semiconductor device characterized in that a semiconductor layer having a two-layer structure of an amorphous semiconductor layer and a polycrystalline semiconductor layer is formed on a glass substrate, and a semiconductor device is formed on the two-layer structure semiconductor layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63285066A JPH02130912A (en) | 1988-11-11 | 1988-11-11 | thin film semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63285066A JPH02130912A (en) | 1988-11-11 | 1988-11-11 | thin film semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02130912A true JPH02130912A (en) | 1990-05-18 |
Family
ID=17686718
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63285066A Pending JPH02130912A (en) | 1988-11-11 | 1988-11-11 | thin film semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02130912A (en) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06291316A (en) * | 1992-02-25 | 1994-10-18 | Semiconductor Energy Lab Co Ltd | Thin film insulated gate semiconductor device and manufacture thereof |
JPH0817731A (en) * | 1994-06-28 | 1996-01-19 | New Japan Radio Co Ltd | Manufacture of semiconductor device |
US5773309A (en) * | 1994-10-14 | 1998-06-30 | The Regents Of The University Of California | Method for producing silicon thin-film transistors with enhanced forward current drive |
US5894151A (en) * | 1992-02-25 | 1999-04-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having reduced leakage current |
US6028333A (en) * | 1991-02-16 | 2000-02-22 | Semiconductor Energy Laboratory Co., Ltd. | Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors |
WO2001099199A1 (en) * | 2000-06-23 | 2001-12-27 | Nec Corporation | Thin-film transistor and method of manufacture thereof |
US6352883B1 (en) | 1991-02-22 | 2002-03-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
US6458200B1 (en) | 1990-06-01 | 2002-10-01 | Semiconductor Energy Laboratory Co., Ltd. | Method for fabricating thin-film transistor |
US6709907B1 (en) | 1992-02-25 | 2004-03-23 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating a thin film transistor |
-
1988
- 1988-11-11 JP JP63285066A patent/JPH02130912A/en active Pending
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7018874B2 (en) | 1990-06-01 | 2006-03-28 | Semiconductor Energy Laboratory Co., Ltd. | Method for fabricating thin-film transistor |
US6740547B2 (en) | 1990-06-01 | 2004-05-25 | Semiconductor Energy Laboratory Co., Ltd. | Method for fabricating thin-film transistor |
US6458200B1 (en) | 1990-06-01 | 2002-10-01 | Semiconductor Energy Laboratory Co., Ltd. | Method for fabricating thin-film transistor |
US6028333A (en) * | 1991-02-16 | 2000-02-22 | Semiconductor Energy Laboratory Co., Ltd. | Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors |
US6717180B2 (en) | 1991-02-22 | 2004-04-06 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
US6352883B1 (en) | 1991-02-22 | 2002-03-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
US5894151A (en) * | 1992-02-25 | 1999-04-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having reduced leakage current |
US6709907B1 (en) | 1992-02-25 | 2004-03-23 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating a thin film transistor |
JPH06291316A (en) * | 1992-02-25 | 1994-10-18 | Semiconductor Energy Lab Co Ltd | Thin film insulated gate semiconductor device and manufacture thereof |
US7148542B2 (en) | 1992-02-25 | 2006-12-12 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method of forming the same |
US7649227B2 (en) | 1992-02-25 | 2010-01-19 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method of forming the same |
JPH0817731A (en) * | 1994-06-28 | 1996-01-19 | New Japan Radio Co Ltd | Manufacture of semiconductor device |
US5773309A (en) * | 1994-10-14 | 1998-06-30 | The Regents Of The University Of California | Method for producing silicon thin-film transistors with enhanced forward current drive |
WO2001099199A1 (en) * | 2000-06-23 | 2001-12-27 | Nec Corporation | Thin-film transistor and method of manufacture thereof |
US7052944B2 (en) | 2000-06-23 | 2006-05-30 | Nec Corporation | Thin-film transistor and method of manufacture thereof |
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