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JPH0169382U - - Google Patents

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Publication number
JPH0169382U
JPH0169382U JP1987163526U JP16352687U JPH0169382U JP H0169382 U JPH0169382 U JP H0169382U JP 1987163526 U JP1987163526 U JP 1987163526U JP 16352687 U JP16352687 U JP 16352687U JP H0169382 U JPH0169382 U JP H0169382U
Authority
JP
Japan
Prior art keywords
fet
tertiary winding
converter
pwm control
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1987163526U
Other languages
Japanese (ja)
Other versions
JPH066711Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987163526U priority Critical patent/JPH066711Y2/en
Publication of JPH0169382U publication Critical patent/JPH0169382U/ja
Application granted granted Critical
Publication of JPH066711Y2 publication Critical patent/JPH066711Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Dc-Dc Converters (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す構成図、第2
図は第1図の動作説明に供する各部の波形図であ
る。 1……直流電源、2……変成器、3……主スイ
ツチ、4……整流平滑回路、5……PWM制御回
路、6……パルストランス、7……FETスイツ
チ、8……平滑回路、9……PWM制御回路、1
0……フオトカプラ。
Fig. 1 is a configuration diagram showing one embodiment of the present invention;
The figure is a waveform diagram of each part used to explain the operation of FIG. 1. 1... DC power supply, 2... Transformer, 3... Main switch, 4... Rectifier smoothing circuit, 5... PWM control circuit, 6... Pulse transformer, 7... FET switch, 8... Smoothing circuit, 9...PWM control circuit, 1
0...Photocoupler.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] スイツチング電源において、出力電圧を第1の
PWM制御回路でクロツク信号に変換しパルスト
ランスを介して主スイツチをオンオフする第1の
コンバータと、この第1のコンバータの主トラン
スに3次巻線を設けこの3次巻線に直列に設けた
FETスイツチと平滑回路からなる第2のコンバ
ータと、前記パルストランスに3次巻線を設けこ
の3次巻線の一端を前記FETスイツチのソース
に接続し他端をフオトカプラの2次側を介して該
FETスイツチのゲートに接続したFET駆動回
路と、前記第1のPWM制御回路と同期し前記第
2のコンバータの出力電圧を検出しクロツク信号
に変換する第2のPWM制御回路とを備え、この
第2のPWM制御回路の出力を前記フオトカプラ
の1次側に接続したことを特徴とするFET整流
を用いた多出力電源装置。
In a switching power supply, a first converter converts the output voltage into a clock signal in a first PWM control circuit and turns the main switch on and off via a pulse transformer, and a tertiary winding is provided in the main transformer of this first converter. A second converter includes a FET switch and a smoothing circuit provided in series with the tertiary winding, a tertiary winding is provided in the pulse transformer, and one end of the tertiary winding is connected to the source of the FET switch. an FET drive circuit whose end is connected to the gate of the FET switch via the secondary side of a photocoupler; and a FET drive circuit which detects the output voltage of the second converter in synchronization with the first PWM control circuit and converts it into a clock signal. 1. A multi-output power supply device using FET rectification, characterized in that the output of the second PWM control circuit is connected to the primary side of the photocoupler.
JP1987163526U 1987-10-26 1987-10-26 Multi-output power supply device using FET rectification Expired - Lifetime JPH066711Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987163526U JPH066711Y2 (en) 1987-10-26 1987-10-26 Multi-output power supply device using FET rectification

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987163526U JPH066711Y2 (en) 1987-10-26 1987-10-26 Multi-output power supply device using FET rectification

Publications (2)

Publication Number Publication Date
JPH0169382U true JPH0169382U (en) 1989-05-09
JPH066711Y2 JPH066711Y2 (en) 1994-02-16

Family

ID=31448324

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987163526U Expired - Lifetime JPH066711Y2 (en) 1987-10-26 1987-10-26 Multi-output power supply device using FET rectification

Country Status (1)

Country Link
JP (1) JPH066711Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011009701A (en) * 2009-05-19 2011-01-13 Rohm Co Ltd Drive circuit of light-emitting diode, light-emitting device and display device using the same, and method of protecting the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011009701A (en) * 2009-05-19 2011-01-13 Rohm Co Ltd Drive circuit of light-emitting diode, light-emitting device and display device using the same, and method of protecting the same
US8730228B2 (en) 2009-05-19 2014-05-20 Rohm Co., Ltd. Driving circuit for light emitting diode

Also Published As

Publication number Publication date
JPH066711Y2 (en) 1994-02-16

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