JPH0136291B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a vertical current switching circuit.

Vertical current switching circuits are widely used due to their high speed operation and small number of elements used, but they require a reference voltage to perform current switching operations, and this reference voltage is A method of generating and supplying it by a circuit is generally practiced. However, since this method requires a separate reference voltage generation circuit, it has drawbacks such as an increase in the number of elements used and an increase in power consumption. In recent large-scale integrated circuits, the power consumption of this reference voltage circuit has come to account for about 20-25% of the power consumption of the entire chip. It was becoming a problem. In addition, the wiring for supplying the reference voltage to each current switching circuit is
Problems such as restrictions on logic circuit wiring also occurred.

The present invention solves these problems and proposes a current switching type logic circuit which generates a reference voltage in a current switching circuit and automatically supplies the reference voltage.

According to the present invention, since there is no need to supply a reference voltage from another source, the aforementioned power consumption problems and wiring restrictions can be avoided.

Next, the present invention will be explained in detail with reference to the drawings.

Figure 1 shows a conventional vertical current switching circuit.
Three sets of transistors with their emitters connected in common
Q ₁ to Q ₆ constitute a vertical type with current switching type.
The reference voltage terminal corresponding to input terminals 1 and 2 is 6, and the reference voltage terminal corresponding to input terminal 3 is 7, and each reference voltage is usually set at the center of the input logic levels. The respective reference voltages are generated by, for example, a circuit as shown on the right side of FIG. 1, and when reference voltage terminals 6 and 8 or 7 and 9 are connected, the logic circuit of FIG. 1 becomes operational. I ₁ and I ₂ are constant current sources.

As is clear from FIG. 1, the conventional vertical current switching type logic circuit requires a reference voltage generation circuit in addition to the vertical circuit, and also requires wiring for supplying the reference voltage to the vertical circuit. For this reason, when realizing a large-scale integrated circuit, problems such as increased power consumption and reference voltage supply lines restricting the realization of other logic lines have arisen.

FIG. 2 is a diagram showing an embodiment of a vertical current switching type logic circuit according to the present invention. In order to clarify the correspondence with FIG. 1, the same elements are marked with dashes. In FIG. 2, the emitters of transistors Q ₂ ′ and Q ₄ ′ are commonly connected to the emitters of other transistors Q ₁ ′ and Q ₃ ′ via resistors R _E1 and R _E2 , _respectively . ′ is connected to the emitter of the transistor Q ₄ ′, and the emitter of the transistor Q ₆ ′ is connected to the transistor Q 6 ′ via the resistor R _E3 .
This configuration is commonly connected to the emitter of _Q5 '. Next, to briefly explain the circuit operation, R _c1 ′=R _c2 ′=
Assume that 2R, R _c11 = R _c12 = R _E1 = R _E2 = R _E3 = R.
The following four types of input signals may be applied to the input terminals 1' and 3'.

Input terminal 1' Input terminal 3' (1) HIGH HIGH (2) HIGH LOW (3) COW HIGH (4) COW LOW In state (1), transistor Q ₅ ' and transistor
Q ₁ ' becomes conductive and output terminal 5' becomes LOW. In the initial state, transistors Q ₁ ′ and Q ₃ ′ are non-conducting and almost GND potential is applied to the base of Q ₂ ′, making current switching seem difficult, but when Q ₂ ′ becomes conductive, a voltage drop occurs due to resistor R _E1. The emitter of Q ₁ ' becomes low potential and rapidly forward biases the base-emitter of transistor Q ₁ ', so that transistor Q ₁ ' becomes conductive and Q ₂ ' becomes non-conductive and settles down. Also, if the output terminal 5' is in the LOW state in the initial state,
The base of the transistor Q ₂ ′ has 1/2 of the logic amplitude Vl.
By applying the voltage HIGH to the input terminal 1', the transistor Q ₁ ' becomes conductive unconditionally. The same phenomenon occurs in the case of transistor Q ₆ ′, and Q ₅ ′ eventually becomes conductive. When input terminal 3' becomes LOW in state (2), the base potential of transistor Q ₆ ' becomes higher and Q ₆ ' becomes conductive.
Furthermore, for states (3) and (4) in which Q ₃ ′ is conductive, similar operations result in Q ₅ ′, Q ₂ ′ (state (3)), Q ₆ ′,
Q ₄ ′ (state (4)) becomes conductive. As is clear from the above description, the circuit shown in FIG. 2 can generate a reference voltage within itself and perform logical operations using internal wiring.

As is clear from the above explanation, in the vertical current switching circuit according to the present invention, the reference voltage is naturally generated.
Since no supply is required from elsewhere, the power of the reference voltage circuit can be reduced and wiring restrictions can be removed.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the configuration of a conventional vertical current switching circuit, and FIG. 2 is a diagram showing an embodiment of the vertical current switching circuit according to the present invention. Q ₁ ~ Q ₆ , Q ₁ ′ ~ _{Q 6} ′...transistor, R _c1 ,
R _c2 , R _c1 ′, R _c2 ′, R _c11 , R _c12 , R _E1 , R _E2 , R _E3 …
...Resistance, I ₁ , I ₂ , I ₁ ′ ... Constant current, V _EE ... Power supply.

Claims (1)

[Claims] 1. A first transistor whose emitter is connected to a constant current source, a second transistor whose emitter is connected to the constant current source via a first resistor having a resistance value R, and a base of the first transistor. a third transistor whose emitter is connected to the collector of the first transistor; a second input terminal connected to the base of the third transistor; a fourth transistor whose emitter is connected to the collector of the first transistor through a second resistor having a resistance value R; and a fourth transistor whose emitter is connected to the collector of the third transistor through a third resistor having a resistance value 2R. power terminal and the third
means for biasing the base of the fourth transistor with a voltage obtained across the resistor; and a fifth transistor, the emitter of which is connected to the collector of the second transistor.
a first output terminal connected to the collectors of the third and fifth transistors, and a fourth resistor whose emitter is connected to the collector of the second transistor via a fourth resistor having a resistance value R. 6 transistor, means for biasing the base of the second transistor with a voltage obtained at the emitter of the sixth transistor, and means for biasing the base of the sixth transistor with the voltage obtained at the third resistor. means, a fifth resistor having a resistance value of 2R connected between the collector of the sixth transistor and the power supply terminal; and the fourth and sixth transistors.
and a second output terminal connected to the collector of the transistor.