JPH0964276A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To check the noise propagated through a power line from a digital circuit to an analog circuit by constituting a filter circuit constituted of a resistor which is connected between the power line of the analog circuit and the power line of the digital circuit, and capacity parasiting between other semiconductor layers connected to this resistor and an element isolating layer. SOLUTION: Since a filter circuit can be constituted of a resistor 18 connected between the power line VCC of an analog circuit 11 and the power line VDD of a digital circuit 13 and the capacity C generated between the n-type well layers 15A and 15B connected to this resistor 18 and an element isolating layer 16, noise seeking to be propagated from the digital circuit 13 to the analog circuit 11 can be removed by this filter circuit. Therefore, the voltage ripple of the power line VCC of the analog circuit can be suppressed, so the potential of the n-type well layer 15A of the analog circuit 11 and the n-type well layer 15B of a load resistor 12 becomes stable, and the ripple of the analog circuit 11 such as a comparator, an operational amplifier, etc., can be suppressed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device including a digital circuit and an analog circuit which are mounted on a portable electronic device.

[0002]

2. Description of the Related Art In recent years, portable electronic devices such as notebook personal computers and video recorders have been widely used. Since portable electronic devices are driven by batteries, ICs with low current consumption are required. In order to reduce the power consumption, it is necessary to increase the power input impedance when the internal circuit is seen from the power terminal.

However, in a semiconductor device in which a digital circuit and an analog circuit are mixed, if the power supply input impedance is too high, noise generated in the digital circuit may propagate to the analog circuit and the operation may become unstable. FIG.
FIG. 6 is a configuration diagram of an analog-digital circuit mixed IC according to a conventional example. In FIG. 4, reference numeral 1 is an analog circuit such as a comparator or an operational amplifier for analog signal processing. The analog circuit 1 is formed, for example, on the n-type well layer (island) 5A on the p-type Si substrate 4. In addition, the n-type well layer 5
A is a power line V that is the highest potential of the circuit to insulate the element
Connected to CC or biased to a proper operating potential.

Reference numeral 2 is a load resistor for extracting the output signal of the analog circuit. The load resistor 2 is composed of, for example, a p-type diffusion layer, and has an n-type well layer 5B on the same Si substrate 4.
Is formed. Here again, the n-type well layer 5B is connected to the power supply line Vcc to insulate the element. Reference numeral 3 is a digital circuit such as an inverter or a logic circuit that handles digital signals. The digital circuit 3 is formed in the n-type well layer 5C on the same Si substrate 4. Here again, the n-type well layer 5C is connected to the power supply line Vcc to insulate the element.

The n-type well layers 5A to 5C are insulated by the p-type element isolation layer 6, and the power supply line Vcc is continuously connected from the digital circuit 3 to the analog circuit 1 in order to reduce the number of power supply pads. It is wired. By the way, the conventional analog-digital circuit mixed IC having a low power input impedance consumes a large amount of current. It is not preferable to use such an IC in a battery-powered portable electronic device because the duration of use of the electronic device is shortened. Therefore, in order to reduce the power consumption, the power supply input impedance when the internal circuit is viewed from the power supply terminal is increased. As a result, the current consumption of the IC is narrowed down from several tens of μA to several μA.

[0006]

However, if the power source input impedance is too high, the digital circuit 2
There is a problem that noise is propagated from the analog circuit 1 to the analog circuit 1. In FIG. 5 (A), 7 is a bonding wire that connects the analog-digital circuit mixed IC and the external terminal, and 8 is an external capacitor (bypass capacitor) connected to the power supply line VCC. Noise is generated by ringing (oscillating transient phenomenon) propagating from the power supply line Vcc of the digital circuit 2 to the power supply line Vcc of the analog circuit 1.

The frequency of this ringing reaches several hundred MHz depending on the element constant, and the inductance (coil component) L by the bonding wire 7 as shown in FIG. 5B, the capacitance Cp of the decap 8 and the digital The on-resistance Rt of the transistor of the circuit 2 gives the frequency f as shown in equation (1). f = 1 / (2π√L / Cp) (1) This ringing changes the power supply line VCC of the analog circuit 1 due to the flow-through current flowing through the decap 8 during the output transition of the digital circuit 2, and N of circuit 1
The potentials of the well layer 5A and the n-type well layer 5B of the load resistor 2 are changed, and the output of the analog circuit 1 such as a comparator and an operational amplifier is changed. In particular, the reference circuit that supplies the reference voltage to the comparator
If it is connected to this power supply line Vcc, this ringing will spread and the reference voltage will fluctuate and the output of the comparator will change greatly. This causes malfunction of the analog circuit 1 and deterioration of characteristics.

In the semiconductor integrated circuit device disclosed in Japanese Patent Laid-Open No. 224348/1986, a pad is used for one of the electrodes of the capacitor, but a large capacitance cannot be obtained. Japanese Patent Laid-Open No. 61-199653 discloses an amplifier that forms a filter from an external capacitor and a resistor formed in an island (well layer).
The capacity must be external. JP-A-3-1310
Although a filter for removing external input noise is described in the input circuit 61, it does not remove noise generated in the digital circuit.

The present invention was created in view of the problems of the conventional example, and a filter circuit is constructed by skillfully using an existing junction capacitance so that noise does not propagate from a digital circuit to an analog circuit. It is an object of the present invention to provide a semiconductor device that can be manufactured.

[0010]

As shown in FIG. 1, a first semiconductor device of the present invention comprises a plurality of semiconductor layers insulated by an element isolation layer on a semiconductor substrate of one conductivity type. An analog circuit having an analog circuit formed with the semiconductor layer, a digital circuit having a digital circuit formed with the semiconductor layer, and one end connected to a power supply line of the digital circuit,
And a resistor having the other end connected to the power supply line of the analog circuit and one or more semiconductor layers, and a capacitance generated between the semiconductor layer connected to the resistor and the element isolation layer of the semiconductor layer. It is characterized by

As shown in FIG. 3A, the second semiconductor device of the present invention has a plurality of semiconductor layers insulated by an element isolation layer on a semiconductor substrate of one conductivity type, and the semiconductor layer. An analog circuit provided in the semiconductor layer, a digital circuit provided in the semiconductor layer, a bipolar transistor having a collector connected to the power supply line of the digital circuit and an emitter connected to the power supply line of the analog circuit, and one end thereof. A resistor connected to the base of the bipolar transistor and one or more semiconductor layers and the other end of which is connected to a power supply line of the digital circuit, a semiconductor layer connected to the resistor, and an element isolation layer of the semiconductor layer. And a capacity that occurs between and.

As shown in FIG. 3B, a third semiconductor device of the present invention has a plurality of semiconductor layers insulated by an element isolation layer on a semiconductor substrate of one conductivity type, and the semiconductor layer. An analog circuit provided in the semiconductor layer, a digital circuit provided in the semiconductor layer, a drain connected to the power supply line of the digital circuit, and a source connected to the power supply line of the analog circuit, and a field effect transistor, Connected to the gate of the field effect transistor and one or more semiconductor layers, and the other end connected to a power supply line of the digital circuit, a semiconductor layer connected to the resistance, and element isolation of the semiconductor layer. And a capacitance generated between the layers.

A fourth semiconductor device according to the present invention is the second and third semiconductor devices.
In the above semiconductor device, the bipolar transistor or the field effect transistor is Darlington-connected (see FIG. 3C). In the first to fourth semiconductor devices of the present invention, the capacitor is used in a semiconductor layer below a power supply wiring, and the above object is achieved.

[0014]

[Operation] In the first semiconductor device of the present invention, a resistor connected between a power line of an analog circuit and a power line of a digital circuit, and another semiconductor layer connected to this resistor and an element isolation layer are connected. Since the filter circuit can be configured from the capacitance parasitic on the circuit, noise that is about to propagate from the digital circuit to the analog circuit via the power supply line can be blocked by this filter circuit.

The noise cut frequency fc at this time is fc = 1 / (2πR · C) (2) where C is the capacitance and R is the resistance. Therefore, in a portable electronic device or the like, even if the power supply input impedance of a digital circuit, an analog circuit, or the like is increased to reduce current consumption, the noise filter circuit can be configured using the existing parasitic capacitance. Therefore, the noise generated in the digital circuit can be sufficiently attenuated by this filter circuit, and the analog circuit can be supplied with a voltage having a very small variation through the filter circuit.

In the second semiconductor device of the present invention, the bipolar transistor connected between the power line of the analog circuit and the power line of the digital circuit, the resistor connected to the base of this transistor, and the resistor connected to this resistor. A filter circuit can be formed from the capacitance generated between the other semiconductor layer and the element isolation layer. Also, since the base current can be amplified by the current amplification factor β (hfe) of the bipolar transistor, it is possible to configure a noise filter circuit that can obtain a large time constant even if the existing parasitic capacitance is small. With this filter circuit, noise that is about to propagate from the digital circuit to the analog circuit via the power supply line can be sufficiently attenuated, and a stable voltage can be supplied to the analog circuit.

Since the time constant can be increased in the third semiconductor device of the present invention by the field effect transistor as in the second semiconductor device, noise can be sufficiently attenuated even when the existing parasitic capacitance is small. , A stable voltage can be supplied to the analog circuit. In the fourth semiconductor device of the present invention,
In the second and third semiconductor devices of the present invention, by connecting the transistors in Darlington connection, a noise filter can be configured with a small capacitance and a noise cut frequency can be set high.

Further, in the first to fourth semiconductor devices of the present invention, normally, if the capacitance between the semiconductor layer and the element isolation layer below the power supply wiring not provided with the passive element or the active element is used, Further, the semiconductor chip can be used without waste.

[0019]

Embodiments of the present invention will now be described with reference to the drawings. 1 to 3 are explanatory views of a semiconductor device according to an embodiment of the present invention. (1) Description of First Embodiment FIG. 1 shows a block diagram of an analog-digital circuit mixed IC according to a first embodiment of the present invention. In FIG.
Reference numeral 11 is an analog circuit formed on the n-type well layer (island) 15A. The analog circuit 11 is composed of a bipolar transistor and is a comparator or an operational amplifier that handles an analog signal, and a reference circuit that supplies a reference voltage to the comparator is also a target. The n-type well layer 15A is insulated by a p-type element isolation layer 16 on a p-type Si substrate (one conductivity type semiconductor substrate) 14.

In the case of a bipolar transistor, the n-type well layer 15A is formed by epitaxial growth of Si (silicon). The n-type well layer 15A is connected to the power supply line Vcc having the highest potential of the analog circuit 11 to insulate the element. n-type well layer 15A and p-type Si
An n ⁺ type buried layer 17A is provided between the substrate 14 and the substrate 14 in order to prevent junction breakdown. In the case of a MOS (field effect) transistor, it is formed by diffusing impurities in a Si substrate. No buried layer is formed.

Reference numeral 12 is a resistor formed in the n-type well layer 15B on the same Si substrate 14, and is used as a load of the analog circuit 11 for taking out an output signal or used as another bias element. The load resistance 12 is, for example, p
Mold diffusion layer. The n-type well layer 15B is connected to the power supply line Vcc to insulate the device. n-type well layer 15
An n ⁺ type buried layer 17B is provided between A and the p type Si substrate 14 in order to prevent junction breakdown.

Reference numeral 13 is a digital circuit formed in the n-type well layer 15C on the same Si substrate 14. The digital circuit 13 is an inverter or logic circuit that handles digital signals. Here again, the n-type well layer 15C is connected to the power supply line VDD which has the highest potential of the digital circuit 13 in order to insulate the element. n-type well layer 15C and p-type Si substrate 14
An n ⁺ -type buried layer 17C is provided between and in order to prevent junction breakdown. Each n-type well layer 15A
.About.15C are insulated by the p-type element isolation layer 16.

Reference numeral 18 denotes one end of the power supply line V of the digital circuit 13.
A resistor connected to DD and the other end connected to the power supply line VCC of the analog circuit 11 and the n-type well layers 15A and 15B. Resistance 1
8 is formed of a polysilicon wiring or a diffusion layer. Resistance 18
Constitutes a noise filter circuit together with a pn junction capacitance described later. Further, the resistor 18 may be set to a large value so that a voltage drop can be obtained within a range that does not affect the operation of the analog circuit 11.

C is an n-type well layer 15 connected to the resistor 18.
These are pn junction (diode) capacitors generated between A and 15B and the element isolation layer 16, respectively. This capacitance C is the element isolation layer 1 bonded to the substrate 14 in FIG.
6 is connected to the ground line GND, and the n-type well layer 15B is connected to the power line V
When connected to CC, the depletion layer expands and occurs. As the capacitance C, those which are parasitic between the back gate layer and the element isolation layer of the MOS transistor, the collector layer and the element isolation layer of the bipolar transistor, and the well layer and the element isolation layer of the load resistor 12 can be used.

Further, according to the present invention, in order to reduce the number of power supply pads, as shown in FIG. 2B, the power supply line Vcc is continuously connected to the analog circuit 11 via the digital circuit 13 and the resistor R. 2C, and at the power supply pad as shown in FIG. 2C, the power supply line VDD to the digital circuit 13 and the power supply line VCC to the analog circuit 11 are divided and the analog circuit 11 is connected. The second method of wiring the power supply line Vcc through the resistor R is included. Here, the difference from the conventional example is the power supply line VC of the analog circuit 11 and the digital circuit 13.
This is the point where the resistor 18 is interposed between C and VDD.

Next, the noise filter circuit of the analog-digital circuit mixed IC according to the first embodiment of the present invention will be described with reference to FIG. In FIG. 2B, 10 is a noise filter circuit including a resistor 18 and a capacitor C. Such a filter circuit 10 is shown in FIG.
As described above, one end of the resistor 18 is connected to the power supply line VDD of the digital circuit 13, and the other end of the resistor 18 is connected to the n-well layers 15A and 15B of the analog circuit 11 and the load resistor 12 and the analog circuit 11 of the analog circuit 11. It can be configured by connecting to the power line VCC.

This noise filter circuit 10 can cut the noise due to this ringing even if ringing at a frequency of about 100 MHz occurs in the power supply line VDD as described in the conventional example. The noise cut frequency fc at this time is as shown in the equation (2), and if the capacitance C is about several tens pF, the resistance 18 may be set to about several hundred Ω. In this way, in the analog-digital circuit mixed IC according to the first embodiment of the present invention, the power supply line VCC of the analog circuit 11 is
And a n-type well layer 15A, 15 connected to the resistor 18 and the power supply line VDD of the digital circuit 13
From the capacitance C generated between B and the element isolation layer 16, FIG.
Since the filter circuit 10 shown in (B) and (C) can be configured, the noise that is going to propagate from the digital circuit 13 to the analog circuit 11 can be removed by this filter circuit 10.

Therefore, the power supply line VCC of the analog circuit 11
Since the voltage fluctuation of the analog circuit 11 is suppressed, the potentials of the n-type well layer 15A of the analog circuit 11 and the n-type well layer 15B of the load resistor 12 are stabilized, and the fluctuations of the output of the analog circuit 11 such as a comparator and an operational amplifier are suppressed. In particular, since a stable reference voltage can be supplied from the reference circuit to the comparator, the output of the comparator becomes stable.

Therefore, even if the power supply input impedance of the analog circuit 11 and the digital circuit 13 is increased in order to reduce the current consumption and the current consumption of this circuit is narrowed down from several tens of μA to several μA, the existing power consumption is reduced. Noise due to ringing can be sufficiently attenuated by the filter circuit 10 using the parasitic capacitance C, and a stable voltage can be supplied from the digital circuit 13 to the analog circuit 11 via the resistor 18 as shown in FIG. Further, as shown in FIG. 2C, a stable voltage can be supplied from the pad to the analog circuit 11 via the resistor 18.

The use of such an IC in a battery-powered portable electronic device is very preferable in that the power consumption can be reduced and the duration of use of the electronic device can be extended. The capacitor C has n-type well layers (islands) 15A and 15B.
Since it does not require an additional area for new diffusion or capacitance C, it can be realized at low cost. (2) Description of Second Embodiment FIG. 3A shows an analog circuit according to the second embodiment of the present invention.
The block diagram of the digital circuit mixed IC is shown. The second embodiment differs from the first embodiment in that a transistor is provided in the noise filter circuit.

In FIG. 3A, reference numeral 20 is a noise filter circuit for blocking noise generated in the digital circuit 11, which is composed of a bipolar transistor Q, a resistor R, and a parasitic capacitance C. The transistor Q has a collector connected to the power supply line VDD of the digital circuit 13, an emitter connected to the power supply line VCC of the analog circuit 11, and a base connected to one end of the resistor R and one end of the parasitic capacitance C. Resistance R
Is connected to the power supply line VDD, and the other end of the parasitic capacitance C is connected to the ground line GND. As the parasitic capacitance C, the one generated between the n-type well layers 15A and 15B and the element isolation layer 16 is used as in the first embodiment. Since the analog circuit 11 and the digital circuit 13 are the same as those in the first embodiment, the description thereof will be omitted.

Thus, in the analog-digital circuit mixed IC according to the second embodiment of the present invention, the bipolar transistor connected between the power supply line VCC of the analog circuit 11 and the power supply line VDD of the digital circuit 13 is used. The filter circuit 20 can be configured by Q, the resistor R connected to the base of the transistor Q, and the parasitic capacitance C connected to the resistor R.

Further, since the noise filter circuit 20 can amplify the base current by the current amplification factor of the transistor Q, the time constant can be increased even when the parasitic capacitance C is small. Therefore, the filter circuit 20 can sufficiently attenuate the noise that is going to propagate from the digital circuit 13 to the analog circuit 11 and can supply a stable voltage to the analog circuit 11 as in the first embodiment.

(3) Description of Third Embodiment FIG. 3B shows an analog circuit according to the third embodiment of the present invention.
The block diagram of the digital circuit mixed IC is shown. The third embodiment differs from the second embodiment in that a field effect transistor is provided in the noise filter circuit. FIG.
In (B), 30 is a noise filter circuit that blocks noise generated in the digital circuit 11, and is composed of an n-type field effect transistor T, a resistor R, and a parasitic capacitance C. The transistor T has a drain connected to the power supply line VDD of the digital circuit 13, a source connected to the power supply line VCC of the analog circuit 11, and a gate connected to one end of the resistor R and one end of the parasitic capacitance C. When the p-type field effect transistor T is used, the connection between the source and drain is reversed.

The other end of the resistor R is connected to the power supply line VDD, and the other end of the parasitic capacitance C is connected to the ground line GND. In addition,
The parasitic capacitance C is the n-type well layer 15A as in the first embodiment.
15B and the element isolation layer 16 are used. Since the analog circuit 11 and the digital circuit 13 are the same as those in the first embodiment, the description thereof will be omitted.

Thus, in the analog-digital circuit mixed IC according to the third embodiment of the present invention, the electric field effect connected between the power supply line VCC of the analog circuit 11 and the power supply line VDD of the digital circuit 13 is obtained. A transistor T, a resistor R connected to the gate of the transistor T, and a resistor R
The filter circuit 30 can be configured from the parasitic capacitance C connected to the.

Further, since the noise filter circuit 30 can amplify the gate current by the transistor T, even when the parasitic capacitance C is small, the time constant can be increased as in the second embodiment. Therefore, this filter circuit 3
With 0, the noise that is going to propagate from the digital circuit 13 to the analog circuit 11 can be sufficiently attenuated as in the first and second embodiments, and a stable voltage can be supplied to the analog circuit 11.

(4) Description of Fourth Embodiment FIG. 3C shows an analog circuit according to the fourth embodiment of the present invention.
The block diagram of the digital circuit mixed IC is shown. The fourth embodiment differs from the second embodiment in that the transistors of the noise filter circuit are Darlington connected. In FIG. 3C, reference numeral 40 is a noise filter circuit that blocks noise generated in the digital circuit 11, and includes bipolar transistors Q1 and Q2, a resistor R, and a parasitic capacitance C. The collector of the transistor Q1 is the digital circuit 1
3 is connected to the power supply line VDD, its emitter is connected to the power supply line VCC of the analog circuit 11, and its base is connected to the emitter of the transistor Q2.

The collector of the transistor Q2 is connected to the power supply line VDD of the digital circuit 13, and its base is connected to one end of the resistor R and one end of the parasitic capacitance C. The other end of the resistor R is connected to the power supply line VDD, and the other end of the parasitic capacitance C is connected to the ground line GND. The parasitic capacitance C is the same as that of the first embodiment in that the n-type well layers 15A and 15B and the element isolation layer 16 are formed.
It uses the one that occurred between and. Analog circuit 11
Since the digital circuit 13 and the digital circuit 13 are similar to those in the first embodiment, the description thereof will be omitted.

Thus, in the analog-digital circuit mixed IC according to the fourth embodiment of the present invention, a Darlington connection bipolar is provided between the power supply line VCC of the analog circuit 11 and the power supply line VDD of the digital circuit 13. The filter circuit 40 can be composed of the transistors Q1 and Q2, the resistor R connected to the base of the transistor Q2, and the parasitic capacitance C connected to the resistor R.

Further, since the noise filter circuit 40 can further amplify the base current by the current amplification factor of the transistors Q1 and Q2 as compared with the second embodiment, the time constant is small even when the parasitic capacitance C is small. Can be made bigger. The capacitance C can be made smaller and the noise cut frequency can be set higher by the equation (2). Therefore, this filter circuit 40 can sufficiently attenuate the noise that is going to propagate from the digital circuit 13 to the analog circuit 11 and can supply a stable voltage to the analog circuit 11 as in the first to third embodiments.

The Darlington connection transistor may be a field effect transistor. In addition, the first aspect of the present invention
In the fourth embodiment, by using the capacitance between the n-type well layer and the element isolation layer under the power supply wiring not provided with the transistor or the resistor, the semiconductor chip can be used more efficiently.

[0043]

As described above, in the semiconductor device of the present invention, the resistor connected between the power source line of the analog circuit and the power source line of the digital circuit, and the other semiconductor layer and element isolation layer connected to this resistor. A filter circuit can be constructed from a parasitic capacitance between the and. Further, in another semiconductor device of the present invention, the bipolar transistor or the field effect transistor can configure a noise filter circuit that can obtain a large time constant even when the parasitic capacitance is small.

Since these noise filter circuits can block the noise that is going to propagate from the digital circuit to the analog circuit, a stable voltage can be supplied to the analog circuit. In another semiconductor device of the present invention, a transistor in Darlington connection can form a noise filter with a small capacitance. Also, the noise cut frequency can be set high. Further, by using the capacitance between the semiconductor layer and the element isolation layer under the power supply wiring, the semiconductor chip can be used without waste.

This greatly contributes to the provision of an analog-digital circuit mixed IC for portable electronic equipment which consumes less current.

[Brief description of drawings]

FIG. 1 is a configuration diagram of an analog-digital circuit mixed IC according to each embodiment of the present invention.

FIG. 2 is a configuration diagram of a filter circuit according to a first embodiment of the present invention.

FIG. 3 is a configuration diagram of a filter circuit according to another embodiment of the present invention.

FIG. 4 shows an analog / digital circuit mixed IC according to a conventional example.
FIG.

FIG. 5 is a circuit diagram illustrating ringing according to a conventional example.

[Explanation of symbols]

10 to 40 ... Noise filter circuit, 1, 11 ... Analog circuit, 2, 12 ... Load resistance, 3, 13 ... Digital circuit,
4, 14 ... P-type Si substrate, 7 ... Bonding wire, 8
... External capacity 5A, 5B, 5C, 15A, 15B, 15C ...
n-type well layer, 6, 16 ... Element isolation layer, 17A, 17B,
17C ... n ⁺ buried layer, 18, R ... resistor.

Claims (5)

[Claims] 1. A plurality of semiconductor layers insulated by an element isolation layer on a semiconductor substrate of one conductivity type, an analog circuit provided in the semiconductor layer, a digital circuit provided in the semiconductor layer, and one end thereof. A resistor connected to the power line of the digital circuit and having the other end connected to the power line of the analog circuit and one or more semiconductor layers, a semiconductor layer connected to the resistor, and an element isolation layer of the semiconductor layer. And a capacitance generated between the semiconductor device and the semiconductor device. 2. A plurality of semiconductor layers insulated by a device isolation layer on a semiconductor substrate of one conductivity type, an analog circuit provided in the semiconductor layer, a digital circuit provided in the semiconductor layer, and a collector. Connected to the power line of the digital circuit, and
A bipolar transistor having an emitter connected to the power supply line of the analog circuit, a resistor having one end connected to the base of the bipolar transistor and one or more semiconductor layers, and the other end connected to the power supply line of the digital circuit. And a capacitance generated between a semiconductor layer connected to the resistor and an element isolation layer of the semiconductor layer. 3. A plurality of semiconductor layers insulated by an element isolation layer on a semiconductor substrate of one conductivity type, an analog circuit provided in the semiconductor layer, a digital circuit provided in the semiconductor layer, and a drain. Connected to the power line of the digital circuit, and
A field effect transistor whose source is connected to the power supply line of the analog circuit, one end of which is connected to the gate of the field effect transistor and one or more of the semiconductor layers, and the other end of which is connected to the power supply line of the digital circuit. A semiconductor device comprising: a resistor; and a capacitor formed between a semiconductor layer connected to the resistor and an element isolation layer of the semiconductor layer. 4. The semiconductor device according to claim 2, wherein the bipolar transistor or the field effect transistor is Darlington-connected. 5. The semiconductor device according to claim 1, wherein the capacitor is used in a semiconductor layer below a power supply wiring.