JPH0962642A - Program loading system of parallel computer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To load programs to a plurality of nodes fast and widen the user area in the memory space of each node by storing only programs that a node uses among all received programs in specific locations of the memory. SOLUTION: The kernel 32 of a master processor 1 reads respective server programs sequentially out of individual files 7 stored with programs that individual nodes 100 and 200 use and broadcasts and transfers them through a network control circuit 5. The kernels 32 of the nodes 100 and 200, on the other hand, receives the transferred server programs and loads only server programs corresponding to the kinds of adapters 102 and 202 present in constitution tables 33 to specific areas of main storages. If the received server programs do not correspond to the kinds of the adapters 102 and 202 present in the constitution tables 33, the server programs are only received and not loaded to the specific areas of the main storages.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a program loading method for a parallel computer, and more particularly to a program loading method for a parallel computer that executes the program loading of the parallel computer according to the types of adapters mounted on a plurality of nodes. It is related to effective technology.

[0002]

2. Description of the Related Art A conventional parallel computer is provided with a plurality of nodes each having a processor and a memory, processing such as large-scale numerical calculation is distributed to the plurality of nodes, and the plurality of nodes operate in parallel to achieve high speed. I am doing a lot of processing.

In the conventional parallel computer described above, when the power is turned on and the start of the parallel computer is started, a program load for loading the server program corresponding to the kernel and the adapter mounted in each node into the memory of the node. Is done.

In the above-mentioned conventional program loading method for a parallel computer, first, a node called a master processor having a kernel and a server program corresponding to an adapter mounted in each node in an external storage device starts operation, and the kernel is started. And loading a plurality of server programs into the memory of the master processor, and then transferring control to the kernel.

Next, a master processor of the parallel computer transmits the kernel and a plurality of server programs to a plurality of nodes constituting the parallel computer, and a plurality of nodes other than the master processor transmit the kernel and a plurality of nodes. Receives the server program and loads it into the memory of the node.

As described above, when the kernel and the server program are loaded into the memories of all the nodes of the parallel computer and the control is transferred to the kernel, the startup process of the parallel computer is completed.

The conventional parallel computer described above is composed of hundreds to thousands of nodes, and is a file server which is a node equipped with a master processor having a kernel and a server program and an adapter for connecting a large-capacity external storage device. , LAN (Local Area Network)
It is composed of a network server that is a node equipped with an adapter that connects to a printer, a printer server that is a node equipped with an adapter that connects to a printer, and a computing node dedicated to computation. The server program corresponding to the adapter installed in
It must be loaded from a file on the master processor.

In the conventional parallel computer program loading method, even when a plurality of nodes are equipped with different adapters as described above, a server program corresponding to all types of adapters installed in the plurality of nodes is installed. Was transmitted to all the nodes, and the server programs corresponding to the transmitted all types of adapters were loaded into the memory of the node.

A conventional parallel computer startup method for loading a program into a plurality of processors in a plurality of nodes is described in Japanese Patent Laid-Open No. 4-273332.

The outline is to efficiently load a program to a plurality of sub-processors by downloading the same program from the main processor to a plurality of sub-processors all at once.

[0011]

The present inventor has found the following problems as a result of examining the above-mentioned prior art.

That is, in the above-mentioned conventional program loading method for a parallel computer, when a plurality of nodes are equipped with different adapters, the server programs corresponding to all the adapters are transmitted to all the nodes, and the above-mentioned transmission is performed. Since the server programs corresponding to all the types of adapters that have been loaded are loaded into the memory of the node, there is a problem that the user area of the memory space of the node is reduced.

Further, in the above-mentioned conventional parallel computer program loading method, when a plurality of nodes are equipped with different adapters, only the server program corresponding to the adapters installed in the nodes is transmitted to each node. Then,
The server program corresponding to the adapter not mounted on the node is not loaded into the memory of the node, but there is a problem that it takes time to send the server program because different server programs must be sent for each node. .

It is an object of the present invention to provide a technique capable of loading a program to a plurality of nodes at high speed and expanding the user area of the memory space of the nodes.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0016]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, in the program loading method of a parallel computer for loading a program to a plurality of nodes of the parallel computer, the type of the adapter mounted on the node is read and a configuration table is created which stores the type of the adapter. Means, a network transmitting means for transmitting a plurality of programs according to the types of all the adapters mounted on the parallel computer, and a network receiving means for receiving all of the plurality of programs transmitted by the network transmitting means, A means for storing only a program used by the node in a specific position of the memory among all programs received by the network receiving means according to the type of adapter in the configuration table created by the configuration recognizing means It is equipped with.

[0018]

According to the above-mentioned means, first, when the power of the parallel computer in which the plurality of nodes are connected by the network transfer path is turned on, the file read means and the configuration recognition means are set in all the nodes constituting the parallel computer. A bootstrap having a network transmission means and a network reception means is activated, and the bootstrap initializes the hardware configuring the node, and then transfers control to the configuration recognition means in the bootstrap.

The configuration recognition means of each node has an identification register storing identification information for identifying the type of adapter, and sequentially reads the identification information of all the adapters mounted on the node from the identification register.

When the configuration recognition unit cannot read the identification information of the adapter from the identification register of the node when the identification information of the identification register is read out,
Judge that the adapter is not installed in the node.

When the configuration recognition means can read the identification register of the node, it is determined that an adapter is mounted on the node, and based on the identification information of the adapter read from the identification register. A configuration table indicating the configuration of the adapter mounted on the node is created in the main memory of the node.

After that, the master processor, which is a specific node among the plurality of nodes, uses the network transmission means in the bootstrap of the master processor,
The network control circuit is set to the transmission state, while each node other than the master processor is set to the standby state by setting the network control circuit to the reception state by the network reception means in the bootstrap.

Next, the master processor reads the kernel in the common file storing the program commonly used by the plurality of nodes by the file reading means in the bootstrap, and stores the kernel in the main memory of the master processor. To load.

Next, the master processor transfers control from the bootstrap to the loaded kernel after loading the kernel into the main memory of the master processor, and the kernel itself is networked to all other nodes. Broadcast transfer via control circuit.

On the other hand, the network receiving means in the bootstrap of each node receives the kernel broadcast-transferred from the master processor, loads the received kernel into the main memory, and then loads the kernel from the bootstrap. Transfer control to the
The kernel of each node refers to the configuration table of the node, determines the server program to be received by the node, and puts the network control circuit into the receiving state and puts it in the waiting state.

Next, the kernel of the master processor sequentially reads each server program in the individual file storing the program used in each node, and sequentially broadcasts each server program via the network control circuit.

On the other hand, the kernel of each node receives the broadcast-transferred server program via the network control circuit and transfers only the server program corresponding to the type of the adapter existing in the configuration table to a specific area of the main memory. To load.

However, if the received server program is
If it does not correspond to the type of adapter existing in the configuration table, the server program is only received and is not loaded into a specific area of the main memory.

In this way, the kernel of each node loads only the server program corresponding to the adapter mounted on the node into a specific area of the main memory.

As described above, according to the program loading method of the parallel computer described in the above-mentioned section, all of the plurality of server programs transmitted by broadcast are received and the corresponding adapters installed in the node are supported. Since only the specified server program is loaded into a specific area of the main memory, it is possible to load the programs to a plurality of nodes at high speed and expand the user area of the memory space of the node.

[0031]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail with reference to the drawings together with an embodiment.

In all the drawings for explaining the embodiments, parts having the same function are designated by the same reference numerals, and the repeated description thereof will be omitted.

FIG. 1 is a diagram showing a schematic configuration of an implementation device for implementing the program loading method of the parallel computer of the present invention. In FIG. 1, 1 is a master processor, 2 is an adapter, 3 is a main memory circuit, 4 is a bootstrap, 5 is a network control circuit, 6 is a processor, 7 is a file, and 8
Is a network transfer path, 30 is a buffer, 31 is a server program, 32 is a kernel, 33 is a configuration table, 4
0 is a file read means, 41 is a configuration recognition means, 42 is a network transmission means, 43 is a network reception means,
Reference numerals 100 and 200 are nodes, and 102 and 202 are adapters.

As shown in FIG. 1, the implementation device for implementing the program loading method of the parallel computer according to the present embodiment includes a master processor 1 having a kernel 32 and a plurality of server programs 31, and a plurality of nodes 100 and 200. The nodes are connected via the network transfer path 8.

The master processor 1 of the implementation device for implementing the program loading method of the parallel computer of this embodiment has an adapter 2 which is an adapter A for connecting an external storage device storing a kernel 32 and a plurality of server programs 31,
A main memory circuit 3 for loading the program, a bootstrap 4 for initializing the hardware when the power is turned on, a network control circuit 5 for transmitting and receiving the program via the network transfer path 8, and a processor for controlling the entire node. 6 and a file 7 storing a kernel 32 and a plurality of server programs 31.

The main memory circuit 3 of the master processor 1 of the execution apparatus for implementing the program loading method of the parallel computer of this embodiment has a buffer 30 for temporarily storing the kernel 32 and a plurality of server programs 31 read from the file 7. And an area for loading the server program 31,
An area for loading the kernel 32 and an area for creating the configuration table 33 are provided.

The bootstrap 4 of the master processor 1 of the implementation device that implements the program loading method of the parallel computer of this embodiment reads the kernel 32 and the server program 31 from the file 7 by the file read means 40.
And a configuration recognition means 41 for creating the configuration table 33 according to the identification information of the adapter 2, and a network transmission means 42 for transmitting the kernel 32 and the plurality of server programs 31 to each node by the network control circuit 5.

Further, as shown in FIG. 1, the node 100 of the execution device which implements the program loading method of the parallel computer of this embodiment has an adapter 102 which is an adapter B for connecting another peripheral device, a kernel 32, and A network receiving means 43 for receiving a plurality of server programs 31 from the master processor 1 is provided.

Further, as shown in FIG. 1, the node 200 of the execution device for executing the program loading method of the parallel computer of this embodiment has an adapter 202 which is an adapter C for connecting other peripheral devices, a kernel 32, and A network receiving means 43 for receiving a plurality of server programs 31 from the master processor 1 is provided.

FIG. 2 is a diagram showing a schematic configuration of an adapter mounted on a node in the program loading method of the parallel computer of this embodiment. In FIG. 2, 211 and 2
Reference numeral 21 is an identification register.

As shown in FIG. 2, in the program loading method of the parallel computer of this embodiment, the adapter 2 which is the adapter A includes the identification register 211 and the identification register 2
A module ID “A”, which is identification information for identifying the adapter A, is stored in the storage unit 11.

Further, as shown in FIG. 2, in the program loading method of the parallel computer of this embodiment, the adapter 202 which is the adapter C has an identification register 221, and the identification register 221 identifies the adapter C. The module ID “C”, which is information, is stored.

FIG. 3 is a diagram showing a schematic structure of a file connected to the program loading master processor of the parallel computer of this embodiment. In FIG. 3, 301 is a common file and 302 is an individual file.

The processing procedure of the master processor in the program loading system of the parallel computer of this embodiment will be described below.

FIG. 4 is a flow chart showing the procedure for starting up the master processor in the program loading method of the parallel computer of this embodiment.

When the power of the parallel computer of this embodiment is turned on, the bootstrap 4 of the master processor 1, the node 100 and the node 200 is activated, and the bootstrap 4 of each node initializes the hardware of the node. After that, the processing in each configuration recognition means 41 is started.

In the processing of step 401, the configuration recognizing means 41 of the bootstrap 4 of the master processor 1 of the program loading system of the parallel computer of the present embodiment uses the adapter 2 connected to the bus of the processor 6 of the master processor 1.
The identification information stored in the identification register is read.

For example, as shown in FIG. 2, in the program loading method of the parallel computer of this embodiment, the processor 6 of a certain node is connected to the adapter 2 which is the adapter A and the adapter 202 which is the adapter C. In this case, the configuration recognizing means 41 of the node concerned is required to identify
11 and the module ID “A” from the identification register 221
And “C” are read.

As shown in FIG. 1, since the adapter 2 which is the adapter A is connected to the master processor 1 of the program loading system of the parallel computer of this embodiment, the configuration recognition means 41 of the master processor 1 uses the adapter. The identification register 2 is read, the value of the module ID “A” is recognized, and the module ID “A” is written in the configuration table 33.

Since the adapter B or the adapter C is not connected to the program loading master processor 1 of the parallel computer of the present embodiment, the identification information of the identification register of the adapter B or the adapter C is not read. The identification information of B or adapter C is not written in the configuration table 33.

Next, in step 402, the master processor 1 makes the network control circuit 5 transmittable by the network transmission means 42 of the bootstrap 4, and then the file read means 4 of the master processor 1.
0 accesses the file 7, reads the kernel 32 of the common file 301 into the buffer 30 all at once, and loads it into the area of the kernel 32 of the main memory circuit 3, as shown in FIG.

After that, proceeding to the processing of step 403, the master processor 1 transfers control from the network transmission means 42 to the kernel 32, and the kernel 32 of the master processor 1 transfers the kernel 32 of the buffer 30 via the network control circuit 5. , And broadcasts to nodes 100 and 200 that are nodes other than the master processor 1.

When the kernel 32 of the master processor 1 completes the transmission of the kernel 32 on the buffer 30, the process proceeds to step 404 and the individual file 30 shown in FIG.
The server A program to the server C program No. 2 are sequentially read into the buffer 30.

In the program loading method of this embodiment, the server A program, the server B program,
And the server C program is the adapter A,
It is a server program used by a node equipped with the adapter B and the adapter C.

In the process of step 405, the configuration table 33 of the master processor 1 is checked, and if the read adapter that uses the server program is connected to the master processor 1, the process proceeds to step 406 and the server The program is loaded into the area of the server program 31 of the main memory circuit 3.

As shown in FIG. 1, in the program loading method of the parallel computer of this embodiment, since the master processor 1 is equipped with the adapter 2 which is the adapter A, the server A program in the buffer 30 is stored in the main memory circuit 3. The server program 31 is loaded into the area.

As a result of checking the configuration table 33 of the master processor 1 in the process of step 405, if the adapter using the read server program is not connected to the master processor 1, the process proceeds to step 407. The server program is sequentially broadcast-transmitted to the nodes 100 and 200 that are nodes other than the master processor 1 via the network control circuit 5.

Next, in the processing of step 408, the individual file 302 of the file 7 is checked, and if there is a server program that has not been read yet, step 40
Return to the process of 4.

As described above, in the program loading method of the parallel computer of this embodiment, the kernel 32 and the server A program are loaded into a specific area of the main memory circuit 3 of the master processor 1, and all the individual files 302 of the individual files 302 are loaded. When the transmission is completed, the startup process of the master processor 1 is completed.

The processing procedure of the nodes other than the master processor in the program loading system of the parallel computer of this embodiment will be described below.

FIG. 5 is a flow chart showing the procedure for starting up nodes other than the master processor in the program loading method of the parallel computer of this embodiment.

In the processing of step 501, the configuration recognizing means 41 of the bootstrap 4 of the node 100 and the node 200 of the program loading method of the parallel computer of this embodiment,
Adapter 1 connected to the bus of processor 6 of each node
02 and the identification information stored in the identification register of the adapter 202.

The configuration recognizing means 41 of the program loading type node 100 of the parallel computer of this embodiment is the adapter B.
Read the identification register of the adapter 102, which is the module 102, and sets the value of the module ID “B” to the configuration table 3 of the node 100.
Write to 3.

Further, the configuration recognition means 41 of the node 200 of the program loading method of the parallel computer of this embodiment reads the identification register of the adapter 202 which is the adapter C, and sets the value of the module ID "C" to the configuration table of the node 200. Write in 33.

Next, in step 502, the node 1
00 and the node 200, the network receiving means 43 of the bootstrap 4 starts the processing, initializes the network control circuit 5 to the receivable state, and puts it in the waiting state.

Further, in the processing of step 502, the node 100 and the node 200 receive the kernel 32, which is broadcast-transferred from the master processor 1, by the network receiving means 43 via the network control circuit 5, and the respective nodes of the nodes 100 and 200 receive. Read in the buffer 30.

In the processing of step 503, the buffer 30
The kernel 32 read in is loaded into the area of the kernel 32 of the main memory circuit 3, and then the node 100 and the node 200 transfer control from the network receiving means 43 to the kernel 32.

In the process of step 504, the kernels 32 of the node 100 and the node 200 subsequently sequentially read in the buffers 30 the server A to server C programs that are broadcast-transferred via the network control circuit 5.

In the process of step 505, the configuration table 33 of each node is checked, and if the adapter using the server program read in the buffer 30 is connected to the node, the process proceeds to step 506, and The server program is loaded into the area of the server program 31 of the main memory circuit 3.

As shown in FIG. 1, since the node 100 of the program loading system of the parallel computer of this embodiment is equipped with the adapter 102 which is the adapter B, the buffer 30
When the server A program or the server C program is received by the server 30, the server A program or the server C program is not loaded from the buffer 30, and only when the server B program is received, the area of the server program 31 of the main memory circuit 3 is received. Load the server B program into.

Since the node 200 is equipped with the adapter 202 which is the adapter C, when the server A program or the server B program is received in the buffer 30, the server A program or the server B program is loaded from the buffer 30. Only when the server C program is received, the server program 31 of the main memory circuit 3 is received.
Load the server C program into the area.

As a result of checking the configuration table 33 of each node in the process of step 505, if the adapter using the server program read in the buffer 30 is not connected to the node, the process proceeds to step 508. , Check if the broadcast transfer of all server programs is completed.

When the broadcast transfer of all the server programs is not completed in the process of step 508, the process returns to step 504.

As described above, in the program loading method for the parallel computer according to the present embodiment, the kernel 32 and the server B program are loaded in the specific area of the main memory circuit 3 of the node 100, and the main memory circuit 3 of the node 200 is specified. When the kernel 32 and the server C program are loaded in the area, the startup processing of the nodes 100 and 200 is completed.

As described above, according to the program loading method of the parallel computer of the present embodiment, all of the plurality of server programs transmitted by broadcast are received, and only the server program corresponding to the adapter installed in the node is received. Is loaded into a specific area of the main memory, the program can be loaded into a plurality of nodes at high speed, and the user area of the memory space of the node can be expanded.

Further, according to the program loading method of the parallel computer of this embodiment, only the server program corresponding to the adapter mounted in the node is loaded into the specific area of the main memory, so that it is loaded in the node. It is possible to easily change the server program loaded when the adapter is changed.

Although the present invention has been specifically described based on the above embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Of course.

[0078]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

That is, all of the plurality of server programs transmitted by broadcast are received, and only the server program corresponding to the adapter mounted on the node is loaded into a specific area of the main memory. It is possible to load the program at high speed and expand the user area of the memory space of the node.

[Brief description of drawings]

FIG. 1 is a diagram showing a schematic configuration of an execution device that implements a program loading method of a parallel computer of the present invention.

FIG. 2 is a diagram showing a schematic configuration of an adapter installed in a node in the program loading method of the parallel computer of this embodiment.

FIG. 3 is a diagram showing a schematic configuration of a file connected to a program loading master processor of the parallel computer of this embodiment.

FIG. 4 is a flow chart showing the procedure for starting up the master processor in the program loading method of the parallel computer of this embodiment.

FIG. 5 is a flow chart showing a procedure for starting up nodes other than the master processor in the program loading method of the parallel computer according to the present embodiment.

[Explanation of symbols]

1 ... Master processor, 2 ... Adapter, 3 ... Main memory circuit, 4 ... Bootstrap, 5 ... Network control circuit, 6 ... Processor, 7 ... File, 8 ... Network transfer path, 30 ... Buffer, 31 ... Server program, 3
2 ... Kernel, 33 ... Configuration table, 40 ... File read means, 41 ... Configuration recognition means, 42 ... Network transmission means, 43 ... Network reception means, 100 and 20
0 ... Node, 102 ... Adapter, 202 ... Adapter, 2
11 and 221 ... Identification register, 301 ... Common file, 302 ... Individual file.

Claims (1)

[Claims] 1. In a program loading method of a parallel computer for loading a program to a plurality of nodes of a parallel computer, a configuration recognition for reading a type of an adapter mounted on the node and creating a configuration table storing the type of the adapter. Means, a network transmitting means for transmitting a plurality of programs according to the types of all the adapters mounted on the parallel computer, and a network receiving means for receiving all of the plurality of programs transmitted by the network transmitting means, A means for storing only a program used by the node in a specific position of the memory among all programs received by the network receiving means according to the type of adapter in the configuration table created by the configuration recognizing means A parallel computer professional characterized by Ramurodo system.