JPH0955512A - Thin film transistor and liquid crystal display device using the transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce characteristics variation of a driving circuit built-in type thin film transistor array using high mobility thin film transistors, and improve the display quality of a liquid display device. SOLUTION: In the thin film transistor, the total sum of the resistance value of a polycrystalline silicon thin film forming a source region and a drain region, and the contact resistance of the polycrystalline silicon thin film and metal or a metal oxide thin film is at least 35kω and at most 200kω. The thickness of a polycrystalline silicon thin film 10 is 100nm. The width of a gate electrode, e.g., the channel length L of the thin film transistor is 10μm. The channel widths WS and WD are 6μm. The distances LS and LD) from the end portion of the gate electrode 11 to contact hole parts 13, 14 are 10μm. The resistivity ρ is 1×10<-1> (Ω.cm), and Rcs and Rcd are 10kΩ. A relation RS=Rd =l6.7kΩ is held, and a series resistance component R is 53.4kΩ.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor that can be used for input / output devices such as liquid crystal display devices and image sensors.

[0002]

2. Description of the Related Art A liquid crystal display device in which a thin film transistor (hereinafter referred to as a TFT; TFT is an abbreviation for thin film transistor) and an image sensor are required to be manufactured at a low cost as well as a technology trend of high density. Strong and conventional TF using amorphous silicon as active layer
Since T, the development of TFTs using polycrystalline silicon as an active layer has been activated. Compared with amorphous silicon thin film transistors, polycrystalline silicon thin film transistors have electron mobility two or more orders of magnitude higher, so that driving circuits can be integrated on the same substrate to reduce costs, or device density can be reduced. And the aperture ratio of the liquid crystal display device. However, while the polycrystalline silicon thin film transistor has high mobility, it has a problem that the characteristic variation in the substrate is large. An example of a conventional method for manufacturing a polycrystalline silicon thin film transistor will be described below with reference to FIG.
This will be described with reference to FIG.

As shown in FIG. 4A, a polycrystalline silicon thin film 41 is deposited to a thickness of 100 nm on a transparent substrate (glass substrate). Polycrystalline silicon is deposited at a substrate temperature of 600 ° C. by a low pressure CVD method using silane (SiH ₄ ) gas and processed into a TFT shape (island shape) by photolithography. Next, as shown in FIG. 4B, the gate insulating film 42 is formed.
(SiO ₂ ) is formed to a thickness of 100 nm. The gate insulating film is formed at a substrate temperature of 450 ° C. by an atmospheric pressure CVD method using a mixed gas of silane (SiH ₄ ) and oxygen (O ₂ ). Then, a Ta thin film to be a gate electrode is formed by RF sputtering, and the shape 43 of the gate electrode is formed by photolithography.
Process into After forming the gate electrode, impurity (phosphorus: P) ions are implanted for the purpose of forming the source and drain regions of the TFT, and heat treatment is performed at 600 ° C. for 24 hours to activate the implanted impurities. As shown in FIG. 4C, an interlayer insulating film 44 (SiO ₂ ) is formed to a thickness of 400 nm, and contact holes 45 and 46 are opened. Finally, the source and drain electrodes 47 and 48 (Al / Ti: 700/100 nm) are formed to form TF.
T is completed. FIG. 4D shows the gate electrode 43 of the TFT,
Polycrystalline silicon layer 41, source and drain electrodes 4
7 is a schematic view showing a positional relationship between only 7, 48 and contact holes 45, 46. FIG. The width of the gate electrode 43, that is, T
The channel length L of the FT is 10 μm, and the channel width is 6
μm. Distance L from the edge of the gate electrode to the contact hole formed in the source or drain region
s and Ld are each 4 μm.

In realizing an input / output device such as a liquid crystal display device with a built-in driving circuit and an image sensor using a polycrystalline silicon thin film transistor, a TFT which is a switching element of an input / output part and a TFT used in a circuit part for driving the TFT. Then, the required device performance, specifically, the mobility is different. Since it is necessary to drive a large number of TFTs formed in the input / output section in the drive circuit section, it is necessary to form a circuit using TFTs with high mobility. The degree can be set small by about one digit, but the uniformity of element characteristics is an important issue.

[0005]

However, in general, the higher the mobility of the TFT, the worse the uniformity of the device characteristics, and the higher the mobility of the TFT, the higher the mobility of the drive circuit section composed of the TFT. There are many problems in integrating an excellent thin film transistor array on the same substrate.

In order to solve the above-mentioned conventional problems, the present invention reduces a characteristic variation of a thin film transistor array with a built-in driving circuit and improves the display quality of a liquid crystal display device, and a high mobility thin film transistor and a liquid crystal display using the same. The purpose is to provide a device.

[0007]

To achieve the above object, a thin film transistor of the present invention is a thin film transistor having a semiconductor active layer made of polycrystalline silicon,
The sum of the resistance value of the polycrystalline silicon thin film forming the source and drain regions of the thin film transistor and the contact resistance between the polycrystalline silicon thin film and the metal or metal oxide thin film is 35 KΩ or more and 200 KΩ or less. In the above structure, the width of the polycrystalline silicon thin film forming the source and drain regions of the thin film transistor is 4 μm or more and 50 μm or less, and the total distance from the channel region of the thin film transistor to each contact hole formed in the source and drain regions is 10 μm.
It is preferably not less than 100 μm.

A liquid crystal display device of the present invention is an active matrix type liquid crystal display device using the thin film transistor of the present invention as a switching element of a display section.

[0009]

According to the thin film transistor of the present invention, in a thin film transistor having a semiconductor active layer made of polycrystalline silicon, the resistance value of the polycrystalline silicon thin film forming the source and drain regions of the thin film transistor, The total contact resistance between the crystalline silicon thin film and the metal or metal oxide thin film is 35 KΩ or more and 2
When the resistance is 00 KΩ or less, a thin film transistor with less characteristic variation can be achieved.

The width of the polycrystalline silicon thin film forming the source and drain regions of the thin film transistor is 4 μm or more 5
According to the preferable example of the present invention, which is 0 μm or less and the total distance from the channel region of the thin film transistor to each contact hole formed in the source and drain regions is 10 μm or more and 100 μm or less, a thin film transistor with less variation in characteristics can be easily formed. Can be achieved.

According to the liquid crystal display device of the present invention, since it is an active matrix type liquid crystal display device using the thin film transistor of the present invention as a switching element of a display section, a liquid crystal display device having excellent display quality with little characteristic variation. Can be achieved.

In the TFT forming the drive circuit portion which requires high mobility, the resistance component (the sum of the resistance component between the source and drain regions and the channel region and the contact resistance) is designed to be as small as possible. In addition, in the thin film transistor array section, a resistance component is intentionally inserted in the TFT. Specifically, in a high mobility thin film transistor, the distance from the gate electrode to the contact hole opening formed in the source and drain regions is set as small as possible (specified by the mask alignment accuracy of the exposure device), The resistance component made of polycrystalline silicon in the source and drain regions is reduced, and at the same time, the contact resistance is reduced by arranging a plurality of contact holes with the source or drain wirings in parallel. On the other hand, in a TFT used as a switching element in the input / output section, by appropriately setting the distance and width between the contact hole formed in the source and drain regions and the gate electrode, the resistance made of polycrystalline silicon in the source and drain regions By adding the components in series to the TFT,
Variations in TFT characteristics can be reduced.

By inserting a resistance component into the TFT,
Although the effective mobility is reduced, it is possible to suppress the characteristic variation originally possessed by the TFT. By using the method of the present invention to selectively insert a resistance component in the thin film transistor array portion where characteristic uniformity is required, and to reduce the resistance component in the thin film transistor portion where high mobility is required, it has been difficult in the past. It is possible to integrate a drive circuit section consisting of high mobility thin film transistors and an input / output section consisting of a thin film transistor array with little mobility variation on the same substrate, which improves the performance of input / output devices such as liquid crystal display devices and image sensors. It will be possible.

[0014]

The present invention will be described more specifically with reference to the following examples. (Example 1) Length 300 mm, width 400 mm, thickness 1.1
A polycrystalline silicon thin film was deposited to a thickness of 100 nm on a glass substrate of mm. Polycrystalline silicon is deposited at a substrate temperature of 600 ° C. by a low pressure CVD method using silane (SiH ₄ ) gas,
It was processed into a TFT shape (island shape) by photolithography. Next, a gate insulating film (SiO ₂ ) was formed to a thickness of 100 nm. The gate insulating film was formed at a substrate temperature of 450 ° C. by an atmospheric pressure CVD method using a mixed gas of silane (SiH ₄ ) and oxygen (O ₂ ). After that, a Ta thin film to be a gate electrode was formed by using the RF sputtering method, and processed into a shape of the gate electrode by photolithography. After forming the gate electrode,
Impurity (phosphorus: P) ions were implanted for the purpose of forming the source and drain regions of the TFT, and heat treatment was performed at 600 ° C. for 24 hours to activate the implanted impurities. An interlayer insulating film (SiO ₂ ) was formed to a thickness of 400 nm and a contact hole was opened. Finally, the source and drain electrodes (Al / Ti: 7
(00/100 nm) was formed to complete the TFT. FIG. 1 (a)
FIG. 4 is a schematic diagram showing an arrangement of main components of the TFT of this embodiment. The width of the gate electrode 11, that is, the channel length L of the TFT was 10 μm, and the channel width was 6 μm. The distances Ls and Ld from the end of the gate electrode to the contact hole formed in the source region or the drain region are 10 μm, respectively.

The TFT of this embodiment has a top gate structure in which the gate electrode 11 is formed above the polycrystalline silicon active layer (channel region) 10, and the source region 10a and the drain region 10b are self-aligned with the gate electrode. Has been formed. The source region and the data line 12 are electrically connected via the contact hole 13, and the drain region and the display electrode 14 are electrically connected via the contact holes 14 and 15. The equivalent circuit of this TFT is shown in FIG. As shown in FIG. 1B, the data line 12 is connected to the TFT through a contact resistance Rcs generated in a contact hole portion 13 with the polycrystalline silicon and a source region polycrystalline silicon resistance Rs. On the other hand, it is connected to the display electrode via the drain region polycrystalline silicon resistor Rd, the contact resistor Rcd with the polycrystalline silicon, and the contact resistor Rcp with the pixel electrode. In practice, the contact resistance Rcp is a value that is sufficiently smaller than Rcd and Rcs and can be ignored. As a result, the resistance component R formed in the TFT is expressed by the following equation (Equation 1).

[0016]

[Equation 1]

The series resistance component R of this embodiment is in the range of 35 KΩ or more and 200 KΩ or less. The resistivity ρ of the impurity-implanted polycrystalline silicon thin film transistor in Example 1 is 1 × 10 5.
⁻¹ (Ω · cm), and Rcs and Rcd were each 10 KΩ. In addition, the thickness of the polycrystalline silicon thin film is 100 nm, and the thin film transistor widths Ws and W
d is 6 μm, and the lengths Ls and L of the source and drain regions are
d is 10 μm. From this, Rs = Rd = 16.7K
Ω, and the series resistance component R is 53.4 KΩ.

FIG. 2 shows the series resistance component and mobility of the thin film transistor. The characteristic of an ideal thin film transistor (when the series resistance component is 0) is an average mobility of 80c.
It is calculated assuming that m ² / V · s and characteristic variation are ± 25%.

In the conventional thin film transistor shown in FIG. 4D, the length L of the source and drain regions is L.
s = Ld is 4 μm, and the thin film transistor width Ws = W
Since d = 6 μm, the resistance of the source and drain regions becomes Rs = Rd = 6.7 KΩ. Since the contact resistance is 10 KΩ, the series resistance component R is 33.4.
KΩ. When the characteristics of the thin film transistor of the conventional example are obtained from FIG. 2, the average mobility is 61 cm ² / V · s and the characteristic variation is ± 20%.

On the other hand, in the thin film transistor array of this embodiment, since each thin film transistor has a series resistance of 53.4 KΩ, the average mobility obtained from FIG.
3 cm ² / V · s, but mobility variation is ± 17%
It was possible to reduce the amount to 1 and improve the uniformity. Also,
Further increase Ls or Ld in FIG. 1, or Ls
By providing the low-concentration impurity implantation region in or Ld, the series resistance component can be further increased, and as a result, the characteristic variation can be further reduced. For example, if the series resistance component is increased to 100 KΩ, the characteristic variation will be 10
%.

Example 2 FIG. 3 shows an example of manufacturing a liquid crystal display device using the TFT of this example. In the thin film transistor array section, the thin film transistor 31 forming each picture element 34
Are connected to the drive circuits on the scanning side 32 and the signal side 33. Each drive circuit section is configured by using a high mobility thin film transistor having polycrystalline silicon as an active layer.
Each pixel is a thin film transistor, and the capacitance component (C
Image is displayed by charging (LC). In the liquid crystal, an additional capacitor (Cs) is formed for the purpose of improving the signal retention rate in the writing time of each pixel. By forming the thin film transistor that switches each pixel using the thin film transistor of Example 1, the mobility variation of the thin film transistor can be reduced to 17% and the display quality is improved.

[0022]

As described above, according to the thin film transistor of the present invention, variations in transistor characteristics can be greatly reduced. In addition, in the circuit portion that drives the thin film transistor array that requires high mobility, the resistance component of the thin film transistor is designed to be as small as possible, so that a high speed drive circuit having the original mobility can be realized. As a result, the thin film transistor array with less characteristic variations and the high-speed circuit for driving the thin film transistor array can be integrated on the same substrate, and the cost of the semiconductor device can be reduced.

[Brief description of drawings]

FIG. 1A is a schematic diagram showing a configuration of a thin film transistor array in one embodiment of the present invention, and FIG. 1B is a diagram showing an equivalent circuit of the thin film transistor array of FIG.

FIG. 2 is a graph showing a correlation between series resistance and mobility of a thin film transistor according to an embodiment of the present invention.

FIG. 3 is a schematic diagram showing a configuration of a liquid crystal display device using a thin film transistor according to an embodiment of the present invention.

4A to 4C are schematic cross-sectional views showing a configuration of a conventional thin film transistor, and FIG. 4D is a schematic diagram showing a positional relationship of main components of the thin film transistor.

[Explanation of symbols]

 10 Polycrystalline Silicon (Active Layer) 10a Polycrystalline Silicon (Source Region) 10b Polycrystalline Silicon (Drain Region) 11 Gate Electrode (Scan Wiring) 12 Source / Drain Electrodes (Data Wiring) 13, 14, 15 Contact Hole 16 Display Electrode (Pixel electrode) 31 Thin film transistor 32 Scanning side driving circuit 33 Data side driving circuit 34 Picture element CLC Liquid crystal capacity Cs Signal holding additional capacity 41 Polycrystalline silicon 42 Gate insulating film 43 Gate electrode (scanning wiring) 44 Interlayer insulating film 45, 46 Contact hole 47 Source electrode 48 Drain electrode

Claims (3)

[Claims] 1. A thin film transistor provided with a semiconductor active layer made of polycrystalline silicon, wherein the resistance value of the polycrystalline silicon thin film forming the source and drain regions of the thin film transistor, the polycrystalline silicon thin film and the metal or metal oxide thin film. The thin film transistor is characterized in that the sum of contact resistances is 35 KΩ or more and 200 KΩ or less. 2. The width of the polycrystalline silicon thin film forming the source and drain regions of the thin film transistor is 4 μm or more and 50 μm or less, and the total distance from the channel region of the thin film transistor to each contact hole formed in the source and drain regions is 10 μm. The thin film transistor according to claim 1, having a thickness of 100 μm or more. 3. An active matrix liquid crystal display device using the thin film transistor according to claim 1 as a switching element of a display section.