JPH09135246A - Asynchronous communication system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the error detection of the start bit of an asynchronous communication frame format concerning an asynchronous communication system. SOLUTION: A transmitter 10 is provided with a first transition detection means 11, a judging data setting means 12, a judging data outputting means 13 and a multiplexing means 14 to send transmission data by multiplexing data of plural bits set by the judging data setting means 12 at the start bit position of transmission data. A receiver 20 is provided with a first transition detection means 21, a judging data receiving means 22, a judging data setting means 23 and a comparing means 24. Then the receiver 20 judges the coincidence of data of plural multiplexed bits and at the time of data coincidence, requires reading of received data to a host device by setting a part masked by a data mask means 25 of received data to be a start bit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an asynchronous communication system, and more particularly to an asynchronous communication system for asynchronously performing data processing among serial communication used between terminal devices.

Asynchronous communication is used, for example, for data transmission between a wireless device installed outdoors and a supervisory control device installed indoors, or between a personal computer and a modem.

[0003]

2. Description of the Related Art FIG. 12 is a diagram showing an example of a frame format for asynchronous communication. In the asynchronous communication method, 1-bit long start bit 1 and multiple-bit data bits 2
And one stop bit 3 having a length of 1 or 2 form one communication frame. In the idle state where communication is not performed, the signal level between the terminal devices is in the "H" state. Here, the start bit 1 in the “L” state
When the change state is detected, synchronization is established and the frame receiving process is started.

In the receiving circuit of the conventional asynchronous communication system, when the falling edge which changes the level from the "H" state to the "L" state when the start bit 1 is received is detected, the time is measured from that point. Then, the reading operation is performed at a position of, for example, ½ of 1 bit, and if the signal level is in the “L” state, it is determined that the level change to the “L” state is the start bit, and the subsequent bit string Is a data bit and the reception process is continued. In this way, when the signal level falls in the idle state, the signal level is detected at the 1/2 bit position after that, and if the signal level detected at that position is in the “L” state, This signal level change is the start bit 1
It is determined that.

[0005]

However, when the signal line between the terminal devices is long or the installation environment is poor, noise may occur on the signal line, and the noise component happens to be 1 When the signal level is in the "L" state at the / 2 bit position, the noise component is determined to be the start bit, and the reception process is started. This is because the data in the central portion of the start bit is read only once, and the data is used as the reference for the start bit determination.

When used for communication between a personal computer and a modem, the data transferred in data bits is the character data itself displayed on the personal computer or notified to the host computer side. The data error detecting means only performs the parity check by adding the parity bit, and does not improve the error detection of the start bit.

The present invention has been made in view of the above circumstances, and an object thereof is to provide an asynchronous communication system in which the error detection of the start bit itself is improved. Also,
It is an object of the present invention to provide an asynchronous communication system having a function of designating a transmission partner by utilizing an improved start bit error detection function.

A further object of the present invention is to provide an asynchronous communication system having a function of transmitting to a partner having the same communication speed by utilizing the improved start bit error detection function.

[0009]

FIG. 1 is a block diagram showing the principle of the present invention for achieving the above object. The data processing method in asynchronous communication according to the present invention includes a transmitting device 10 for transmitting transmission data from a transmitting side terminal device and a receiving device 20 for receiving the transmitted data and passing the received data to the receiving side terminal device.
And are connected by a signal line 30 for transmitting transmission data.

The transmitter 10 includes a leading edge detecting means 11 for detecting a leading edge of a start bit of transmission data output from the terminal device on the transmitting side, and a determination data setting for setting a plurality of bits of determination data functioning as a start bit. Means 12
And a determination data output means 13 for outputting the determined determination data, and a multiplexing means 14 for incorporating the output determination data into the transmission data output from the transmission side terminal device as start bit data. The receiving device 20 includes a leading edge detecting unit 21 that detects a leading edge of data received via the signal line 30, a determination data receiving unit 22 that receives determination data after the leading edge is detected, and determination data of the transmitting device 10. The judgment data setting means 23 for setting the same multi-bit data as the judgment data set by the setting means 12 is compared with the data received by the judgment data receiving means 22 and the data set by the judgment data setting means 23. If the start bit is detected, the comparison means 24 outputs a reception data reading request to the reception side terminal device,
The data mask means 25 is provided for masking the received data while receiving the determination data.

In the transmitter 10, the leading edge detecting means 11
Detects the trailing edge of the transmission data, cancels the reset signal sent to the determination data output means 13. Then, the determination data output unit 13 outputs the multiple-bit determination data set by the determination data setting unit 12 to the multiplexing unit 14. The multiplexing means 14 multiplexes the determination data of a plurality of bits at the position of the start bit of the transmission data at the multiplexing timing notified by the leading edge detection means 11 and sends it out.

In the receiving device 20, when the leading edge detecting means 21 detects the falling leading edge of the leading bit of the sent determination data, the leading edge detecting means 21 sends it to the determination data receiving means 22. The reset signal is released and reception of received data is permitted. As a result, the determination data set on the transmitting side is received, and this data is compared by the comparison means 24 with the data set by the determination data setting means 23. If the comparison means 24 determines that both data match, it is determined to be the start bit of the transmission data,
It requests the receiving side terminal device to read the received data. On the other hand, the leading edge detecting means 21 outputs a data mask signal at the same time when the reset signal is released, and the data masking means 25 receives the data masking signal and masks the data being received while receiving the determination data. In this way, the start bit is composed of a plurality of data bits, and the reception side compares the data bits to determine the coincidence, so that the reliability of error detection of the start bit is improved.

Further, according to the present invention, since the start bit is composed of a plurality of judgment bits, this bit can be used as a data bit for identifying the transmission partner,
It becomes possible to perform one-to-many communication in which the transmission data is sent to the receiving device having the same judgment bit.

Further, according to the present invention, by allowing a plurality of judgment bits to have information on the asynchronous communication speed, the receiving side can identify the receiving device having the communication speed as a transmission partner, whereby one-to-many communication is performed. Will be possible.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 2 is a diagram showing an example of a communication system to which the present invention is applied.

In this example, a configuration example of a system for monitoring an alarm signal generated by a wireless device such as a base station of a mobile phone by a personal computer installed in a remote place is shown. This monitoring system includes a wireless device 40.
A transmitter 50, a modem 60, and a public telephone network 70.
A modem 80, a receiving device 90, and a personal computer 100. Of course, when the setting signal or the like is transmitted from the personal computer 100 to the wireless device 40, the transmitting device is installed in parallel with the receiving device 90, the receiving device is installed in parallel with the transmitting device 50, and bidirectional communication is performed. The system is configured. Here, the asynchronous communication frame format is used for data communication between the wireless device 40 and the modem 60 and between the modem 80 and the personal computer 100.

FIG. 3 is a block diagram showing a configuration example of the transmission device, and FIG. 4 is a time chart showing an operation example of the transmission device. The transmitter 50 includes a one-shot pulse generator 51 that detects a falling edge of a start bit of the transmission data SD output from the wireless device 40, and a clock that generates a clock signal having a frequency n times that of the transmission data SD. The generator 52 and n functioning as a start bit
A setting unit 53 for setting the 2-bit determination data,
The setting unit 53 includes a shift register 54 that serially outputs the determination data input in parallel, and a multiplexing unit 55 that multiplexes the serially output determination data at the start bit position of the transmission data SD.
The wireless device 40 includes a processor 41, a read only memory (ROM) 42, and a random access memory (RAM).
43, an asynchronous communication processing unit 44, and an input / output interface 45. The transmission output of the asynchronous communication processing unit 44 is connected to the data inputs of the one-shot pulse generation unit 51 and the multiplexing unit 55 of the transmission device 50, and the output of the data terminal ready signal ER is connected to the corresponding input of the modem 60.

In this configuration, first, the one-shot pulse generator 51 outputs a reset signal to the shift register 54 in an idle state where communication is not performed, so that the shift register 54 is not operated. The asynchronous communication processing unit 4 is connected to the clock generation unit 52 through the input / output interface 45 of the wireless device 40.
A setting signal such as a frequency division ratio is input so as to generate a clock signal n times as large as the transmission data SD processed in 4. Here, 1 of the transmission data SD is input to the clock generation unit 52.
It is set to generate a clock signal having a clock frequency of 6 times. Further, the setting unit 53 is supplied with a setting signal for forming 8-bit data through the input / output interface 45 of the wireless device 40. Here, it is assumed that the data set by the setting signal is “01101010”, and this is input to the parallel input of the shift register 54.

Here, at time t0, the wireless device 40
When the transmission data SD is output from the asynchronous communication processing unit 44, the one-shot pulse generation unit 51 outputs the transmission data SD.
The trailing edge of the start bit is detected, and a pulse of "L" level is generated for the length of one bit of the start bit, that is, the period from time t0 to time t1. During this period, the one-shot pulse generator 51
The reset signal sent to the shift register 54 is released and the multiplexing timing is sent to the multiplexing unit 55. By releasing the reset signal, the shift register 54 serially outputs the setting data while sequentially shifting the setting data at the timing of the clock signal generated by the clock generation unit 52. The setting data is sent to the multiplexing unit 55, and is output as a start bit of the transmission data SD from the multiplexing unit 55. At time t1, the output of the one-shot pulse generator 51 returns to the “H” level, the shift register 54 is reset, and the multiplexer 55 sends the transmission data SD as it is. Therefore, after this time, the data bits of the subsequent transmission data SD are output from the multiplexing unit 55.

FIG. 5 is a block diagram showing a configuration example of the receiving device, and FIG. 6 is a time chart showing an operation example of the receiving device. The receiver 90 includes a one-shot pulse generator 91 that detects the falling edge of the received data RD from the modem 80, and a shift register 92 that receives the 8-bit data multiplexed on the serial input and outputs the data in parallel. And a clock signal of the same frequency as the clock generation unit 52 of the transmission device 50 to generate the shift register 92.
And a setting unit 94 that outputs a setting signal having the same value as the setting value set by the setting unit 53 of the transmitting device 50, an output of the shift register 92, and a setting value of the setting unit 94. And a comparing section 95 for comparing
When a match is obtained in 5, the modem 80 is multiplexed with the carrier detection signal transmitting unit 96 which transmits the reception carrier detection signal CD indicating that the data signal carrier in the range is received. And a data mask section 97 for masking 8-bit data. The personal computer 100, which is the host device side of the receiving device 90, has a processor 101, a read-only memory (ROM) 102, and a main memory (RAM) 103.
And an asynchronous communication processing unit 104. The reception input of the asynchronous communication processing unit 104 is connected to the output of the data mask unit 97 and the output of the carrier detection signal transmission unit 96 of the reception device 90.

The one-shot pulse generator 91 outputs a reset signal in an idle state where communication is not performed with the shift register 92, so that the shift register 92 is prevented from operating.

At time t01, the modem 80
When the reception data RD is output from the one-shot pulse generation unit 91, the one-shot pulse generation unit 91 detects the falling edge of the first bit of the reception data RD, and the data mask signal until the time t02 corresponding to one bit of the start bit,
Here, an “L” level signal is output. During this period,
The one-shot pulse generator 91 releases the reset signal sent to the shift register 92, and
A data mask signal is sent to the data mask section 97. The data mask unit 97 masks the received data to the “L” level for the time corresponding to the start bit until the time t02, and sends it to the asynchronous communication processing unit 104 of the personal computer 100.

The period during which the data mask signal is being transmitted,
The shift register 92 sequentially takes in external reception data according to the clock signal generated by the clock generation unit 93, and the reception data shifted by the clock signal is output to the output thereof. The parallel output of the shift register 92 is compared with the setting data of the setting unit 94 in the comparison unit 95. If the externally received data is normally received, the data latched in the shift register 92 is the setting data of the setting unit 94 and the final bit position, that is, 8 bits.
It will match at the bit position. When the comparisons in the comparison unit 95 match, the carrier detection signal transmission unit 96
Receives the carrier detection signal CD from the personal computer 10
0 to the asynchronous communication processing unit 104. As a result, the start bit of the transmitted data has been recognized, and the asynchronous communication processing unit 104 has the data mask unit 9
The data masked by 7 is the start bit, and the data following this is recognized as the data bit, and the data bit receiving process is performed.

Next, by utilizing the fact that the start bit is a plurality of bits and using this as a unique identification code of a plurality of receiving devices, the communication partner can be selected. Here, a case where data is individually transmitted from a personal computer to a plurality of wireless devices will be described as an example.

FIG. 7 is a diagram showing an example of a one-to-many communication system. According to this system configuration example, the personal computer 100, the transmitter 50, the modem 80,
Telephone network 70, modem 60, N receiving devices 90a,
90b, ... 90N and N wireless devices 40 installed
a, 40b, ..., 40N. Setting data such as operating parameters are individually transmitted from the personal computer 100 installed at a remote location to each of the wireless devices 40a, 40b, ... 40N.

The configuration of the transmitting device 50 is exactly the same as that shown in FIG.
The setting signal supplied to the wireless communication device is changed according to the wireless devices 40a, 40b, ... A configuration example of the receiving device that receives the transmission data transmitted from the transmitting device 50 is shown below.

FIG. 8 is a block diagram showing a configuration example of a receiving device having a code identification function. The receiving device, for example, the first receiving device 90a, has a one-shot pulse generator 91.
a, a shift register 92a, and a clock generation unit 93a
And a setting unit 94a, a comparison unit 95a, and a data mask unit 97a. In the setting unit 94a, an identification code unique to the wireless device 40a connected to this receiving device 90a is set. The wireless device 40a compares the processor 41a, the read-only memory (ROM) 42a, the random access memory (RAM) 43a, the asynchronous communication processing unit 44a, and the comparing unit 95a of the receiving device 90a when a match is obtained. The interrupt receiving unit 46a receives a read request from the unit 95a. Further, the asynchronous communication processing unit 44a is connected so as to receive the reception carrier detection signal CD from the modem 60.

The operation of the receiving device 90a is basically the same as the operation of the receiving device 90 described with reference to FIG.
However, the setting unit 94a is different in that an identification code unique to the wireless device 40a is set. Therefore, when the personal computer 100 sends the transmission data to the wireless device 40a, the setting signal given from the personal computer 100 to the setting unit 53 of the transmitting device 50 is the same as the identification code unique to the wireless device 40a. The setting value is given. That is, it is possible to select the wireless device from which the transmission data is to be transmitted from the personal computer 100.

Next, in the one-to-many communication system, the frequency setting value set from the personal computer to the clock generation unit in the transmitter is set to a frequency proportional to the communication speed used for asynchronous communication. It is also possible for the receiving device to receive the transmission data having different communication speeds and to select the receiving device to which the transmission data should be transmitted according to the communication speed multiplexed in the start bit. Hereinafter, a configuration example of the receiving device will be described.

FIG. 9 is a block diagram showing an example of the structure of a receiving device for receiving data according to communication speed. N receiving devices 900
The basic configuration of each of the a, 900b, ..., 900N is almost the same as the configuration of the receiving device 90a shown in FIG. 8 except for the clock generating unit 93a. The clock generator includes N receiving devices 900a, 900b, ... 900N.
And is provided in common with each other and is configured by one master clock 901 and one frequency divider 902. The master clock 901 generates a clock signal of frequency f and is input to the frequency divider 902. In the frequency divider 902, the frequency f of the input clock signal is, for example, 1/2, 1/4, ...
The clock signals are divided into 1 / m, and the clock signals having the respective divided frequencies are received by the receiving devices 900a, 900b, ...
It is supplied to the 0N shift register. With this, a circuit for detecting a start bit in each receiving device, that is, a one-shot pulse generation unit, a shift register,
The setting unit and the comparator can determine the communication speed from the frequency of the bit multiplexed with the start bit in the transmission device, and when the transmission data is received, the reception device according to the communication speed can receive the transmission data. become.

Finally, in the one-to-one communication system as shown in FIG. 2, an example of using a plurality of bits multiplexed with the start bit as the communication speed identifier will be described.

FIG. 10 is a block diagram showing a configuration example of a transmitting device having a communication speed notification function. The transmission device 50a has a one-shot pulse generation unit 51a, a clock generation unit 52a, a setting unit 53a, a shift register 54a, and a multiplexing unit 55, similar to the configuration of the transmission device 50 illustrated in FIG.
and a. However, the clock generator 52a
Since the frequency of the generated clock signal is fixed,
There is no need for a setting operation for changing the clock frequency by following the communication speed of the host device, here the wireless device 40,
There is no connection to receive the setting signal. Clock generator 5
The frequency of the clock signal generated in 2a is made higher than the communication speed of asynchronous communication, and is set to a clock frequency of [maximum communication speed of asynchronous communication × number of communication bits × 2] or more.
Therefore, in the case of FIG. 3, one bit of the start bit is completely occupied by the data bit multiplexed with the start bit and representing the communication speed, but in this example, one bit of the start bit is occupied. Even if the communication speed of the asynchronous communication is changed, the multiplexed data bits are transferred at a high speed and at a constant speed.

An example of a time chart in the case where the receiving device corresponding to the transmitting device 50a receives received data having different communication speeds of asynchronous communication is shown below. FIG. 11 is a time chart showing an operation example of the receiving device.

In this figure, the extracted data bit is the data bit multiplexed with the start bit, and the data mask signal is output from the one-shot pulse generator during this period. The communication speed of the data bit is the same for the reception data DR1 transmitted at a communication speed half the maximum communication speed for asynchronous communication and the reception data DR2 transmitted at the maximum communication speed for asynchronous communication. Therefore, the length of the data bit does not change. In the received data, "external received data" indicates data input to the data mask section, and "received data" indicates data output from the data mask section.

[0035]

As described above, according to the present invention, high-speed data bits are multiplexed and transmitted according to the position of the start bit of transmission data in asynchronous communication, and the data bits are detected and received at the receiving side. The data is masked while the data is transmitted and the transmitted data is reproduced. Therefore, it is possible to sufficiently detect the error of the start bit without adding check bits to the data bits in the asynchronous communication format and improve the transmission efficiency of the transmission data. Further, by allocating the identification code or the communication speed of the receiving device to the multiplexed data bits, communication with a plurality of devices having a unique identification code on the receiving side or a plurality of devices set to different communication speeds, that is, One-to-many communication becomes possible.
In addition, the communication speed of the data bit to be multiplexed is set to a constant high speed, the communication speed is specified by the data bit, and the communication speed of the received transmission data is calculated. Even if it is done, the changed communication speed can be promptly recognized on the receiving side.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing the principle of the present invention.

FIG. 2 is a diagram showing an example of a communication system to which the present invention is applied.

FIG. 3 is a block diagram illustrating a configuration example of a transmission device.

FIG. 4 is a time chart showing an operation example of a transmission device.

FIG. 5 is a block diagram showing a configuration example of a receiving device.

FIG. 6 is a time chart showing an operation example of the receiving device.

FIG. 7 is a diagram showing an example of a one-to-many communication system.

FIG. 8 is a block diagram showing a configuration example of a receiving device having a code identification function.

FIG. 9 is a block diagram showing a configuration example of a receiving device that receives by communication speed.

FIG. 10 is a block diagram showing a configuration example of a transmission device having a communication speed notification function.

FIG. 11 is a time chart showing an operation example of the receiving device.

FIG. 12 is a diagram showing an example of a frame format of asynchronous communication.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 transmitter 11 falling edge detection means 12 determination data setting means 13 determination data output means 14 multiplexing means 20 receiving device 21 falling edge detection means 22 determination data receiving means 23 determination data setting means 24 comparison means 25 data masking means 30 Signal line

Claims (6)

[Claims] 1. An asynchronous communication system in which communication between terminal devices is performed asynchronously, leading edge detecting means for detecting a leading edge of a start bit of transmission data output from a transmitting side terminal device, and a plurality of bits of judgment data are provided. Transmission side judgment data setting means for setting, judgment data output means for serially outputting the judgment data in response to the detection of the leading edge of the start bit by the leading edge detecting means, and the outputted judgment data for the transmission data. A transmitting device having a multiplexing means for multiplexing and transmitting at the position of the start bit, leading edge detecting means for detecting a leading edge of the received data, and receiving data after the leading edge detection by the leading edge detecting means. Determination data receiving means, receiving side determination data setting means for setting the same data as the transmitting side determination data setting means, and receiving by the determination data receiving means Comparing the set data and the set judgment data, if the start bit is detected when they match, comparing means for outputting a reception data read request to the receiving side terminal device; and receiving means while receiving the judgment data. A receiver having a data masking means for masking existing data, and an asynchronous communication system. 2. One-shot pulse generation means for detecting a falling edge of a start bit of transmission data output from a transmission side terminal device and generating a pulse having a length of 1 bit, and a communication speed of the transmission data. A shift register operating at a speed n times higher than that of the shift register; setting means for setting a parallel input signal input to the shift register; and a serial output from the shift register during a period of the pulse generated by the one-shot pulse generating means. And a multiplexing unit that multiplexes the data at the position of the start bit of the transmission data and sends the multiplexed data, and a transmitter for asynchronous communication. 3. One-shot pulse generation means for detecting a falling edge of received data to generate a pulse having a length of 1 bit, and a response to detection of a falling edge of received data by the one-shot pulse generation means. Then, the shift register for inputting the transmission data at a speed n times the communication speed of the transmission data and the parallel output signal of the shift register are compared with a preset set value, and when the received data is matched, A comparison means for judging that a start bit is received; and a data mask means for masking the transmission data and outputting it as a start bit of the reception data during the period of the pulse generated by the one-shot pulse generation means. A receiver in asynchronous communication characterized by the above. 4. The received data is data in which a data bit that is higher than a communication speed used for asynchronous communication and identifies an asynchronous communication speed is multiplexed at a start bit position, and the shift register is set to the high speed. 4. The receiving device in asynchronous communication according to claim 3, wherein the receiving device is configured so that the communication speed of the received data follows the communication speed determined by the content of the data bit. 5. A first one-shot pulse generation means for detecting a falling edge of a start bit of transmission data output from a transmission side terminal device to generate a pulse having a length of 1 bit, and the transmission data. A first shift register that operates at a speed n times as fast as the communication speed, setting means for setting an n / 2-bit parallel input signal input to the first shift register as a device-specific identification code, And a multiplexing unit that multiplexes and outputs the serial output from the first shift register to the position of the start bit of the transmission data during the period of the pulse generated by the one-shot pulse generation unit. Second one-shot pulse generation for detecting a falling edge of received data from the transmitter to generate a pulse having a length of 1 bit A second shift register for inputting the transmission data at a speed n times the communication speed of the transmission data in response to the detection of the falling edge of the reception data by the second one-shot pulse generation means. Comparing means for comparing the n / 2-bit parallel output signal of the second shift register with preset device-specific setting values, and notifying the corresponding device of a communication request, and comparing means. A plurality of receiving devices each having data masking means for masking the transmission data and outputting it as a start bit of the reception data during the period of the pulse generated by the one-shot pulse generating means. An asynchronous communication system capable of one-to-many communication. 6. A first one-shot pulse generation means for detecting a falling edge of a start bit of transmission data output from a transmission side terminal device to generate a pulse having a length of 1 bit, and the transmission data. A first shift register that operates at a speed n times the communication speed of, and a setting that sets an n / 2-bit parallel input signal that is input to the first shift register as data that indicates the communication speed of the transmission data. Means and a multiplexing means for multiplexing and transmitting the serial output from the first shift register to the position of the start bit of the transmission data during the pulse generated by the first one-shot pulse generating means. And a clock signal having a speed n times the speed of each transmission data corresponding to each transmission speed of the transmission data. Lock generating means; second one-shot pulse generating means for detecting a falling edge of received data from the transmitting device to generate a pulse having a length of 1 bit at each communication speed; A second shift register for inputting the transmission data at the speed of the corresponding clock signal from the clock generation means in response to the detection of the falling edge of the reception data by the one-shot pulse generation means, and the second shift Comparing means for comparing the n / 2-bit parallel output signal of the register with preset preset values of the respective communication speeds, and comparing them to notify the corresponding device of the communication request, and the second one-shot. During the period of the pulse generated by the pulse generation means, the transmission data is masked and output as a start bit of the reception data. A plurality of receiving devices having Tamasuku means and respectively, asynchronous communication system capable of one-to-many communication, characterized in that it consists of.