JPH08335754A - Guard structure employing via hole/through hole - Google Patents
Guard structure employing via hole/through holeInfo
- Publication number
- JPH08335754A JPH08335754A JP16149295A JP16149295A JPH08335754A JP H08335754 A JPH08335754 A JP H08335754A JP 16149295 A JP16149295 A JP 16149295A JP 16149295 A JP16149295 A JP 16149295A JP H08335754 A JPH08335754 A JP H08335754A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- row
- holes
- center
- rows
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0254—High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、電子回路基板のガード
構造に関し、より詳細には、微小電流測定の際に漏れ電
流による影響と誘電吸収による待ち時間を著しく減少さ
せるビアホール/スルーホールを用いたガード構造に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a guard structure for an electronic circuit board, and more particularly, to a via hole / through hole which significantly reduces the influence of leakage current and the waiting time due to dielectric absorption when measuring a small current. It was about the guard structure.
【0002】[0002]
【従来技術と解決しようとする課題】従来、電子回路基
板に微小電流測定などのため、高絶縁で良好な誘電吸収
特性を備えた、言い換えると、漏れ電流が少なく測定待
ち時間が短くて済む信号線を設けるために、様々な構造
が考案されてきた。2. Description of the Related Art Conventionally, a signal having a high insulation and a good dielectric absorption characteristic for measuring a small amount of current on an electronic circuit board, in other words, a signal having a small leak current and a short measurement waiting time. Various structures have been devised to provide the wires.
【0003】一例として、クローバリーフ、テフロンス
タッドなどのインシュレータを用いて、基板に対して絶
縁された端子を基板上に設け、その端子を利用して空中
配線する構造がある。この構造は、空中配線を利用する
ため信号線からの漏れ電流防止の効果と他電位の導体と
の間に空気しかないために誘電吸収による電流低減の効
果が大きいが、基板上にインシュレータを設ける作業と
配線のはんだ付け作業が手作業となるため、作業コスト
が高く付き、インシュレータの部品コストと合わせて無
視できないコスト増になるのが問題となっている。As an example, there is a structure in which an insulator such as a clover leaf, a Teflon stud, or the like is used to provide a terminal insulated from the substrate on the substrate, and the terminal is used to perform aerial wiring. Since this structure uses the aerial wiring, it has a large effect of preventing the leakage current from the signal line and a large effect of reducing the current due to the dielectric absorption because there is only air between the conductor of another potential, but an insulator is provided on the substrate. Since the work and the soldering work of the wiring are manual work, the work cost is high, and the cost is not negligible together with the cost of the insulator parts.
【0004】ここで、漏れ電流とは、絶縁部材を通して
信号線に定常的に流れ込むあるいは流れ出す電流で、流
れる量は時間と関係がない。誘電吸収とは、信号線と周
囲の導体との間に形成されるキャパシタンス空間に誘電
体(絶縁部材)が含まれる時に起こるもので、どちらか
の電位が変化した時に、そのキャパシタンス空間にかか
る電界が変化し、それに伴ってこの空間内の誘電体が誘
電分極を起こす際に、分極が時間をかけて起こるため
に、過渡的に電流が流れてしまう現象で、分極が終了す
るまで待つことで収束する。しかし、例えば、端子電圧
が100V変化したときに、誘電吸収による電流の値が
フェムトアンペア程度まで落ち着くまでに数十秒を要す
ることもあり、この待ち時間が長いのが、微小電流測定
の際に大きな問題となる。Here, the leak current is a current that constantly flows into or out of the signal line through the insulating member, and the amount of the flow is independent of time. Dielectric absorption occurs when the dielectric space (insulating member) is included in the capacitance space formed between the signal line and the surrounding conductors, and the electric field applied to the capacitance space when either potential changes. Changes, and when the dielectric in this space undergoes dielectric polarization, the polarization occurs over time, causing a transient current flow.By waiting until the polarization ends, Converge. However, for example, when the terminal voltage changes by 100 V, it may take several tens of seconds until the value of the current due to the dielectric absorption settles down to about femtoamperes, and this long waiting time is long when measuring a minute current. It becomes a big problem.
【0005】他方、電子回路基板に高絶縁の信号線を設
ける構造のうち、最も漏れ電流及び誘電吸収による影響
の少ないものとして、図1に示されるような電子回路基
板40中に設けられた信号線10の上下、左右をガード
パターン12、14、16、18で囲み、左右にビアホ
ール/スルーホール20、22を並べる構造がある。図
1は、理解を容易にするために、基板の絶縁体部分を透
明にした断面図を備えた斜視図として描いてある。図2
は図1に示される信号線とガードの構造体を上から見た
構造図である。On the other hand, in the structure in which the highly insulated signal line is provided on the electronic circuit board, the signal provided in the electronic circuit board 40 as shown in FIG. 1 is assumed to have the least influence by the leakage current and the dielectric absorption. There is a structure in which the upper and lower sides and the left and right sides of the line 10 are surrounded by guard patterns 12, 14, 16, and 18, and the via holes / through holes 20, 22 are arranged on the left and right sides. For ease of understanding, FIG. 1 is drawn as a perspective view with a sectional view in which the insulating portion of the substrate is transparent. Figure 2
FIG. 2 is a structural view of the signal line and guard structure shown in FIG. 1 as viewed from above.
【0006】ここで、ビアホール/スルーホールとは、
共に、積層板の異なる層の導体間を接続するために、積
層間に貫通させた孔にメッキなどを施して導通をとった
ものである。スルーホールとは積層板全体を表から裏へ
貫通しているものを称し、ビアホールとは一部の導体層
間にしか貫通していないものを称する。Here, the via hole / through hole means
In both cases, in order to connect the conductors of different layers of the laminated plate, the holes penetrating between the laminated plates are plated so as to be electrically connected. A through hole refers to one that penetrates the entire laminated plate from the front to the back, and a via hole refers to one that penetrates only part of the conductor layers.
【0007】図1の構造では、経路34のような基板の
上下からの漏れ電流は、ガードパターンが面状に信号線
の上下を覆っているのでガードを流れ、信号線10に流
れることはない。また、他電位の導体から経路34によ
る誘電吸収による影響は、その経路では他電位の導体か
らは信号線10は見えず、ガード14しか見えないの
で、誘電分極による電流はガード14に流れ込み、信号
線10には流れ込まない。信号線10からはガード14
が見えているが、好ましくは、ガード14をアクティブ
ガードにして、信号線と同電位にすることにより、信号
線10とガード14の電位変動による誘電吸収の影響が
無視できるが、ガード14にパッシブガードを用い、接
地電位と等しくして、ガード電位の変動をなくすように
しても、ある程度の効果は期待できる。同様に、横方向
からの漏れ電流と誘電吸収の影響は、一部は経路32の
ように左右のガードパターン16および18で妨げら
れ、一部は経路30のようにビアホール20及び22の
ガードに妨げられる。しかしながら、少なからぬ漏れ電
流と誘電吸収による電流が経路36のように横のガード
パターン18とビアホール22の間をすり抜けて信号線
10に流れ込むか流れ出してしまう。In the structure of FIG. 1, the leakage current from above and below the substrate such as the path 34 flows through the guard and does not flow into the signal line 10 because the guard pattern covers the signal lines above and below. . Further, the influence of the dielectric absorption from the conductor of the other potential on the path 34 is that the conductor of the other potential does not see the signal line 10 but only the guard 14 in that path, so that the current due to the dielectric polarization flows into the guard 14 and the signal. It does not flow into line 10. Guard 14 from signal line 10
However, it is preferable that the guard 14 be an active guard and have the same potential as that of the signal line, so that the influence of dielectric absorption due to potential fluctuations of the signal line 10 and the guard 14 can be ignored, but the guard 14 is passive. Even if a guard is used and made equal to the ground potential to eliminate the fluctuation of the guard potential, some effect can be expected. Similarly, the influence of the leakage current from the lateral direction and the dielectric absorption is partly blocked by the left and right guard patterns 16 and 18 as in the path 32, and partly in the guard of the via holes 20 and 22 as in the path 30. Disturbed. However, a considerable amount of leakage current and current due to dielectric absorption pass through between the lateral guard pattern 18 and the via hole 22 like the path 36 and flow into or out of the signal line 10.
【0008】これを防ぐためにガード用ビアホール/ス
ルーホールを隙間なく設け、壁状に配することで、漏れ
電流と誘電吸収による影響をほとんど妨げることができ
る。しかしながら、ある程度の距離にわたってこのよう
なビアホール/スルーホールを隙間なくつなげると、基
板材料の機械的強度に問題が出てくる。また、このよう
なスルーホールのガードを伴った信号線が基板全面にわ
たって引き回されると、場合によっては、基板の内側が
くりぬかれてしまうことになり、製作不可能な場合もあ
る。In order to prevent this, the via holes / through holes for guard are provided without a gap and are arranged in a wall shape, so that the influence of the leakage current and the dielectric absorption can be almost prevented. However, if such via holes / through holes are connected without a gap over a certain distance, a problem arises in the mechanical strength of the substrate material. In addition, if a signal line with such a guard for a through hole is routed over the entire surface of the substrate, the inside of the substrate may be hollowed out in some cases, and it may not be possible to manufacture.
【0009】この問題は、横からの漏れ電流を防ぐため
に、ビアホール/スルーホールによるガードの代わり
に、壁状の導体をプリント基板に導入してガードとする
場合にも同様に発生する。This problem also occurs when a wall-shaped conductor is introduced into the printed circuit board as a guard in place of the guard by a via hole / through hole in order to prevent a leakage current from the side.
【0010】このため、基板の強度を下げることなく、
横方向の漏れ電流と誘電吸収による影響をなるべく防ぐ
ガード構造が求められている。Therefore, without lowering the strength of the substrate,
There is a demand for a guard structure that prevents the effects of lateral leakage current and dielectric absorption as much as possible.
【0011】本発明の目的は、電子回路基板において、
漏れ電流及び誘電吸収の影響を著しく減らすことができ
るビアホール/スルーホールを用いたガード構造を提供
することにある。An object of the present invention is to provide an electronic circuit board,
It is an object of the present invention to provide a guard structure using via holes / through holes which can significantly reduce the effects of leakage current and dielectric absorption.
【0012】[0012]
【課題を解決するための手段】本発明は、電子回路基板
中に形成された信号線への漏れ電流及び誘電吸収の影響
を減らすために、信号線の上下のガードパターンに接続
され、信号線の左右に配置されたガード用ビアホール/
スルーホールの列の構造に工夫を施した。SUMMARY OF THE INVENTION In order to reduce the influence of leakage current and dielectric absorption on a signal line formed in an electronic circuit board, the present invention is connected to a guard pattern above and below the signal line, Beer holes for guards located on the left and right of /
The structure of the row of through holes was modified.
【0013】本発明では、基板の強度を維持するために
ガード用のビアホール/スルーホールを複数列並べた構
造を備える。各ビアホール/スルーホールの断面は、
円、楕円、長方形などいろいろな形を使用することがで
きる。各列の中心線の間隔は一定で各列の穴の中心と他
の列の穴の中心との相対位置を、一方の側から他方の側
に抜けるどのような直線経路を取っても、必ずビアホー
ル/スルーホールのどれかのガードに遮られるように設
定することによって、横方向の漏れ電流を著しく減らす
構成をとることができる。The present invention has a structure in which a plurality of via holes / through holes for guard are arranged in order to maintain the strength of the substrate. The cross section of each via hole / through hole is
Various shapes such as circle, ellipse and rectangle can be used. The distance between the center lines of each row is constant and the relative position between the center of the hole in each row and the center of the hole in the other row must be taken regardless of any straight path that runs from one side to the other. By setting it to be blocked by one of the via hole / through hole guards, it is possible to significantly reduce the leakage current in the lateral direction.
【0014】本発明によるビアホール/スルーホールの
ガード構造は、好適には、ビルドアップ基板やセラミッ
ク基板に用ると、その微細加工技術を利用でき、穴の列
数が多くなっても大きな面積を占めることなく実装でき
る。しかし、他の基板材料、部品を用いても実現できる
ことは、当業者には理解されよう。The via-hole / through-hole guard structure according to the present invention is preferably applied to a build-up substrate or a ceramic substrate by utilizing its fine processing technology, and a large area can be obtained even if the number of rows of holes is increased. Can be implemented without occupying. However, those skilled in the art will understand that other substrate materials and components can be used.
【0015】[0015]
【実施例】本明細書では、説明の便宜上、ビアホールと
して説明してある箇所があるが、それに限定されること
なく、ビアホールをスルーホールと置き換えて適応する
こともできることは、当業者にとっては明らかである。
また、「穴」という用語を、貫通しているものを示す
「孔」と置き換えて適用することも同様である。EXAMPLES In the present specification, for convenience of description, there is a portion described as a via hole, but it is obvious to those skilled in the art that the via hole may be replaced with a through hole and adapted. Is.
It is also the same as applying the term "hole" by replacing it with a "hole" which indicates a through-hole.
【0016】図3に、本発明による穴の直径と隣接する
列の中心線(列を構成する多数の穴の中心を通る線)の
間隔の比が2:3の時に最適な、4本の列から成るビア
ホールまたはスルーホールによるガード構造の実施例の
主要部分を上から見た図を示す。図3に示される寸法は
実際の長さではなく、長さの比を示すことに注意された
い。図3の4本の穴の列は、第1列と第2列の穴の中心
のずれ(第1列の穴201の中心と第2列の穴202の
中心の縦の間隔)が、穴の直径を長さ8としたときに長
さ6であり、第1列と第3列の同様なずれ(第1列の穴
201の中心と第3列の穴203の中心の縦の間隔)は
長さ4であり、第1列と第4列の同様なずれ(第1列の
穴201の中心と第4列の穴204の中心の縦の間隔)
は長さ9である。FIG. 3 shows that the optimum diameter of the four holes according to the present invention is 4 when the ratio of the distance between the center lines of adjacent rows (the line passing through the centers of the holes forming the rows) is 2: 3. FIG. 5 shows a view from above of the main part of an embodiment of a guard structure with via holes or through holes in rows. Note that the dimensions shown in Figure 3 are not actual lengths, but ratios of lengths. In the row of four holes in FIG. 3, the deviation between the centers of the holes in the first row and the second row (the vertical distance between the centers of the holes 201 in the first row and the holes 202 in the second row) is The length is 6 when the diameter of the is 8 and the same deviation between the first row and the third row (the vertical interval between the centers of the holes 201 of the first row and the holes 203 of the third row) Is a length of 4, and the same deviation between the first row and the fourth row (the vertical distance between the centers of the holes 201 of the first row and the holes 204 of the fourth row)
Is 9 in length.
【0017】このように穴の間に基板部材を残しながら
も、複数の列を適切な配置で並べる構造をとることで、
機械的強度を保ちながらも、このビアホール/スルーホ
ール集合構造の一方の側から他方の側をどのような直線
経路を取っても電気的に見通すことができないガード構
造となっている。このため、このガード構造の外側にあ
る導体からの漏れ電流や誘電吸収による影響を考えた場
合、外側からは信号線の代わりにガードしか見えないた
め、これらの影響を著しく減らすことができる。Thus, by adopting a structure in which a plurality of rows are arranged in an appropriate arrangement while leaving the substrate member between the holes,
The guard structure is such that, while maintaining the mechanical strength, the via hole / through hole aggregate structure cannot be electrically viewed through any straight path from one side to the other side. Therefore, when considering the influence of the leakage current from the conductor outside the guard structure and the dielectric absorption, only the guard can be seen from the outside instead of the signal line, and these influences can be significantly reduced.
【0018】図4は図3の構造のビアホールを用いたガ
ード付き信号線の構造図である。図4は、理解を容易に
するために、基板の絶縁体部分を透明にした断面図を備
えた斜視図として描いてある。101、102はそれぞ
れ図3に示す構造・配置の一群のビアホールであり、信
号線10を上下で覆うガードパターン12、14を接続
するように設けられ、経路38のように横方向からの漏
れ電流及び誘電吸収を妨げる構造となっている。FIG. 4 is a structural diagram of a guarded signal line using the via hole having the structure of FIG. For ease of understanding, FIG. 4 is drawn as a perspective view with a sectional view in which the insulating portion of the substrate is transparent. 101 and 102 are a group of via holes each having the structure / arrangement shown in FIG. 3, and are provided so as to connect the guard patterns 12 and 14 that cover the signal line 10 from above and below. Also, it has a structure that prevents dielectric absorption.
【0019】図5は図4に示される高絶縁信号線を上か
ら見た構造図である。上部ガードパターン12の両横に
は図3で示される一群のビアホール101及び102が
配置されている。FIG. 5 is a structural view of the high-insulation signal line shown in FIG. 4 as seen from above. On both sides of the upper guard pattern 12, a group of via holes 101 and 102 shown in FIG. 3 are arranged.
【0020】図6に、本発明による穴の直径と隣接する
列の中心線の間隔の比が5:8の時に最適な、5本の列
を有する時のビアホール/スルーホールの構造を持つ別
の実施例の主要な部分を上から見た図を示す。図6に示
される寸法も実際の長さではなく、長さの比を示すこと
に注意されたい。図6の5本の穴の列は、第1列と第2
列の穴の中心のずれ(第1列の穴211の中心と第2列
の穴212の中心の縦の間隔)が、穴の直径を長さ5と
したときに長さ4であり、第2列と第3列と第5列の穴
の中心のずれ(第2列の穴212の中心と第3列の穴2
13の中心と第5列の穴215の中心の縦の間隔)はな
く、第1列と第4列の穴の中心のずれ(第1列の穴21
1の中心と第4列の穴214の中心の縦の間隔)もな
い。FIG. 6 shows another structure having a via hole / through hole structure having five rows, which is optimum when the ratio of the hole diameter to the center line spacing between adjacent rows is 5: 8 according to the present invention. The figure which looked at the principal part of the Example of this from above is shown. Note that the dimensions shown in FIG. 6 also indicate the ratio of lengths, not the actual lengths. The row of five holes in FIG. 6 includes a first row and a second row.
The deviation of the centers of the holes in the rows (the vertical distance between the centers of the holes 211 in the first row and the holes 212 in the second row) is 4 when the diameter of the holes is 5, and Misalignment of the centers of the holes in the second row, the third row, and the fifth row (the center of the hole 212 in the second row and the hole 2 in the third row 2
There is no vertical gap between the center of 13 and the center of hole 215 in the fifth row, and there is a deviation between the centers of holes in the first and fourth rows (hole 21 in the first row).
There is also no vertical spacing between the center of 1 and the center of the holes 214 in the fourth row).
【0021】図7に本発明による、穴の直径と隣接する
列の中心線の間隔の比が1:2の時に最適な、6本の列
を有する時のビアホール/スルーホールの構造を持つ別
の実施例の主要な部分を上から見た図を示す。図7に示
される寸法もまた実際の長さではなく、長さの比を示す
ことに注意されたい。図7の6本の穴の列は、第1列と
第2列の穴の中心のずれ(第1列の穴221の中心と第
2列の穴222の中心の縦の間隔)が、穴の直径を長さ
8としたときに長さ8であり、第1列と第3列の同様な
ずれ(第1列の穴221の中心と第3列の穴223の中
心の縦の間隔)は長さ13であり、第1列と第4列の同
様なずれ(第1列の穴221の中心と第4列の穴224
の中心の縦の間隔)は長さ12であり、第1列と第5列
の同様なずれ(第1列の穴221の中心と第5列の穴2
25の中心の縦の間隔)は長さ10であり、第1列と第
6列の穴の中心のずれ(第1列の穴221の中心と第6
列の穴226の中心の縦の間隔)はない。FIG. 7 shows another structure of a via hole / through hole structure having six rows, which is optimal according to the present invention when the ratio of the hole diameter to the center line spacing between adjacent rows is 1: 2. The figure which looked at the principal part of the Example of this from above is shown. Note that the dimensions shown in FIG. 7 also show the ratio of lengths, not the actual lengths. In the row of six holes in FIG. 7, the deviation between the centers of the holes in the first row and the second row (the vertical interval between the centers of the holes 221 in the first row and the holes 222 in the second row) is The length is 8 when the diameter of the is 8 and the same deviation between the first row and the third row (the vertical distance between the centers of the holes 221 of the first row and the holes 223 of the third row) Has a length of 13 and has a similar displacement between the first and fourth rows (the center of the holes 221 of the first row and the holes 224 of the fourth row).
The vertical distance between the centers of the two is 12 and the same misalignment between the first row and the fifth row (the center of the holes 221 in the first row and the holes 2 in the fifth row).
The vertical distance between the centers of 25 is 10 and the deviation between the centers of the holes in the first row and the sixth row (the center of the holes 221 in the first row and the sixth row).
There is no vertical spacing in the center of the rows of holes 226.
【0022】上記の各実施例は、好適には基板にビルド
アップ基板やセラミック基板を用い、その微細加工技術
を利用することで、ビアホール/スルーホールのガード
構造をコンパクトに形成することができる。In each of the above-described embodiments, a build-up substrate or a ceramic substrate is preferably used as the substrate, and the microfabrication technology is used to form the via hole / through hole guard structure in a compact manner.
【0023】一例として、ビルドアップ基板では穴の直
径を100ミクロンにすることができるが、この場合こ
のガード構造の各ビアホール群の幅は、最も穴の間隔が
大きい図7の構造でも1.2ミリで収まる。As an example, the diameter of the holes can be 100 μm in the build-up board. In this case, the width of each via hole group of this guard structure is 1.2 even in the structure of FIG. It fits in millimeters.
【0024】又、上述の実施例において、ビアホール/
スルーホールの断面を楕円あるいは長方形などに変形す
ることによっても、同様な効果のビアホール/スルーホ
ールの構造を作ることができる。Further, in the above embodiment, the via hole /
By modifying the cross section of the through hole into an ellipse or a rectangle, a via hole / through hole structure having a similar effect can be produced.
【0025】以上に、本発明の実施例を示したが、例示
の様式、配置、その他を限定するものではなく、必要に
応じて本発明の要旨を失うことなく構成の変形も許容さ
れる。Although the embodiments of the present invention have been described above, the exemplary forms, arrangements, and the like are not limited, and modifications of the configuration are allowed as necessary without losing the gist of the present invention.
【0026】[0026]
【発明の効果】以上に述べたように、本発明によれば、
以下の効果を奏することができる。 (1)電子回路基板に、機械的な強度を維持しながらも
漏れ電流及び誘電吸収の影響を著しく減らすビアホール
/スルーホールによるガード構造を形成できる。 (2)電子回路基板に、上下をガードパターンで覆うよ
うな信号線を設ける際に、信号線横に上下のガードパタ
ーンに接続された本発明によるビアホール/スルーホー
ルを用いたガード構造を設けることにより、低い製造コ
ストで絶縁性能及び誘電吸収特性を改善したガード付き
信号線を形成できる。As described above, according to the present invention,
The following effects can be achieved. (1) It is possible to form a guard structure by a via hole / through hole on an electronic circuit board while significantly reducing influences of leakage current and dielectric absorption while maintaining mechanical strength. (2) When a signal line that covers the upper and lower sides with a guard pattern is provided on the electronic circuit board, a guard structure using via holes / through holes according to the present invention connected to the upper and lower guard patterns is provided beside the signal line. As a result, it is possible to form a guarded signal line with improved insulation performance and dielectric absorption characteristics at a low manufacturing cost.
【図1】従来技術による電子回路基板中に設けられたガ
ード付き信号線の斜視図である。FIG. 1 is a perspective view of a guarded signal line provided in an electronic circuit board according to a conventional technique.
【図2】図1に示されるガード付き信号線を上から見た
構造図である。FIG. 2 is a structural diagram of the guarded signal line shown in FIG. 1 viewed from above.
【図3】本発明の実施例の主要な部分を示すビアホール
/スルーホールによるガード構造を上から見た図であ
る。FIG. 3 is a view from above of a via hole / through hole guard structure showing a main part of an embodiment of the present invention.
【図4】本発明の実施例である図3に示されるビアホー
ルによるガード構造を用いたガード付き信号線の斜視図
である。FIG. 4 is a perspective view of a guarded signal line using a guard structure with via holes shown in FIG. 3, which is an embodiment of the present invention.
【図5】図4に示されるガード付き信号線を上から見た
構造図である。5 is a structural diagram of the guarded signal line shown in FIG. 4 as viewed from above. FIG.
【図6】本発明の別の実施例の主要な部分を示すビアホ
ール/スルーホールによるガード構造を上から見た図で
ある。FIG. 6 is a top view of a via-hole / through-hole guard structure showing a main part of another embodiment of the present invention.
【図7】本発明の別の実施例の主要な部分を示すビアホ
ール/スルーホールによるガード構造を上から見た図で
ある。FIG. 7 is a view from above of a via-hole / through-hole guard structure showing the main part of another embodiment of the present invention.
10:信号線 12、14:ガードパターン 38:経路 40:電子回路基板 101、102:ビアホール 200:ガードパターン 201、202、203、204、211、212、2
13、214、215、221、222、223、22
4、225、226:ビアホール/スルーホール10: Signal line 12, 14: Guard pattern 38: Path 40: Electronic circuit board 101, 102: Via hole 200: Guard pattern 201, 202, 203, 204, 211, 212, 2
13, 214, 215, 221, 222, 223, 22
4, 225, 226: Via hole / through hole
Claims (5)
ールを有し、 前記ビアホール/スルーホールは複数列隣接して並べら
れ、前記各列のビアホール/スルーホールの穴の中心の
位置をずらして配置することを特徴とするガード構造。1. A signal line and a plurality of via holes / through holes as guards of the signal line, wherein the via holes / through holes are arranged adjacent to each other in a plurality of columns, and the via holes / through holes in each column are The guard structure is characterized by arranging the centers at different positions.
ールの配置において、一方の側から他方の側ヘのすべて
の直線経路が少なくとも一つのビアホール/スルーホー
ルによって遮られることを特徴とする請求項1記載のガ
ード構造。2. In the arrangement of via holes / through holes adjacent to each other in a plurality of columns, at least one via hole / through hole blocks all linear paths from one side to the other side. The described guard structure.
いて、 断面が円で4本の列を有し、 前記各穴の直径と隣接する列と列の中心線の間隔の比が
2:3で、 第2列の各穴の中心と第1列の各穴の中心のずれが、前
記穴の直径を長さ8とすると長さ6であり、 第3列の各穴の中心と前記第1列の各穴の中心のずれ
が、前記穴の直径を長さ8とすると長さ4であり、 第4列の各穴の中心と前記第1列の各穴の中心のずれ
が、前記穴の直径を長さ8とすると長さ9であることを
特徴とする請求項1記載のガード構造。3. In the via hole / through hole arrangement, the cross section has four rows of circles, and the ratio of the diameter of each hole to the spacing between adjacent rows and the center line of the rows is 2: 3. The deviation between the center of each hole in the second row and the center of each hole in the first row is 6 when the diameter of the hole is 8 and the center of each hole in the third row and the first row The deviation of the center of each hole is 4 when the diameter of the hole is 8 and the deviation of the center of each hole in the fourth row from the center of each hole in the first row is The guard structure according to claim 1, wherein the length is 9 when the diameter is 8 in length.
いて、 断面が円で5本の列を有し、 前記各穴の直径と隣接する列と列の中心線の間隔の比が
5:8で、 第2列の各穴の中心と第1列の各穴の中心のずれが、前
記穴の直径を長さ5とすると長さ4であり、 前記第2列と第3列と第5列の各穴の中心のずれはな
く、 前記第1列と第4列の各穴の中心のずれはないことを特
徴とする請求項1記載のガード構造。4. In the via hole / through hole arrangement, the cross section has five rows of circles, and the ratio of the diameter of each hole to the distance between adjacent rows and the center line of the rows is 5: 8. The deviation between the center of each hole in the second row and the center of each hole in the first row is 4 when the diameter of the hole is 5 and the length of the second row, the third row and the fifth row is The guard structure according to claim 1, wherein the centers of the holes are not displaced, and the centers of the holes in the first row and the fourth row are not displaced.
いて、 断面が円で6本の列を有し、 前記各穴の直径と隣接する列と列の中心線の間隔の比が
1:2で、 第2列の各穴の中心と第1列の各穴の中心のずれが、前
記穴の直径を長さ8とすると長さ8であり、 第3列の各穴の中心と前記第1列の各穴の中心のずれ
が、前記穴の直径を長さ8とすると長さ13であり、 第4列の各穴の中心と前記第1列の各穴の中心のずれ
が、前記穴の直径を長さ8とすると長さ12であり、 第5列の各穴の中心と前記第1列の各穴の中心のずれ
が、前記穴の直径を長さ8とすると長さ10であり、 第6列と前記第1列の各穴の中心のずれはないことを特
徴とする請求項1記載のガード構造。5. In the via hole / through hole arrangement, the cross section has six rows of circles, and the diameter of each hole has a ratio of the spacing between adjacent rows and the center line of the rows of 1: 2, The deviation between the center of each hole in the second row and the center of each hole in the first row is 8 when the diameter of the hole is 8 and the center of each hole in the third row and the first row The deviation of the center of each hole is 13 when the diameter of the hole is 8 and the deviation of the center of each hole in the fourth row from the center of each hole in the first row is If the diameter is 8 and the length is 12, the deviation between the center of each hole in the fifth row and the center of each hole in the first row is 10 if the diameter of the hole is 8 The guard structure according to claim 1, wherein the centers of the holes in the sixth row and the holes in the first row are not displaced.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16149295A JPH08335754A (en) | 1995-06-05 | 1995-06-05 | Guard structure employing via hole/through hole |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16149295A JPH08335754A (en) | 1995-06-05 | 1995-06-05 | Guard structure employing via hole/through hole |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH08335754A true JPH08335754A (en) | 1996-12-17 |
Family
ID=15736106
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16149295A Pending JPH08335754A (en) | 1995-06-05 | 1995-06-05 | Guard structure employing via hole/through hole |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH08335754A (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000261215A (en) * | 1999-03-10 | 2000-09-22 | Nippon Telegr & Teleph Corp <Ntt> | Microwave and millimetric wave waveguide and integrated circuit using this waveguide |
US6558168B2 (en) | 2000-02-15 | 2003-05-06 | Agilent Technologies, Inc. | Probe card |
JP2004228113A (en) * | 2003-01-20 | 2004-08-12 | Rion Co Ltd | Insulating structure using printed board |
US7214873B2 (en) | 2004-05-24 | 2007-05-08 | Agilent Technologies, Inc. | Electrical transmission line and a substrate |
JP2011071403A (en) * | 2009-09-28 | 2011-04-07 | Murata Mfg Co Ltd | Signal line |
WO2011114432A1 (en) * | 2010-03-15 | 2011-09-22 | 富士通オプティカルコンポーネンツ株式会社 | Communication module, and communication device |
CN102883523A (en) * | 2012-09-27 | 2013-01-16 | 广东易事特电源股份有限公司 | PCB (printed circuit board) with copper foil current carrying capability reinforcing function |
WO2023199658A1 (en) * | 2022-04-11 | 2023-10-19 | 株式会社村田製作所 | Multilayer substrate |
-
1995
- 1995-06-05 JP JP16149295A patent/JPH08335754A/en active Pending
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000261215A (en) * | 1999-03-10 | 2000-09-22 | Nippon Telegr & Teleph Corp <Ntt> | Microwave and millimetric wave waveguide and integrated circuit using this waveguide |
US6558168B2 (en) | 2000-02-15 | 2003-05-06 | Agilent Technologies, Inc. | Probe card |
US6854980B2 (en) | 2000-02-15 | 2005-02-15 | Agilent Technologies, Inc. | Probe card |
JP2004228113A (en) * | 2003-01-20 | 2004-08-12 | Rion Co Ltd | Insulating structure using printed board |
US7214873B2 (en) | 2004-05-24 | 2007-05-08 | Agilent Technologies, Inc. | Electrical transmission line and a substrate |
JP2011071403A (en) * | 2009-09-28 | 2011-04-07 | Murata Mfg Co Ltd | Signal line |
WO2011114432A1 (en) * | 2010-03-15 | 2011-09-22 | 富士通オプティカルコンポーネンツ株式会社 | Communication module, and communication device |
CN102883523A (en) * | 2012-09-27 | 2013-01-16 | 广东易事特电源股份有限公司 | PCB (printed circuit board) with copper foil current carrying capability reinforcing function |
WO2023199658A1 (en) * | 2022-04-11 | 2023-10-19 | 株式会社村田製作所 | Multilayer substrate |
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