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JPH08316456A - Surge protecting element - Google Patents

Surge protecting element

Info

Publication number
JPH08316456A
JPH08316456A JP12243595A JP12243595A JPH08316456A JP H08316456 A JPH08316456 A JP H08316456A JP 12243595 A JP12243595 A JP 12243595A JP 12243595 A JP12243595 A JP 12243595A JP H08316456 A JPH08316456 A JP H08316456A
Authority
JP
Japan
Prior art keywords
junction
base layer
impurity concentration
conductivity type
conductivity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12243595A
Other languages
Japanese (ja)
Inventor
Yoshio Shimoda
義雄 下田
Hidetaka Sato
秀隆 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP12243595A priority Critical patent/JPH08316456A/en
Publication of JPH08316456A publication Critical patent/JPH08316456A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To independently design break-over voltage and to decrease junction capacitance by a method wherein the impurity concentration of the N-base layer in a through hole is made higher than the other part, and the P-N junction, having the impurity concentration grade larger than the other junction part, is provided directly under the through hole. CONSTITUTION: When surge voltage is applied to an electrode 1, junctions J2 and J2' are invertedly biased. As the junction J2' has the impurity concentration gradient larger than the junction J2 and it has low break-over voltage, avalanche currents Ia1 and Ia2 are allowed to flow through the junction J2. When the voltage drop, generated by the resistance of N-base, exceeds the built-in potential of a junction J1, the injection of carrier is started from a P-emitter, a forward direction thyristor is switched to on-state, and a large current ION is allowed to flow. To be more precise, as the break-over voltage is determined by the junction J2', the impurity concentration of the junction J2 can be made low, and the junction capacitance can be sharply decreased on the whole element.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、双方向性2端子サイリ
スタに係り、特に、雷等の高電圧サージから通信装置を
保護するのに好適なサージ防護素子に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bidirectional two-terminal thyristor, and more particularly to a surge protection element suitable for protecting a communication device from a high voltage surge such as lightning.

【0002】[0002]

【従来の技術】通信装置などのサージ防護用として多用
されている従来の双方向性2端子サイリスタは、図4
(a)に示す構造を有する。すなわち、P1N2P3N4で
構成される順方向サイリスタとP5N4P3N2で構成され
る逆方向サイリスタが、同一基板内で逆並列接続されて
いる。図4(b)は順方向サイリスタの電流−電圧特性
であり、VB0はブレークオーバ電圧、ISはスイッチン
グ電流、IHは保持電流を表す。素子の動作原理は次の
とおりである。電極1に正の電圧が加わると、接合J2
が逆バイアスされる。接合J2の両端の電圧がブレーク
オーバ電圧VB0を越えると、接合を通してアバランシェ
電流Ia1が流れる。Nベース(N2)の抵抗と電流Ia1
の積によって生じる電圧降下が接合J1のビルトイン電
圧を越えると、Pエミッタ(P1)から正孔の注入が始
まり、順方向サイリスタがオン状態にスイッチングし
て、オン電流IONが流れる。
2. Description of the Related Art A conventional bidirectional two-terminal thyristor, which is widely used for surge protection of communication devices, is shown in FIG.
It has a structure shown in (a). That is, a forward thyristor composed of P1N2P3N4 and a reverse thyristor composed of P5N4P3N2 are connected in anti-parallel in the same substrate. FIG. 4B shows the current-voltage characteristics of the forward thyristor, where VB0 is the breakover voltage, IS is the switching current, and IH is the holding current. The operating principle of the device is as follows. When a positive voltage is applied to the electrode 1, the junction J2
Is reverse biased. When the voltage across the junction J2 exceeds the breakover voltage VB0, an avalanche current Ia1 flows through the junction. N base (N2) resistance and current Ia1
When the voltage drop caused by the product of the two exceeds the built-in voltage of the junction J1, holes are injected from the P emitter (P1), the forward thyristor switches to the ON state, and the ON current ION flows.

【0003】以上述べた従来の双方向性2端子サイリス
タを、常時給電電流が流れている通信装置の雷サージ防
護用として使用する場合、雷サージに対してのみオン状
態(低抵抗状態)を維持し、給電電流に対してはオフ状
態となるようにする必要がある。すなわち、雷サージ電
流が流れ去った後は、遅滞なく素子がオフ状態に復帰し
なければならない。そのため、保持電流IHを大きく
(給電電流以上)設計する必要がある。保持電流IHは
PエミッタおよびNベースの拡散プロファイルによって
任意に設定できるが、素子のブレークオーバ電圧も拡散
プロファイルで規定される。その結果、両者の目標性能
を同時に満たすためには、設計の自由度が大幅に制限さ
れるという問題があった。さらに、従来の素子を高速デ
ィジタル通信装置のサージ防護用として適用する場合、
接合J2、J3における接合容量のため、通信品質の劣化
を招くことが問題となっている。特に、ブレークオーバ
電圧が低い素子は、N2、P3、N4の不純物濃度を高く
設定する必要があるため、必然的に接合容量も大きくな
るという問題があった。
When the above-described conventional bidirectional two-terminal thyristor is used for protection against lightning surge of a communication device in which a power supply current is constantly flowing, the ON state (low resistance state) is maintained only against lightning surge. However, it is necessary that the power supply current is turned off. That is, after the lightning surge current has flown away, the element must return to the off state without delay. Therefore, it is necessary to design the holding current IH to be large (greater than the feeding current). The holding current IH can be arbitrarily set by the diffusion profile of the P emitter and the N base, but the breakover voltage of the device is also defined by the diffusion profile. As a result, there is a problem in that the degree of freedom in design is significantly limited in order to satisfy both target performances at the same time. Furthermore, when applying conventional elements for surge protection of high-speed digital communication equipment,
There is a problem that communication quality is deteriorated due to the junction capacitance in the junctions J2 and J3. In particular, an element having a low breakover voltage has a problem that the junction capacitance inevitably becomes large because it is necessary to set the impurity concentrations of N2, P3 and N4 to be high.

【0004】また、図4(a)の従来の技術において、
P1の中央部の一部を除去してN2層を表面に露出させ、
電極1で短絡した構造(いわゆる短絡エミッタ孔)を採
用し、短絡エミッタ孔の数や大きさを調整することによ
って、保持電流の設計の自由度を大きくした技術もあ
る。しかしながら、短絡孔の不純物濃度はN2層と同じ
濃度であり、接合面J2は短絡エミッタ孔を持たない素
子と同様に、どこを取っても一様な不純物勾配であるた
め、依然として接合容量が大きくなるという問題は残さ
れている。さらに、短絡孔の大きさや数を増やすと、図
4(b)におけるIsが大きくなり、スイッチング損失
の増大やサージ耐量の低下を招くという問題があった。
Further, in the conventional technique of FIG.
Part of the central part of P1 is removed to expose the N2 layer on the surface,
There is also a technique in which the structure in which the electrodes 1 are short-circuited (so-called short-circuited emitter holes) is adopted and the degree of freedom in designing the holding current is increased by adjusting the number and size of the short-circuited emitter holes. However, the impurity concentration of the short-circuit hole is the same as that of the N2 layer, and the junction surface J2 has a uniform impurity gradient regardless of where the short-circuit emitter hole is provided, so that the junction capacitance is still large. The problem of becoming will remain. Furthermore, if the size and number of the short-circuit holes are increased, Is in FIG. 4 (b) is increased, which causes a problem that switching loss increases and surge withstand capability decreases.

【0005】[0005]

【発明が解決しようとする課題】以上述べたように、従
来の素子では、保持電流、ブレークオーバ電圧、静電容
量がそれぞれ一義的には決まらない関係にあり、設計の
自由度が制限されたり、場合によっては実現不可能とな
る問題があった。
As described above, in the conventional device, the holding current, the breakover voltage, and the capacitance are not uniquely determined, so that the degree of freedom in design is limited. , In some cases, there was a problem that could not be realized.

【0006】本発明の目的は、保持電流、ブレークオー
バ電圧を独立に設計でき、しかも接合容量の低減を可能
とした設計自由度の大きいサージ防護素子を提供するこ
とにある。
It is an object of the present invention to provide a surge protection element which has a large degree of freedom in design and which can independently design the holding current and the breakover voltage and can reduce the junction capacitance.

【0007】[0007]

【課題を解決するための手段】上記の目的を達成するた
め、本発明では、例えば第1導電形をP形、第2導電形
をN形としたとき(これとは逆に第1導電形をN形、第
2導電形をP形としてもよい)、P形半導体基板の両側
にNベース層を形成し、また該Nベース層の中心から偏
った位置にPエミッタ層を形成した構成を有し、かつ、
上記Pエミッタ層と上記Nベース層とが表面の電極に共
通に接する構造を備えるとともに、上記Pエミッタ層の
一部の1個所以上に上記Nベース層による貫通孔を有
し、その表面を上記電極で短絡した構造を備える双方向
性2端子サイリスタ構成の半導体素子において、例えば
図1にみられるように、上記貫通孔(CHと図示する部
分)内のNベース層(図中のN2層)の不純物濃度を他
の部分のNベース層(図中のN2層)のそれより高く
し、貫通孔の直下に他の接合(図中のJ2)部分よりも
不純物濃度勾配の大きいPN接合(図中のJ2′)を備え
ることとする。
To achieve the above object, in the present invention, for example, when the first conductivity type is P type and the second conductivity type is N type (conversely, the first conductivity type is May be N-type and the second conductivity type may be P-type), N-base layers are formed on both sides of the P-type semiconductor substrate, and a P-emitter layer is formed at a position deviated from the center of the N-base layer. Have and
The P emitter layer and the N base layer have a structure in which they are in common contact with the electrodes on the surface, and at least one part of the P emitter layer has a through hole formed by the N base layer. In a semiconductor device having a bidirectional two-terminal thyristor structure having a structure in which electrodes are short-circuited, for example, as shown in FIG. 1, an N base layer (N2 layer in the drawing) in the through hole (the portion shown as CH) Has a higher impurity concentration than that of the N base layer (N2 layer in the figure) of the other part, and has a larger impurity concentration gradient just below the through hole than the other junction (J2 in the figure) (see the figure). J2 ') inside.

【0008】あるいは、上記の目的を達成するためのも
う一つの本発明では、上記と同じ構造を備える双方向性
2端子サイリスタ構成の半導体素子において、例えば図
3にみられるように、電極(例えば電極1)の中心部か
らみてPエミッタ層(図中のP1層)の外側に位置する
Nベース層(図中のN2層)の一部の不純物濃度を他の
部分のそれより高くし、その直下に他の接合(図中の接
合J2)部分よりも不純物濃度勾配の大きいPN接合
(図中の接合J2′)を備えることとする。
Alternatively, according to another aspect of the present invention for achieving the above object, in a semiconductor device having a bidirectional two-terminal thyristor structure having the same structure as described above, for example, as shown in FIG. The impurity concentration of a part of the N base layer (N2 layer in the figure) located outside the P emitter layer (P1 layer in the figure) when viewed from the center of the electrode 1) is made higher than that of the other part, and A PN junction (junction J2 'in the figure) having an impurity concentration gradient larger than that of another junction (junction J2 in the figure) is provided immediately below.

【0009】[0009]

【作用】本発明で、Pエミッタ層を貫通する貫通孔内の
Nベース層部分の不純物濃度を他のNベース層部分より
も高くし、その直下に他の接合J2部分よりも不純物濃
度勾配の大きいPN接合J2′を形成することにより、
ブレークオーバ電圧が接合J2′で決まることになる。
したがって他の接合J2部分の不純物濃度勾配を小さく
できることになり、これにより素子全体の接合容量を大
幅に低減することが可能になる。また保持電流の大きさ
はP層の貫通孔の大きさや数の加減により独立的に決め
ることが可能になる。
According to the present invention, the impurity concentration of the N base layer portion in the through hole penetrating the P emitter layer is made higher than that of the other N base layer portions, and the impurity concentration gradient immediately below that is higher than that of the other junction J2 portion. By forming a large PN junction J2 ',
The breakover voltage will be determined by the junction J2 '.
Therefore, the impurity concentration gradient in the other junction J2 can be made small, which can significantly reduce the junction capacitance of the entire element. Further, the magnitude of the holding current can be independently determined by adjusting the size and number of the through holes in the P layer.

【0010】また、もう一つの本発明で、Pエミッタ層
の外側に位置するNベース層の一部の不純物濃度を他の
部分のそれより高くし、その直下に他の接合J2部分よ
りも不純物濃度勾配の大きいPN接合J2′を形成する
ことにより、Pエミッタ層の外側に位置する接合J2′
を介して流れるNベース層のアバランシェ電流(図3中
のIa1)の通路が長いことから後述において詳述するよ
うに、これによる電圧降下がP層からのキャリアの注入
を促すこととなり、素子を容易にオンにすることが可能
になる。保持電流やブレークオーバ電圧を独立的に決め
られるようになること、および静電容量を低減し得るよ
うになることは前記の本発明の場合と同じである。
According to another aspect of the present invention, the impurity concentration of a part of the N base layer located outside the P emitter layer is made higher than that of the other part, and the impurity concentration is directly below that of the other junction J2 part. By forming the PN junction J2 'having a large concentration gradient, the junction J2' located outside the P emitter layer is formed.
Since the path of the avalanche current (Ia1 in FIG. 3) of the N base layer that flows through the element is long, the voltage drop due to this causes the injection of carriers from the P layer, as will be described later in detail, and It can be easily turned on. The holding current and the breakover voltage can be independently determined, and the capacitance can be reduced as in the case of the present invention.

【0011】[0011]

【実施例】図1は本発明の第一の実施例の断面図であ
り、図2は図1における電極と絶縁物を除去したときの
平面図である。本素子はP型半導体基板であるP3の両
面にN形不純物を拡散したNベース(N2、N4)が形成
され、ついでP形不純物を拡散したPエミッタ(P1、
P5)が形成されている。Pエミッタの一部(CH)は
除去されてNベースが表面に露出し、PエミッタとNベ
ースが電極で短絡されている。ここで、短絡孔CHは他
のNベース領域よりも高い不純物濃度となるようにN形
不純物の拡散によって形成され、短絡孔の直下にPベー
ス(P3)との間で接合J2′が形成されている。すなわ
ち、接合J2′の濃度勾配は、接合J2の濃度勾配よりも
大きな値となる。接合J3′と接合J3の濃度勾配の関係
も同様であり、J3′の濃度勾配の方がJ3よりも大き
い。短絡孔の形状は、図2に示すように円形、四角形、
楕円形など任意の形状で形成され、また、個数は一個以
上で必要に応じて何個設けてもよい。本実施例によるP
NPNサージ防護素子の動作は、次のとおりである。電
極1に正のサージが印加されると、接合J2と接合J2′
が逆バイアスされる。ここで、接合J2′は接合J2に比
べて不純物濃度勾配が大きく、低いブレークオーバ電圧
を有するため、接合J2′を通してアバランシェ電流Ia
1およびIa2が流れる。このアバランシェ電流とNベー
スの抵抗によって生ずる電圧降下が、接合J1のビルト
インポテンシャルを越えると、Pエミッタからキャリア
の注入が始まり、順方向サイリスタがオン状態にスイッ
チングして大電流IONが流れる。その結果、図4(b)
と同じ電圧−電流特性が得られる。本素子の特徴は、ブ
レークオーバ電圧が接合J2′で決まるため、他の接合
部分すなわち接合J2の不純物濃度を低くすることがで
き、素子全体としての接合容量を大幅に低減できる。さ
らに、短絡孔の大きさおよび個数を加減することによ
り、ブレークオーバ電圧と独立に保持電流の大きさを決
めることができる。
1 is a cross-sectional view of a first embodiment of the present invention, and FIG. 2 is a plan view of FIG. 1 with the electrodes and insulators removed. In this device, N bases (N2, N4) in which N type impurities are diffused are formed on both sides of P3 which is a P type semiconductor substrate, and then P emitters (P1,
P5) is formed. A part (CH) of the P emitter is removed to expose the N base on the surface, and the P emitter and the N base are short-circuited by the electrode. Here, the short-circuit hole CH is formed by diffusion of N-type impurities so as to have a higher impurity concentration than other N-base regions, and a junction J2 'is formed immediately below the short-circuit hole with the P-base (P3). ing. That is, the concentration gradient of the junction J2 'becomes larger than the concentration gradient of the junction J2. The relationship between the concentration gradients of the junction J3 'and the junction J3 is similar, and the concentration gradient of J3' is larger than that of J3. As shown in FIG. 2, the shape of the short circuit hole is circular, square,
It is formed in any shape such as an ellipse, and the number is one or more, and any number may be provided as necessary. P according to this embodiment
The operation of the NPN surge protection element is as follows. When a positive surge is applied to electrode 1, junction J2 and junction J2 '
Is reverse biased. Since the junction J2 'has a larger impurity concentration gradient and a lower breakover voltage than the junction J2, the avalanche current Ia passes through the junction J2'.
1 and Ia2 flow. When the voltage drop caused by the avalanche current and the resistance of the N base exceeds the built-in potential of the junction J1, carrier injection starts from the P emitter, the forward thyristor switches to the ON state, and a large current ION flows. As a result, FIG. 4 (b)
The same voltage-current characteristic as that of is obtained. The feature of this device is that the breakover voltage is determined by the junction J2 ', so that the impurity concentration of the other junction portion, that is, the junction J2 can be lowered, and the junction capacitance of the entire device can be greatly reduced. Furthermore, by adjusting the size and number of short-circuit holes, the size of the holding current can be determined independently of the breakover voltage.

【0012】図3は本発明の第二の実施例であり、第一
の実施例と同様にPエミッタの一部に短絡孔CHが設け
られている。ただし、本実施例の短絡孔の不純物濃度分
布はNベース(N2)と同じ分布であり、その直下のP
N接合は特に大きな濃度勾配を持たない。本実施例で
は、素子のブレークオーバ電圧を決める高濃度勾配の接
合J2′をPエミッタの直下以外の場所に設けている。
すなわち、接合J2′は、電極(例えば電極1)の中心部
からみてPエミッタ層(図中のP1層)の外側に位置す
るNベース層(図中のN2層)の一部の不純物濃度を他
の部分のそれより高くし、その直下に他の接合(図中の
接合J2)よりも不純物濃度勾配の大きいPN接合とし
て形成している。接合J3′についても同様に形成され
る。以上のような構成にすることにより、アバランシェ
電流Ia1がPエミッタの直下のNベース層を長い距離流
れることになり、Pエミッタからのキャリア注入を引き
起こすためのビルトイン電圧を容易に確保することがで
きる。その結果、図4(b)に示したスイッチング電流
Isの増大を招くことなく、素子をオン状態にスイッチ
ングすることができ、素子内での消費エネルギーを低減
することができる。もちろん、第一の実施例の場合と同
様に、保持電流の大きさとブレークオーバ電圧とを独立
に設計することができ、かつ静電容量の低減を図ること
ができる。
FIG. 3 shows a second embodiment of the present invention in which a short-circuit hole CH is provided in a part of the P emitter as in the first embodiment. However, the impurity concentration distribution of the short-circuit hole of this embodiment is the same as that of the N base (N2), and P immediately below the N base (N2).
N-junction does not have a particularly large concentration gradient. In this embodiment, a high concentration gradient junction J2 'that determines the breakover voltage of the device is provided at a position other than directly under the P emitter.
That is, the junction J2 'has a part of the impurity concentration of the N base layer (N2 layer in the figure) located outside the P emitter layer (P1 layer in the figure) when viewed from the center of the electrode (for example, the electrode 1). It is formed higher than that of the other portion and is formed as a PN junction immediately below that having a larger impurity concentration gradient than the other junction (junction J2 in the figure). The joint J3 'is similarly formed. With the above configuration, the avalanche current Ia1 flows for a long distance in the N base layer immediately below the P emitter, and the built-in voltage for causing carrier injection from the P emitter can be easily secured. . As a result, the element can be switched to the ON state without increasing the switching current Is shown in FIG. 4B, and the energy consumption in the element can be reduced. Of course, as in the case of the first embodiment, the magnitude of the holding current and the breakover voltage can be designed independently, and the capacitance can be reduced.

【0013】以上の実施例においては、PNPNサージ
防護素子について述べたが、NPNPサージ防護素子に
ついても導電形が逆になるだけで本実施例と同様に形成
できることはいうまでもない。
Although the PNPN surge protection device has been described in the above embodiments, it goes without saying that the NPNP surge protection device can be formed in the same manner as this embodiment by only reversing the conductivity type.

【0014】[0014]

【発明の効果】以上説明したように、本発明によるサー
ジ防護素子は例えばPエミッタの一部にNベースが表面
に現れた短絡孔を設けると共に、逆バイアスの加わるP
N接合部の一部に他の部分よりも濃度勾配の大きいPN
接合部を設けているため、保持電流の大きさとブレーク
オーバ電圧とを独立に設計することができ、しかも接合
容量の小さい素子を実現することができる。
As described above, in the surge protection element according to the present invention, for example, a short-circuit hole in which the N base appears on the surface is provided in a part of the P emitter, and a reverse bias is applied to the P element.
PN with a larger concentration gradient in part of the N junction than in other parts
Since the junction is provided, the magnitude of the holding current and the breakover voltage can be designed independently, and an element having a small junction capacitance can be realized.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第一の実施例の断面図。FIG. 1 is a sectional view of a first embodiment of the present invention.

【図2】本発明の第一の実施例の平面図。FIG. 2 is a plan view of the first embodiment of the present invention.

【図3】本発明の第二の実施例の断面図。FIG. 3 is a sectional view of a second embodiment of the present invention.

【図4】従来のPNPNサージ防護素子の断面図とその
素子の電圧−電流特性。
FIG. 4 is a sectional view of a conventional PNPN surge protection device and a voltage-current characteristic of the device.

【符号の説明】[Explanation of symbols]

P1、P5…Pエミッタ N2、N4…N
ベース P3…Pベース J1、J2、J3、J2′、J3′…接合 CH…
短絡孔(貫通孔) Ia1、Ia2…アバランシェ電流 VB0…ブレークオーバ電圧 IS…
スイッチング電流 IH…保持電流
P1, P5 ... P Emitter N2, N4 ... N
Base P3 ... P Base J1, J2, J3, J2 ', J3' ... Join CH ...
Short-circuit holes (through holes) Ia1, Ia2 ... Avalanche current VB0 ... Breakover voltage IS ...
Switching current IH ... holding current

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】第1導電形半導体基板の両側に第2導電形
のベース層を形成し、また該第2導電形のベース層の中
心から偏った位置に第1導電形のエミッタ層を形成した
構成を有し、かつ、該第1導電形のエミッタ層と上記第
2導電形のベース層とが表面の電極に共通に接する構造
を備えるとともに、 上記第1導電形のエミッタ層の一部の1個所以上に上記
第2導電形のベース層による貫通孔を有し、その表面を
上記電極で短絡した構造を備える双方向性2端子サイリ
スタ構成の半導体素子において、 上記貫通孔内の第2導電形のベース層の不純物濃度を他
の部分の第2導電形のベース層のそれより高くし、貫通
孔の直下に他の接合部分よりも不純物濃度勾配の大きい
接合を備えることを特徴とするサージ防護素子。
1. A base layer of the second conductivity type is formed on both sides of a semiconductor substrate of the first conductivity type, and an emitter layer of the first conductivity type is formed at a position deviated from the center of the base layer of the second conductivity type. And a structure in which the first-conductivity-type emitter layer and the second-conductivity-type base layer are in common contact with a surface electrode, and a part of the first-conductivity-type emitter layer In a semiconductor element having a bidirectional two-terminal thyristor structure having a through-hole formed by the second conductivity type base layer at one or more positions of the second conductive type base layer, the surface of which is short-circuited by the electrode. The impurity concentration of the conductivity type base layer is made higher than that of the second conductivity type base layer of the other portion, and a junction having an impurity concentration gradient larger than that of the other junction portion is provided immediately below the through hole. Surge protection element.
【請求項2】第1導電形半導体基板の両側に第2導電形
のベース層を形成し、また該第2導電形のベース層の中
心から偏った位置に第1導電形のエミッタ層を形成した
構成を有し、かつ、該第1導電形のエミッタ層と上記第
2導電形のベース層とが表面の電極に共通に接する構造
を備えるとともに、 上記第1導電形のエミッタ層の一部の1個所以上に上記
第2導電形のベース層による貫通孔を有し、その表面を
上記電極で短絡した構造を備える双方向性2端子サイリ
スタ構成の半導体素子において、 上記電極の中心部からみて上記第1導電形のエミッタ層
の外側に位置する第2導電形のベース層の一部の不純物
濃度を他の部分のそれより高くし、その直下に他の接合
部分よりも不純物濃度勾配の大きい接合を備えることを
特徴とするサージ防護素子。
2. A second conductivity type base layer is formed on both sides of the first conductivity type semiconductor substrate, and a first conductivity type emitter layer is formed at a position deviated from the center of the second conductivity type base layer. And a structure in which the first-conductivity-type emitter layer and the second-conductivity-type base layer are in common contact with a surface electrode, and a part of the first-conductivity-type emitter layer In a semiconductor device having a bidirectional two-terminal thyristor structure having a through hole formed by the second conductivity type base layer at one or more positions thereof and having a surface short-circuited by the electrode, viewed from the center of the electrode. The impurity concentration of a part of the second conductivity type base layer located outside the first conductivity type emitter layer is set higher than that of the other part, and the impurity concentration gradient is larger immediately below it than the other junction part. Surge characterized by having a junction Mamoru element.
JP12243595A 1995-05-22 1995-05-22 Surge protecting element Pending JPH08316456A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12243595A JPH08316456A (en) 1995-05-22 1995-05-22 Surge protecting element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12243595A JPH08316456A (en) 1995-05-22 1995-05-22 Surge protecting element

Publications (1)

Publication Number Publication Date
JPH08316456A true JPH08316456A (en) 1996-11-29

Family

ID=14835784

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12243595A Pending JPH08316456A (en) 1995-05-22 1995-05-22 Surge protecting element

Country Status (1)

Country Link
JP (1) JPH08316456A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003051592A (en) * 2001-08-08 2003-02-21 Shindengen Electric Mfg Co Ltd Bi-directional two-terminal thyristor
US7859010B2 (en) 2007-01-15 2010-12-28 Kabushiki Kaisha Toshiba Bi-directional semiconductor ESD protection device
JP2013534051A (en) * 2010-06-21 2013-08-29 アーベーベー・テヒノロギー・アーゲー Phase-controlled thyristor with improved pattern of local emitter short-circuited dots
CN113270398A (en) * 2021-05-17 2021-08-17 派克微电子(深圳)有限公司 Two-way bidirectional surge protector and manufacturing method thereof

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003051592A (en) * 2001-08-08 2003-02-21 Shindengen Electric Mfg Co Ltd Bi-directional two-terminal thyristor
US7859010B2 (en) 2007-01-15 2010-12-28 Kabushiki Kaisha Toshiba Bi-directional semiconductor ESD protection device
JP2013534051A (en) * 2010-06-21 2013-08-29 アーベーベー・テヒノロギー・アーゲー Phase-controlled thyristor with improved pattern of local emitter short-circuited dots
CN113270398A (en) * 2021-05-17 2021-08-17 派克微电子(深圳)有限公司 Two-way bidirectional surge protector and manufacturing method thereof

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