JPH08288504A - Method of semiconductor device - Google Patents

Abstract

PURPOSE: To provide the title method of manufacturing semiconductor device capable of avoiding the production of short channel effect. CONSTITUTION: After the formation of a gate electrode 13 on a semiconductor substrate 11 through the intermediary of a gate insulating is film 12, the first insulating film 15 is formed on the semiconductor substrate 11 in the state as if covering the gate electrode 13. Next, the first impurities 16 for comprising the low concentration region of a source diffused layer and a drain diffused layer is introduced in the surface side of the semiconductor substrate 11 by ion implanting downward from the first insulating film 15. Through these procedures, the introduction interval of the first impurities 16, i.e., the interval W between the low concentration region 21a of the surce diffused layer 21 and the low concentration region 22a of the drain diffused layer 22 can be widened by the film thickness t of the first insulating film 16 comparing with the case of ion implanting from the first impurities 16 without forming the first insulating film 15.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a MIS type or MO type.
The present invention relates to a method for manufacturing a semiconductor device used as an S-type transistor.

[0002]

2. Description of the Related Art A MIS type or MOS type transistor in which a gate electrode made of a metal or another conductor is arranged on a semiconductor substrate having source and drain diffusion layers formed, for example, via a gate insulating film made of an oxide film. The semiconductor device such as is manufactured as follows, for example. First, as shown in FIG. 2A, after a gate electrode 33 is formed on a semiconductor substrate 31 with a gate insulating film 32 interposed therebetween, a gate electrode 33 is used as a mask to perform ion implantation on the surface of the semiconductor substrate 31. A first conductivity type first impurity 34 is introduced. Further, the second impurity 35 of the second conductivity type for forming pocket diffusion is introduced into the surface side of the semiconductor substrate 31 including the lower portion of the gate electrode 33 by oblique ion implantation using the gate electrode 33 as a mask. Next, as shown in FIG. 2B, sidewalls 36 are formed on the sidewalls of the gate electrode 33 and the gate insulating film 32. Next, as shown in FIG. 2C, an oxide film 37 is formed on the semiconductor substrate 31, and then a first electrode is formed on the front surface side of the semiconductor substrate 31 by ion implantation using the gate electrode 33 and the sidewall 36 as a mask. A conductive third impurity 38 is introduced. After that, Figure 2
As shown in (4), the first conductivity type source diffusion layer having the low concentration regions 39a and 40a formed by diffusing the first impurity 34 by performing the activation heat treatment on the impurities introduced into the semiconductor substrate 31. 39 and the drain diffusion layer 40, and the second
Second conductivity type pocket diffusion layer 4 formed by diffusing impurities
And 1 are formed on the front surface side of the semiconductor substrate 31. As described above, the MIS type or MOS type transistor is formed.

[0003]

However, the above-described method for manufacturing a semiconductor device has the following problems. That is, when the gate length is reduced due to the progress of miniaturization of the semiconductor device, the distance w between the source and the drain under the gate electrode is also shortened. On the other hand, even if the gate length is shortened,
Since the depth of the diffusion layer formed by the ion implantation and the subsequent activation heat treatment does not change, a short channel effect is likely to occur in the MIS type or MOS type transistor as the semiconductor device is miniaturized. Further, when the gate length is miniaturized to 0.25 μm, even in the surface channel type N channel transistor, which has been said to be relatively hard to generate the short channel effect, the pocket channel is formed to form the short channel effect. The need to prevent the occurrence of. Further, in a buried channel type P-channel transistor which is apt to cause a short channel effect, it becomes more and more difficult to prevent the short channel effect even if a pocket diffusion layer is formed.

Therefore, an object of the present invention is to provide a method of manufacturing a semiconductor device capable of suppressing the occurrence of a short channel effect without changing the gate length.

[0005]

According to the method of manufacturing a semiconductor device of the present invention for achieving the above object, a gate electrode is formed on a semiconductor substrate via a gate insulating film, and then the gate electrode is covered. A first insulating film is formed on the semiconductor substrate. Then, ion implantation is performed from above the first insulating film to introduce a first impurity for forming the low concentration regions of the source diffusion layer and the drain diffusion layer into the front surface side of the semiconductor substrate.

[0006]

In the method of manufacturing a semiconductor device described above, the low concentration regions of the source diffusion layer and the drain diffusion layer are formed by performing ion implantation from the first insulating film formed on the semiconductor substrate while covering the gate electrode. The first impurity for introducing is introduced into the front surface side of the semiconductor substrate. Therefore, in the ion implantation, the gate electrode and the first insulating film portion formed on the side wall thereof serve as a mask, and the first impurity is introduced into the semiconductor substrate portion outside these masks. Therefore, as compared with the case where the first impurity is ion-implanted without forming the first insulating film, the introduction interval of the first impurity by the thickness of the first insulating film, that is, the source diffusion layer and the drain. The area between the low concentration regions of the diffusion layer becomes wider.

[0007]

EXAMPLES A method for manufacturing a semiconductor device according to the present invention will be described below.
A detailed description will be given based on an example applied to a method for manufacturing an OS transistor. 1 (1) to 1 (6) are sectional process drawings showing an embodiment, and an example of the manufacturing method will be described with reference to these drawings.

First, in a first step shown in FIG. 1A, a gate insulating film 12 made of a silicon oxide film is formed on an upper surface of a semiconductor substrate 11 made of, for example, silicon. afterwards,
The gate electrode 13 is formed on the upper surface of the gate insulating film 12. The gate electrode 13 is formed by etching an N ⁺ polysilicon film formed on the gate insulating film 12 and a silicide film formed on the polysilicon film, and has a gate length of 0.25 μm. Gate height 0.20
It is formed to a μm. Then, the first conductivity type impurity 14 is introduced into the surface side of the semiconductor substrate 11 including the portion below the gate electrode 13 by oblique ion implantation using the gate electrode 13 as a mask. Here, the first conductivity type is N-type, arsenic is used as an impurity, and implantation energy of 200 keV is applied to 1 × 10.
The dose amount of ¹³ / cm ² is introduced.

Next, in a second step shown in FIG. 1B, a first insulating film 15 is formed on the semiconductor substrate 11 while covering the gate electrode 13. This first insulating film 15 is a so-called AP-CVD (Atomospheric) chemical vapor deposition method under normal pressure.
A silicon oxide film formed by the Pressuer-Chemical Vapor Deposition method or a low pressure chemical vapor deposition method called a LP-CVD method (Low Pressure-Chemical Vapor Deposition method).
of a silicon nitride film or a silicon oxide film formed by the osition method, and is formed to a film thickness of about 50 nm. The thickness t of the first insulating film 15 is set to a value such that the first insulating film 15 portion formed on the side wall of the gate electrode 13 serves as a mask during ion implantation, and the other portions allow ions to pass therethrough. To do.

After that, by ion implantation, the first impurity 16 of the second conductivity type is removed from the top of the first insulating film 15 by the semiconductor substrate 1.
1 is introduced on the surface side. Thereby, the gate electrode 13
Also, the first insulating film 15 portions formed on the sidewalls thereof are used as a mask, and the first impurities 16 are introduced into the semiconductor substrate 11 portions outside these masks. Here, the second conductivity type is P
Type, and 25 keV with boron difluoride as the first impurity
With an implantation energy of 1 × 10 ¹³ / cm ² .

Next, in the third step shown in FIG. 1 (3),
The second insulating film 17 is formed on the first insulating film 15. The second insulating film 17 is made of, for example, a silicon oxide film formed by the AP-CVD method or a silicon nitride film or a silicon oxide film formed by the LP-CVD method, and has a film thickness of 10
The film is formed to a thickness of about 0 nm. In consideration of the film quality of the first insulating film 15 and the material of the gate electrode 13, the film quality and the film forming method of the second insulating film 17 are, for example, a silicide film forming the gate electrode 13 formed the second insulating film 17. Make sure it does not come off in later steps.

Thereafter, in the fourth step shown in FIG. 1 (4),
By etching back the second insulating film 17 and the first insulating film 15, the sidewalls 18 including the first insulating film 15 and the second insulating film 17 are formed on the sidewalls of the gate electrode 13 and the gate insulating film 12.

Next, in a fifth step shown in FIG. 1 (5), an oxide film 19 is formed on the semiconductor substrate 11 in a state of covering the gate electrode 13 and the sidewall 18. This oxide film 19
Is a film for preventing the surface of the semiconductor substrate 11 from being damaged by the next ion implantation. After that, the second impurity 2 of the second conductivity type is removed from above the oxide film 19.
0 is introduced to the front surface side of the semiconductor substrate 11. Here, boron difluoride is introduced as the second impurity 20 with an implantation energy of 30 keV and a dose amount of 3 × 10 ¹⁵ pieces / cm ² .

Next, in the sixth step shown in FIG. 1 (6),
Impurities 14 and first impurities 1 introduced into the semiconductor substrate 11.
A heat treatment for activating 6 and the second impurity 20 is performed. As a result, the P-type first impurity 1 is formed on the front surface side of the semiconductor substrate 11.
6 and the source diffusion layer 2 formed by diffusing the second impurity 20.
1 and the drain diffusion layer 22 and the pocket diffusion layer 23 formed by diffusing the N-type impurity 14 are formed. here,
Source diffusion layer 21 and drain diffusion layer 22 to be formed
Are low-concentration regions 21a and 22 having a low impurity concentration in the portion where the first impurities 16 are diffused below the sidewalls 18.
a and the other regions are the low-concentration regions 21a, 22
This is a so-called LDD (Lightly Dopet Dolein) structure in which the high-concentration regions 21b and 22b having a higher impurity concentration than a are formed. Since the impurities are diffused in the semiconductor substrate 11 by this activation heat treatment, the formation range of each diffusion layer is actually wider than the introduction range of each impurity by ion implantation.

As described above, the buried channel type P channel MOS transistor having the LDD structure is formed as the semiconductor device 1. In the method of manufacturing a semiconductor device described above, the ion implantation of the second step shown in FIG.
Gate electrode 13 and first insulating film 1 formed on the side wall thereof
The first impurity 16 is introduced into the semiconductor substrate 11 portion outside the five portions. From this, as compared with the semiconductor device formed by introducing the first impurity 16 by ion implantation without forming the first insulating film 15, the film thickness of the first insulating film 15 (5
The introduction interval of the first impurity 16 is widened by 0 nm).
Therefore, the low-concentration region 2 of the source diffusion layer 21 and the drain diffusion layer 22 formed by the impurity activation heat treatment
The distance W between 1a and 22a is about 50 nm + 50 nm = 100
The width becomes about nm, and the effective channel length is expanded, so that the short channel effect is hard to occur.

Further, in the above embodiment, the sidewall 18 on the side wall of the gate electrode 13 is formed by etching back the first insulating film 15 and the second insulating film 17 formed on the upper surface thereof. It is only necessary to add the step of forming the first insulating film 15 to the conventional step, and the semiconductor device 1 can be manufactured without complicating the step.

In the above embodiment, the buried channel type P is used.
The description has been given taking as an example the case where the channel MOS transistor is manufactured as a semiconductor device. However, the present invention is not limited to this, and a surface channel type N-channel MOS transistor or other MOS type or MI is used.
It can be applied to an S-type transistor, and the same effect as that of the above embodiment can be obtained. Particularly, in the surface channel type N channel MOS transistor, the gate length is 0.
When the thickness is about 25 μm, it becomes possible to prevent the short channel effect from occurring without forming a pocket diffusion layer.

[0018]

As described above, according to the method of manufacturing the semiconductor device of the present invention, the source diffusion layer and the drain diffusion layer are formed from the first insulating film formed on the semiconductor substrate while covering the gate electrode. By ion-implanting the first impurity forming the low-concentration region, the distance between the low-concentration region of the source diffusion layer and the low-concentration region of the drain diffusion layer is formed wider by the film thickness of the first insulating film. Will be possible. For this reason,
Compared with the semiconductor device formed by introducing the first impurity portion without forming the first insulating film, the effective channel length can be increased without changing the gate length, and the short channel effect can be prevented. It becomes possible to prevent.

[Brief description of drawings]

FIG. 1 is a sectional process drawing showing an example.

FIG. 2 is a sectional process diagram showing a conventional example.

[Explanation of symbols]

 11 semiconductor substrate 12 gate insulating film 13 gate electrode 15 first insulating film 16 first impurity 17 second insulating film 18 sidewall 20 second impurity 21 source diffusion layer 21a, 22a low concentration region 21b, 22b high concentration region 22 drain diffusion layer

Claims (2)

[Claims] 1. A low concentration region of a source diffusion layer and a low concentration of a drain diffusion layer are formed on a front surface side of a semiconductor substrate by ion implantation using a gate electrode formed on a semiconductor substrate with a gate insulating film as a mask. The step of introducing a first impurity for forming a concentration region, the side wall of the gate electrode and the gate insulating film, and a side wall of the gate electrode and ion implantation using the side wall and the gate electrode as a mask. A step of introducing a second impurity for forming a high-concentration region of the source diffusion layer and a high-concentration region of the drain diffusion layer on the front surface side of the semiconductor device. Before the process of
Performing a step of forming a first insulating film on the semiconductor substrate in a state of covering the gate electrode, and performing ion implantation from the first insulating film in the step of introducing a first impurity into the semiconductor substrate. A method for manufacturing a characteristic semiconductor device. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the sidewall is formed by etching back the first insulating film and a second insulating film formed on the first insulating film. A method of manufacturing a semiconductor device, comprising: