JPH08204189A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE: To prevent short channel effect by introducing impurities in a region turning to a source and drain region, by obliquely implanting ions in order that impurities may not be implanted in the vicinity of a gate electrode. CONSTITUTION: After a gate electrode 4 is formed, one side of a region where a source and drain is formed is covered with a mask 8, and ions are implanted from the direction inclined to the normal of a semiconductor substrate 1 by an angle θ, in order that a region (what is called a shadow part) in which impurities are not implanted may be formed in the vicinity of the gate electrode 4. After the mask 8 is eliminated, the other side of the region where the source and drain is formed is covered with a mask 8', and ions are implanted from the direction inclined to the normal of the semiconductor substrate 1 by an angle -θ. Hence a second shadow part is formed in the vicinity of the gate electrode 4. A source/drain region 5 is formed by heat-treating the semiconductor substrate 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a MOS transistor capable of preventing a short channel effect.

[0002]

2. Description of the Related Art A MOS transistor has the features that it has a simpler structure and fewer manufacturing steps than a bipolar transistor, so that high integration is easy and the cost per function is low. A conventional method of manufacturing a MOS transistor will be described with reference to FIG. First, as shown in FIG. 3A, an element isolation oxide film 2 and a gate oxide film 3 are formed on a semiconductor substrate 1.
To form. Then, as shown in FIG.
After depositing a polycrystalline silicon film by a method or the like, the gate electrode 4 is formed by etching. And the gate electrode 4
Is used as a mask to perform ion implantation. Then, the same figure (c)
As shown in FIG. 5, heat treatment is performed to form the source / drain regions 5. After that, an interlayer insulating film 6 such as a PSG film is formed so as to cover the semiconductor substrate 1 by the CVD method, a contact hole is opened in the interlayer insulating film 6, and a conductive material such as Al is deposited to electrically connect with the source / drain regions 5. The electrode 7 that is electrically connected is formed. As described above, the conventional MO
Manufactured S-transistor.

[0003]

However, in the manufacturing method as shown in FIG. 3, since the source / drain regions 5 are formed by ion implantation using the gate electrode 4 as a mask and heat treatment, the MOS transistor of the MOS transistor is formed. In the final structure, the impurities in the source / drain regions 5 are diffused in the lateral direction, and the channel L has a width (= gate length) W of the gate electrode 4.
It had a shorter structure.

Particularly, in the MOS transistor in which the gate electrode is formed according to the minimum rule, the channel L is also very short, and the following problems occur. That is,
A potential barrier is created between the source and the channel region when a voltage is applied to the gate electrode so that a channel is not formed on the surface of the semiconductor substrate. However, when the channel L becomes very short, the depletion layer of the drain becomes the source. It extends near the potential barrier in the vicinity, and the height of the potential barrier becomes low due to the increase of the drain voltage, and even if the channel region is not formed,
There was a so-called short channel effect in which current started to flow when carriers were injected from the source.

In view of the above problems, the present invention provides a method of manufacturing a semiconductor device capable of preventing the short channel effect.

[0006]

The present invention has the following constitution in order to achieve the above object. That is, a method of manufacturing a semiconductor device according to the present invention includes a step of forming a gate oxide film on the surface of a semiconductor substrate, a step of forming a gate electrode on the gate oxide film, and one of a region where a source and drain region is formed. After the side is covered with a mask, the step of implanting ions from a diagonal direction on the one side of the mask, and the step of removing the mask and covering the region on the other side with a mask, then the ions from the diagonal side of the other side of the mask The method is characterized by including a step of implanting and a step of performing heat treatment to form source and drain regions.

[0007]

According to the method of manufacturing a semiconductor device of the present invention, the impurity is implanted into the source and drain regions by oblique ion implantation so that the impurity is not implanted in the vicinity of the gate electrode. Even if the source and drain regions are laterally diffused by applying the above, since the channel can be made to have almost the same length as the width of the gate electrode 4, the short channel effect can be effectively prevented.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described below with reference to FIG. Incidentally, the same reference numerals are given to the same or corresponding portions as in the conventional case. In the manufacturing method of the present invention, first, FIG.
As shown in FIG. 3, after the element isolation oxide film 2 is formed on the semiconductor substrate 1, the gate oxide film 3 having a film thickness of 30Å to 200Å is formed in the element formation region. Then, as shown in FIG. 2B, after depositing a polycrystalline silicon film by a CVD method or the like,
The gate electrode 4 having a gate length of about 0.3 μm is formed by etching. Then, one side of the region where the source and drain regions are formed is covered with a mask 8 such as a resist, so that a region (so-called shadow) where impurities are not implanted is formed in the vicinity of the gate electrode 4. Ion implantation is performed from an oblique direction that is tilted by θ with respect to the normal direction of.

Next, as shown in FIG. 1C, after the mask 8 is removed, the other side of the region where the source and drain regions are formed is covered with a mask 8 ', and the direction normal to the semiconductor substrate 1 is set. Then, ion implantation is performed from an oblique direction inclined by −θ, and a second shadow portion is formed in the vicinity of the gate electrode 4 as in the step of FIG. Then, as shown in FIG. 3D, the semiconductor substrate 1 is heat-treated at 600 ° C. to 1000 ° C. to form the source / drain regions 5. After that, the PSG is formed by the CVD method so as to cover the semiconductor substrate 1.
An interlayer insulating film 6 such as a film is formed, a contact hole is opened in the interlayer insulating film 6, and a conductive material such as Al is deposited to form an electrode 7 electrically connected to the source / drain region 5.

In the above-described MOS transistor manufacturing method, as shown in FIG. 2, since the ion implantation is performed from an oblique direction inclined by θ with respect to the normal direction of the semiconductor substrate 1, the gate electrode 4 is formed. In a region located at a distance L ′ from the edge, a region (so-called shadow portion) where impurities are not implanted is formed. Even if the source / drain regions 5 are laterally diffused by heat treatment in the next step, they are not diffused beyond the end of the gate electrode 4, so that the channel and the gate length are set to be almost the same length. can do.

[0011]

As described above, according to the method of manufacturing a semiconductor device of the present invention, the impurity is implanted into the regions to be the source and drain regions by obliquely ion-implanting so that the impurities are not implanted in the vicinity of the gate electrode. Since I am driving in,
Even if the source and drain regions are laterally diffused by heat treatment thereafter, the channel can be made to have almost the same length as the gate length, so that the short channel effect can be effectively prevented.

[Brief description of drawings]

FIG. 1 is an explanatory view showing a manufacturing method of the present invention.

FIG. 2 is an explanatory view showing the operation of the present invention.

FIG. 3 is an explanatory view showing a conventional manufacturing method.

[Explanation of symbols]

 1 Semiconductor Substrate 2 Element Isolation Oxide Film 3 Gate Oxide Film 4 Gate Electrode 5 Source / Drain Region 6 Interlayer Insulation Film 7 Electrode 8 Resist

Claims (1)

[Claims] 1. A step of forming a gate oxide film on a surface of a semiconductor substrate, a step of forming a gate electrode on the gate oxide film, and after covering one side of a region where source and drain regions are formed with a mask. A step of implanting ions from an oblique direction on the one mask side, a step of removing the mask, covering the other area with a mask, and then implanting ions from an oblique direction on the other mask side, and a heat treatment. And forming source and drain regions.