JPH08191102A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PURPOSE: To lower the contact resistance of a polycide-structured electrode wiring layer for avoiding the film release and deterioration in oxidation in heat treatment by a method wherein a metallic silicide film as an upper layer and a polycrystalline silicon film as a lower layer holding a silicon nitride film are provided as well as a conductive silicon film in contact with the metallic silicide film is also provided. CONSTITUTION: A silicon nitride film 6 is formed on the surface of a polycrystalline silicon film 5 and then an impurity added amorphous silicon film 9 is formed on the whole surface of the silicon using nitride film 6 so as to form a WSi film 7. Next, using a resist pattern 11 formed on the whole surface of the WSi film 7 as a mask, the underneath WSi film 7, the amorphous silicon film 9, the silicon nitride film 6 and the polycrystalline silicon film 5 are successively etched away to form an electrode wiring layer and then the photoresist film 11 is removed. Through these procedures, the electrode wiring layer is composed of the WSi film 7/amorphous silicon film 9/silicon nitride film 6/polycrystalline silicon film 5, i.e., the amorphous silicon film 9 is formed beneath the WSi film 7.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device,
In particular, it relates to a wiring layer having a polycide structure.

[0002]

2. Description of the Related Art As LSIs are highly integrated, wiring materials having low resistance and high reliability are required. The polycide film composed of the metal silicide film / polycrystalline silicon film has a low resistance and a heat resistance equivalent to that of the polycrystalline silicon film, and is therefore widely used as a wiring material.
In this polycide film, impurities in the polycrystalline silicon film diffuse into the metal silicide film by heat treatment after formation,
There is a problem that the impurity concentration in the polycrystalline silicon film decreases and the contact resistance increases. In order to improve this problem, a wiring structure has recently been developed in which a thin silicon nitride film is sandwiched between polycide films, that is, between a polycrystalline silicon film and a metal silicide film.

FIG. 5 is a sectional view showing the structure of a conventional semiconductor device disclosed in, for example, Japanese Patent Laid-Open No. 3-166732. In the figure, 1 is a semiconductor substrate made of silicon single crystal or the like (hereinafter referred to as a substrate), 2 is an impurity diffusion layer as a conductive layer formed on the substrate 1, and 3 is an insulating film formed on the substrate 1. Silicon oxide film, 4 is a contact hole as a connection hole provided in the silicon oxide film 3, 5 is a polycrystalline silicon film, 6 is a silicon nitride film thinly formed on the polycrystalline silicon film 5, and 7 is silicon nitride. A tungsten silicide (WSi) film as a metal silicide film formed on the film 6 is an electrode wiring layer 8 composed of three layers of a polycrystalline silicon film 5, a silicon nitride film 6 and a WSi film 7, and a contact hole 4 Is formed to be connected to the impurity diffusion layer 2 via.

The conventional semiconductor device is configured as described above, and includes the polycrystalline silicon film 5 having a polycide structure and the WSi.
By providing the silicon nitride film 6 with the film 7, it is possible to prevent impurities in the polycrystalline silicon film 5 from diffusing into the WSi film 7 due to heat treatment, and prevent an increase in contact resistance of the electrode wiring layer 8. It is a thing.

[0005]

However, since the electrode wiring layer 8 as described above is provided with the silicon nitride film 6 between the polycrystalline silicon film 5 having the polycide structure and the WSi film 7, it is formed by heat treatment after formation. However, the WSi film 7 may be peeled off due to the difference in stress of each film. Also WS
There is also a problem that Si in the i film 7 is oxidized by heat treatment and the film quality of the WSi film 7 deteriorates.

The present invention has been made in order to solve the above-mentioned problems, and reduces the contact resistance of the electrode wiring layer of the polycide structure and, at the time of heat treatment, peels off the upper metal silicide film due to stress and An object of the present invention is to obtain a semiconductor device having an electrode wiring layer having low resistance and high reliability by preventing deterioration of film quality due to oxidation.

[0007]

In a semiconductor device according to a first aspect of the present invention, an electrode wiring layer is a multi-layer having a metal silicide film as an upper layer and a polycrystalline silicon film as a lower layer with a silicon nitride film interposed therebetween. The structure has a conductive silicon film which is in contact with the metal silicide film and which is located above or below the metal silicide film.

A semiconductor device according to claim 2 of the present invention is
The conductive silicon film is composed of an amorphous silicon film or a polycrystalline silicon film.

According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device in which an electrode wiring layer is patterned by etching using a pattern of a silicon oxide film formed thereon as a mask.

[0010]

The semiconductor device according to the present invention has a polycide structure in which the electrode wiring layer is composed of a metal silicide film / silicon nitride film / polycrystalline silicon film having a low contact resistance, and the upper or lower layer is in contact with the metal silicide film. It has a conductive silicon film. Therefore, during the heat treatment after forming the electrode wiring layer, Si is supplied from the conductive silicon film to the metal silicide film, so that the stress of the metal silicide film is relieved and the metal silicide film is prevented from peeling. Further, even if Si in the metal silicide film is oxidized during the heat treatment, by supplying Si from the conductive silicon film,
Prevents rapid oxidation of the metal silicide film.

In the semiconductor device according to the present invention, since the conductive silicon film is composed of the amorphous silicon film or the polycrystalline silicon film, the above effects can be realized easily and surely.

A method of manufacturing a semiconductor device according to the present invention is
Since the electrode wiring layer is patterned using the silicon oxide film as a mask, the selection ratio between the mask (silicon oxide film) and the base (electrode wiring layer) during etching is larger than that when the photoresist film is used as the mask. it can. Therefore, the reliability of etching is improved and the dimensional controllability of the electrode wiring layer is improved.

[0013]

【Example】

Example 1. The structure of a semiconductor device according to an embodiment of the present invention will be described below with reference to FIG. In addition, the description of the same parts as those of the conventional technique will be appropriately omitted. In the figure,
1 to 7 are the same as conventional ones, 9 is a silicon nitride film 6
An amorphous silicon film 10 as a conductive silicon film formed between the WSi film 7 and the WSi film 7 is composed of four layers of a polycrystalline silicon film 5, a silicon nitride film 6, an amorphous silicon film 9 and a WSi film 7. The electrode wiring layer is formed to be connected to the impurity diffusion layer 2 via the contact hole 4.

A method of manufacturing the semiconductor device configured as described above will be described below with reference to FIG. First, for example, the p-type substrate 1 is separated into elements, element regions such as the n-type impurity diffusion layer 2 are formed, and then the silicon oxide film 3 is formed on the entire surface by the CVD method. Then, a predetermined region of the silicon oxide film 3 is
Contact holes 4 are formed by selective removal using photolithography and etching techniques. After that, a polycrystalline silicon film 5 to which an impurity such as phosphorus is added is formed on the entire surface so as to fill the contact hole 4 by CV.
The film is formed to a film thickness of, for example, 0.1 μm by the D method (FIG. 2).
(A)).

Next, the substrate 1 is subjected to lamp annealing in ammonia gas at, for example, 1000 ° C. for 30 seconds to
A silicon nitride film 6 is formed on the surface of the polycrystalline silicon film 5 for about 2.
It is formed to a film thickness of 0 nm (FIG. 2B). Next, an amorphous silicon film 9 to which an impurity such as phosphorus is added is formed on the entire surface of the silicon nitride film 6 by a sputtering method or a CVD method to have a film thickness of 30 nm (FIG. 2).
(C)). Next, the WSi film 7 is formed to have a film thickness of, for example, 0.1 μm by the sputtering method (FIG. 2D).

Next, a photoresist film 11 is formed on the entire surface of the WSi film 7 and patterned by using the photolithography technique (FIG. 2 (e)). This resist pattern 1
The underlying WSi film 7, the amorphous silicon film 9, the silicon nitride film 6 and the polycrystalline silicon film 5 are sequentially etched using 1 as a mask to form an electrode wiring layer 10 and then the photoresist film 11 is removed (see FIG. 1). ).

In the first embodiment, the electrode wiring layer 10 is made of W
An amorphous silicon film 9 is formed below the WSi film 7, which is composed of the Si film 7 / amorphous silicon film 9 / silicon nitride film 6 / polycrystalline silicon film 5. Therefore, during the heat treatment after forming the electrode wiring layer 10, the stress of the WSi film 7 can be relaxed by supplying Si from the amorphous silicon film 9 to the upper WSi film 7.
To prevent peeling. In addition, S in the WSi film 7 during heat treatment
Even if i is oxidized, S from the amorphous silicon film 9
By supplying i, rapid oxidation of WSi can be prevented, and the reliability of the electrode wiring layer 10 is improved.

Example 2. Although the amorphous silicon film 9 is formed as the lower layer of the WSi film 7 in the first embodiment,
It may be formed in the upper layer of the i film 7, which will be described below with reference to FIG. First, as in the first embodiment, the p-type substrate 1 is separated into elements to form an element region, then a silicon oxide film 3 is formed and a contact hole 4 is opened. After that, a polycrystalline silicon film 5 is deposited, and a silicon nitride film 6 is formed on the surface thereof (see FIGS. 2A and 2B). Next, a WSi film 7 having a film thickness of, for example, 0.1 μm is formed on the entire surface of the silicon nitride film 6 by a sputtering method, and then an amorphous material obtained by adding impurities such as phosphorus to the entire surface by a sputtering method or a CVD method. The silicon film 9 is, for example, 3
It is formed to a film thickness of 0 nm (FIG. 3A).

After that, as in the first embodiment, the resist
A pattern 11 is formed (FIG. 3B), and this resist
The underlying amorphous silicon film 9, WSi film 7, silicon nitride film 6, and polycrystalline silicon film 5 are sequentially etched using the pattern 11 as a mask to form the electrode wiring layer 10a, and then the photoresist film 11 is removed (FIG. Three
(C)).

The electrode wiring layer 10a thus formed
Is composed of amorphous silicon film 9 / WSi film 7 / silicon nitride film 6 / polycrystalline silicon film 5, and WSi film 7
An amorphous silicon film 9 is formed on the upper layer. For this reason, as in the case of the above-described first embodiment, the WS of the lower layer from the amorphous silicon film 9 is subjected to the heat treatment after the electrode wiring layer 10a is formed.
By supplying Si to the i film 7, peeling and rapid oxidation of the WSi film 7 can be prevented.

In the first and second embodiments, the WSi film 7 is used.
Although the amorphous silicon layer 9 is formed as the lower layer or the upper layer, a polycrystalline silicon film may be used and the same effect can be obtained. Further, the amorphous silicon layer 9 is formed by WSi.
It may be formed on both the lower and upper layers of the film 7.

Example 3. Next, a method of manufacturing a semiconductor device according to a third embodiment of the present invention will be described below with reference to FIG.
First, as in Example 1, the silicon oxide film 3 on the substrate 1
After forming the contact hole 4 in the polycrystalline silicon film 5,
Silicon nitride film 6, amorphous silicon film 9 and W
The Si film 7 is sequentially formed (see FIGS. 2A to 2D).
Next, the silicon oxide film 12 is CVed over the entire surface of the WSi film 7.
The film is deposited to a film thickness of, for example, 0.2 μm by the D method (FIG. 4).
(A)).

Next, a photoresist film 11 is formed on the entire surface of the silicon oxide film 12 and patterned by the photolithography technique (FIG. 4B). Using the resist pattern 11 as a mask, the underlying silicon oxide film 12 is etched to leave the silicon oxide film 12 in a region where the electrode wiring layer 10 will be formed in a later step, and then the photoresist film 11 is removed (FIG. 4). (C)). Next, the underlying WSi film 7, the amorphous silicon film 9, the silicon nitride film 6, and the polycrystalline silicon film 5 are sequentially etched using the silicon oxide film 12 as a mask to form an electrode wiring layer 10 (FIG. 4 (d). )).

In the third embodiment, the electrode wiring layer 10 is patterned using the silicon oxide film 12 as a mask. The silicon oxide film 12 is the underlying WSi film 7 / amorphous silicon film 9 / silicon nitride film 6 / polycrystalline silicon film 5
The etching selection ratio is higher than that of the photoresist film 11. Therefore, the reliability of etching is improved and the dimensional controllability of the electrode wiring layer 10 is improved.

In the third embodiment, the amorphous silicon film 9 may be formed on the upper layer of the WSi film 7 as in the second embodiment, and the amorphous silicon film 9 may be replaced with a polycrystalline silicon film.

In addition, in the above-mentioned first to third embodiments, the silicon nitride film 6 may be formed only in the vicinity of the contact hole 4 of the electrode wiring layers 10 and 10a.
The VD method may be used, or an oxynitride film (SiON) containing oxygen may be used. Furthermore, the WSi film 7 may be another refractory silicide film.

[0027]

As described above, according to the present invention, the electrode wiring layer has a polycide structure composed of a metal silicide film / silicon nitride film / polycrystalline silicon film, and is in contact with the metal silicide film or an upper layer thereof. Since it has a conductive silicon film in the lower layer, it has good contact resistance,
Moreover, peeling and rapid oxidation of the metal silicide film due to heat treatment can be prevented, and a semiconductor device having a low-resistance and highly reliable electrode wiring layer can be obtained.

Further, according to the present invention, since the conductive silicon film is composed of the amorphous silicon film or the polycrystalline silicon film, the above effect can be easily and surely realized.

Further, according to the present invention, the electrode wiring layer is
Since patterning is performed using the silicon oxide film as a mask, the reliability of etching is improved, and the dimensional controllability is further improved in the electrode wiring layer having the above effects.

[Brief description of drawings]

FIG. 1 is a sectional view showing a structure of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing the method for manufacturing the semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a structure and a manufacturing method of a semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a sectional view showing a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

FIG. 5 is a sectional view showing the structure of a conventional semiconductor device.

[Explanation of symbols]

1 semiconductor substrate, 2 impurity diffusion layer as conductive layer, 3
Silicon oxide film as insulating film, contact hole as connecting hole, 5 polycrystalline silicon film, 6 silicon nitride film, 7 WSi film as metal silicide film, 9
Amorphous silicon film as conductive silicon film,
10, 10a Electrode wiring layer, 12 Silicon oxide film.

Claims (3)

[Claims] 1. On a semiconductor substrate, a conductive layer, an insulating film formed on the conductive layer, and the insulating film so as to be connected to the conductive layer through a connection hole formed in the insulating film. In the semiconductor device having the electrode wiring layer formed in, the electrode wiring layer has a multilayer structure having a metal silicide film as an upper layer and a polycrystalline silicon film as a lower layer with a silicon nitride film interposed therebetween, and A semiconductor device having a conductive silicon film as an upper layer or a lower layer in contact with the metal silicide film. 2. A semiconductor device comprising a conductive silicon film formed of an amorphous silicon film or a polycrystalline silicon film. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the electrode wiring layer is patterned by etching using a pattern of a silicon oxide film formed thereon as a mask.