JPH0812334B2 - Optical deflector - Google Patents

Description

TECHNICAL FIELD The present invention relates to a polygon mirror type optical deflector (hereinafter simply referred to as an optical deflector), and more specifically to an optical deflector having a feedback loop.

(Prior Art) In the conventional optical deflector, as shown in FIG. 5, the number of revolutions of the motor 21 for rotationally driving the optical deflector 2 is set to the frequency generator 23.
Detect with. On the other hand, the oscillation clock signal from the clock signal oscillator 9 is supplied to the counter 10 for counting, the count value of the counter is compared with the oscillation frequency signal of the frequency generator 23 by the comparator 24, and the comparison output of the comparator 24 is used. The rotation speed of the motor 21 is controlled so that the rotation speed of the light deflector 2 is kept constant to improve the accuracy of the light deflector with respect to high-precision scanning. Reference numeral 19 is a filter.

(Problems to be Solved by the Invention) However, in the optical deflector having the conventional feedback loop as described above, by feeding back the speed of the motor, even if the speed of the motor is kept constant, the optical deflector is controlled by the quality of the optical deflector. There is a problem that the scanning speed changes.

Further, a lens is usually used between the optical deflector and the light receiving plate, but there is a problem that the optical scanning speed changes depending on the accuracy of the lens.

Further, there is a problem that the optical scanning speed changes when the balance of the optical deflector is poor.

Further, there is a problem that the accuracy of the frequency generator, the optical deflector, the lens, and the like must be increased in order to increase the scanning accuracy.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an optical deflector that solves the above-mentioned drawbacks by detecting the scanning angle of a light beam scanned by the optical deflector and feeding back the detected scanning angle.

(Means for Solving the Problem) An optical deflector according to the present invention is set with two beam detectors provided with an effective scanning angle of light by the optical deflector sandwiched therebetween, and the output of one beam detector and the other. RS flip-flop reset by the output of the beam detector, a clock signal oscillator, frequency dividing means reset by the output of one beam detector and dividing the output clock signal of the clock signal oscillator, and frequency dividing means Of the exclusive-OR means for phase-comparing the output of the RS flip-flop and the output of the RS flip-flop, a first logical-AND calculating means for performing an AND operation of the output of the exclusive-OR means and the output of the RS flip-flop, and A second logical product means for performing a logical product operation of the output and the output of the frequency dividing means, and a signal corresponding to the output of the first logical product operation means is used as an acceleration signal of the optical deflector drive motor to perform a second logical sum operation. Of means It is characterized in that the signal corresponding to the output is the deceleration signal of the optical deflector drive motor.

(Operation) In the present invention configured as described above, when the optical deflector is driven by the drive motor, the light emitted to the optical deflector is reflected by the optical deflector and scanned. This scanning causes one of the beam detectors to detect the light, which sets the RS flip-flop, and the other beam detector to detect the light, which resets the RS flip-flop and causes the output of the RS flip-flop to deflect. When the rotation speed of the container is slow, the cycle is long, and when the rotation speed is fast, the cycle is short. On the other hand, since the output of the frequency dividing means is reset by the output of one beam detector, it is an output synchronized with the output of one beam detector.When the rotation speed of the optical deflector is high, the cycle is long and the rotation speed is high. When is slow, the cycle is short.

Therefore, the first AND operation means for ANDing the output of the RS flip-flop and the output of the frequency dividing means by the phase comparison by the exclusive OR means and the output of the RS flip-flop has a slow rotation speed of the optical deflector. Sometimes produce output. Further, the second logical product calculating means which performs the logical product operation of the output of the phase comparison by the exclusive OR means and the output of the frequency dividing means produces an output when the rotation speed of the optical deflector is high.

However, the output of the first AND operation means is supplied to the optical deflector drive motor as an acceleration signal, and the rotation speed of the optical deflector is accelerated. The output of the second AND operation means is supplied to the optical deflector drive motor as a deceleration signal, and the rotation speed of the optical deflector is reduced. In this way, a feedback loop including the optical system is formed, and the rotation speed of the optical deflector is controlled. Therefore, the change in the optical scanning due to the quality of the optical deflector is suppressed, and the lens is used between the optical deflector and the light receiving plate, and the change in the scanning speed due to the influence of the accuracy of the lens is also suppressed.

Further, the frequency generator is not necessary, and its accuracy does not become a problem.

(Examples) Hereinafter, the present invention will be described with reference to Examples.

FIG. 1 is a block diagram showing the arrangement of one embodiment of the present invention, FIG. 2 is a block diagram of a feedback system of one embodiment of the present invention, and FIG. 3 is a control in one embodiment of the present invention. The circuit diagrams of the signal generation circuits are shown respectively.

The light from the light source 1 is applied to the light deflector 2 composed of a polyhedral mirror that is rotationally driven by the motor 21, and the reflected light from the light deflector 2 is received by the light receiving plate 5. Effective scanning angle 8 of the optical deflector 2
The beam detectors 3 and 4 are disposed with the motor 21 with a feedback system so that the beam detectors 3 and 4 detect the reflected light from the optical deflector 2 and optically scan the effective scanning angle 8. Control the rotation of. Reference numeral 6 is a beam splitter composed of, for example, a semitransparent mirror.

Control signal generating circuit, RS flip-flop 12 comprised of the inverters _{7-1, 7-2} NAND gates 12 _1, 12 ₂
And an RS flip-flop 12 at the output of the beam detector 3.
Is set, and the RS flip-flop 12 is reset by the output of the beam detector 4. Further, the output from the clock signal oscillator 9 is supplied to a frequency divider 10 ₁ composed of a counter which is reset by the output of the beam detector 3 to divide the frequency, and the output of the frequency divider 10 ₁ is inverted by an inverter 11. Inverter 11 output and RS
The exclusive OR circuit 13 performs a phase comparison with the Q output of the flip-flop 12.

The output of the exclusive OR circuit 13, that is, the phase comparison output is used as one input of the AND gates 14 and 15, and
14 is supplied with the Q output of the RS flip-flop 12 as the other input, the AND gate 15 is supplied with the output of the inverter 11 as the other input, and the AND gates 14 and 15 delay the rotation of the optical deflector 2. Detect speed.

The output i-transistor 17 of the AND gate 14 is driven, one PNP transistor 16 of the complementary transistors connected in series by the transistor 17 is driven, the NPN transistor 18 is driven by the output of the AND gate 15, and the collector of the transistor 16 and the transistor 18 The control output F is taken out from the connection point with the collector of.

The control output F is amplified by the amplifier 20 via the filter 19,
The motor 21 is driven.

In the embodiment of the present invention constructed as described above, when the rotation speed of the optical deflector 2 is slow, the outputs of the beam detectors 3 and 4 are as shown in the left half of FIGS. 4 (a) and 4 (b). When the cycle is long and the rotation speed is fast, the outputs of the beam detectors 3 and 4 have a short cycle as shown in the right half of FIGS. 4 (a) and 4 (b). The RS flip-flop 12 is set by the output of the beam detector 3 and reset by the output of the beam detector 4, and the Q output of the RS flip-flop 12 becomes as shown in FIG. 4 (c). RS flip-flop 12
Q output has a long cycle as shown in the left half of FIG. 4 (c) when the rotation speed of the optical deflector 2 is slow, and as shown in the right half of FIG. 4 (c) when the rotation speed is fast. Becomes shorter.

On the other hand, the output obtained by dividing the output clock signal from the clock signal oscillator 9 and inverting the divided output of the frequency divider 10 which is reset by the output of the beam detector 3 by the inverter 11 is shown in FIG. As shown. The period of logic "1" of the output of the inverter 11 is determined by the frequency division ratio of the frequency divider 10, but since it is reset by the output of the beam detector 3, the period of logic "0" is the rotation speed of the optical deflector 2. Becomes slower and longer, and faster becomes shorter.

The Q output of the RS flip-flop 12 and the output of the inverter 11 are phase-compared by the exclusive OR circuit 13, and the phase comparison output is as shown in FIG. 4 (e). Therefore, when the rotation speed of the optical deflector 2 is slow, the AND gate 14 outputs a logical "1", and at this time, the output of the AND gate 15 is a logical "0". Therefore, the transistors 17 and 16 are turned on, and the voltage of the power source + V appears at the output terminal F for a period of logic "1" in the portion shown in the left half of FIG. 4 (e), which is smoothed by the filter 19. The output of the smoothed output terminal F is amplified by the amplifier 20 and given to the motor 21 as an acceleration signal.

Further, the AND gate 15 obtains an output of logic "1" when the rotation speed of the optical deflector 2 is high, and at this time, the output of the AND gate 14 is logic "0". Therefore the transistor
17 and 16 are turned off, and in the portion shown in the right half of FIG. 4 (f), the transistor 18 is turned off during the logic "1" period, the output terminal F is grounded during this period, and the motor 21 is decelerated. Given as a signal.

When the output terminal F is applied to the filter 19, if the operating voltage (reference voltage) of the operational amplifier or the like is set to about half of the transistor (16) emitter voltage, the acceleration pulse and the deceleration pulse operate well, Highly accurate servo operation can be expected.

Also, using a preset type counter for the frequency divider 10,
By allowing the output pulse width of the inverter 11 to be finely adjusted, the rotation speed of the motor can be finely controlled.

As described above, in one embodiment of the present invention, the speed of the optical deflector 2 is controlled by a feedback system including an optical type.

(Effect of the Invention) As described above, according to the present invention, the beam detector controls the rotation speed of the optical deflector drive motor with the output of the beam detector across the effective scanning angle of the optical deflector. This enables high-precision scanning and eliminates the need for a frequency generator built in or added to the drive motor to detect the rotation speed of the light deflector drive motor, which is an essential component of the drive motor. There is an effect that the size of the magnet etc. can be made large.

Further, it can be easily integrated into a circuit, and the control device can be downsized by integrating the filter and the beam detector as an external circuit.

[Brief description of drawings]

FIG. 1 is a block diagram showing the arrangement of an embodiment of the present invention. FIG. 2 is a block diagram of a feedback system according to an embodiment of the present invention. FIG. 3 is a circuit diagram of a control signal generating circuit in an embodiment of the present invention. FIG. 4 is a timing chart for explaining the operation of the control signal generating circuit in the embodiment of the present invention. FIG. 5 is a block diagram of a feedback system in a conventional example. 1 ... Light source, 2 ... Optical deflector, 3 and 4 ... Beam detector, 5 ... Photosensitive plate, 8 ... Effective scanning angle, 9 ... Clock signal oscillator, 10 ... Divider, 12 ... … RS flip-flop, 13 …… Exclusive OR circuit, 19 …… Low-pass filter,
21 ... motor.

Claims (1)

[Claims] 1. An RS flip-flop which is set by the output of one beam detector and reset by the output of the other beam detector, and two beam detectors provided with an effective scanning angle of light by an optical deflector interposed therebetween. And a clock signal oscillator,
A frequency dividing means that is reset by the output of one beam detector and divides the output clock signal of the clock signal oscillator;
Exclusive-OR means for phase-comparing the output of the frequency-dividing means and the output of the RS flip-flop, a first AND-operation calculating means for performing an AND operation on the output of the exclusive-OR means and the output of the RS flip-flop, and the exclusive-logical logic A second AND operation means for performing an AND operation on the output of the summing means and the output of the frequency dividing means, and a signal corresponding to the output of the first AND operation means is used as an acceleration signal of the optical deflector drive motor, and An optical deflector characterized in that a signal corresponding to the output of the logical product means is used as a deceleration signal of the optical deflector drive motor.