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JPH08124885A - Semiconductor substrate grinder - Google Patents

Semiconductor substrate grinder

Info

Publication number
JPH08124885A
JPH08124885A JP26007194A JP26007194A JPH08124885A JP H08124885 A JPH08124885 A JP H08124885A JP 26007194 A JP26007194 A JP 26007194A JP 26007194 A JP26007194 A JP 26007194A JP H08124885 A JPH08124885 A JP H08124885A
Authority
JP
Japan
Prior art keywords
semiconductor substrate
polishing
ionized gas
static electricity
gas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26007194A
Other languages
Japanese (ja)
Inventor
Koji Hizume
爪 孝 治 樋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP26007194A priority Critical patent/JPH08124885A/en
Publication of JPH08124885A publication Critical patent/JPH08124885A/en
Pending legal-status Critical Current

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  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PURPOSE: To prevent dielectric breakdown of an insulating film by a method wherein, when a surface of a semiconductor substrate is ground to flatten, ionized gas having a different mark from charged static electricity is supplied to the semiconductor substrate and the static electricity generated in the semiconductor substrate is neutralized. CONSTITUTION: An abrasive is supplied from an abrasive supply nozzle 9. Further, almost simultaneously, ionized gas is sprayed from an ionized gas supply part 11. As the ionized gas is sprayed to a portion where a table surface 1A comes into contact with a surface of a semiconductor substrate 6, static electricity generated by grinding is neutralized while ground. Under this state, the surface of the semiconductor substrate 6 is ground.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体基板研磨装置に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate polishing apparatus.

【0002】[0002]

【従来の技術】近年、半導体基板の表面を平坦化する半
導体基板研磨装置としてCMP装置が用いられている。
このCMP装置は回転しているテーブル表面に半導体基
板を回転させながらその表面を接触させ、研磨剤を用い
て半導体基板の表面の研磨加工を行う装置である。
2. Description of the Related Art In recent years, a CMP apparatus has been used as a semiconductor substrate polishing apparatus for flattening the surface of a semiconductor substrate.
This CMP apparatus is an apparatus for contacting the surface of a rotating table while rotating the semiconductor substrate and polishing the surface of the semiconductor substrate with an abrasive.

【0003】[0003]

【発明が解決しようとする課題】上述のCMP装置によ
って、例えば、MOSトランジスタの上方に形成された
絶縁膜を研磨する場合について概略的に説明する。即
ち、図4に示すように、テーブル21に固定リング22
によって半導体基板23を接触させて、その接触面に研
磨剤24を流し込み研磨する。その半導体基板23には
フィールド酸化膜25によって区画された領域にMOS
トランジスタ26が形成されている。このMOSトラン
ジスタ26はソース/ドレインとなる拡散層27、27
を有し、これらの間のチャネル領域の上方にゲート酸化
膜28が形成され、その上方にゲート電極29が形成さ
れている。さらに、このMOSトランジス26を覆うよ
うに絶縁膜30が形成されている。
The case of polishing an insulating film formed above a MOS transistor by the above-described CMP apparatus will be schematically described. That is, as shown in FIG.
The semiconductor substrate 23 is brought into contact with each other, and the polishing agent 24 is poured into the contact surface and polished. In the semiconductor substrate 23, MOS is formed in a region partitioned by the field oxide film 25.
The transistor 26 is formed. This MOS transistor 26 has diffusion layers 27, 27 serving as a source / drain.
The gate oxide film 28 is formed above the channel region between them, and the gate electrode 29 is formed above the gate oxide film 28. Further, an insulating film 30 is formed so as to cover the MOS transistor 26.

【0004】この絶縁膜30をCMP装置によって機械
的に研磨する場合、研磨の際に発生する静電気によって
基板表面が負に帯電し、特に、ゲート酸化膜28が劣化
してリークするという静電破壊が生じ、製品歩留りが低
下するという問題が生じていた。
When the insulating film 30 is mechanically polished by a CMP apparatus, the surface of the substrate is negatively charged by static electricity generated during polishing, and in particular, the gate oxide film 28 is deteriorated and leaks by electrostatic discharge. Occurs, and the product yield is reduced.

【0005】本発明は、上記に鑑みてなされたもので、
その目的は、半導体基板の表面を研磨するときに生じる
静電気を研磨効果を落とすことなく中和し、半導体基板
上に形成された絶縁膜等の静電破壊を防止しうる半導体
基板研磨装置を提供することにある。
The present invention has been made in view of the above,
An object of the present invention is to provide a semiconductor substrate polishing apparatus capable of neutralizing static electricity generated when polishing the surface of a semiconductor substrate without lowering the polishing effect and preventing electrostatic breakdown of an insulating film or the like formed on the semiconductor substrate. To do.

【0006】[0006]

【課題を解決するための手段】本発明は、半導体基板の
表面を平坦化するための回転テーブルの表面に半導体基
板の表面を回転させながら接触させ、研磨剤を注入して
前記半導体基板の表面を研磨する半導体基板研磨装置に
おいて、前記半導体基板を研磨する際に前記半導体基板
に発生する静電気を中和するために、静電気と異符号の
イオン化ガスを前記半導体基板に供給するイオン化ガス
供給手段を備えるものとして構成されている。
According to the present invention, the surface of a semiconductor substrate is brought into contact with the surface of a rotary table for flattening the surface of the semiconductor substrate while rotating the surface of the semiconductor substrate, and an abrasive is injected to the surface of the semiconductor substrate. In a semiconductor substrate polishing apparatus for polishing, an ionized gas supply means for supplying an ionized gas having a sign different from that of static electricity to the semiconductor substrate in order to neutralize static electricity generated in the semiconductor substrate when polishing the semiconductor substrate. It is configured to have.

【0007】[0007]

【作用】半導体基板の表面を平坦化のために研磨する
際、帯電した静電気と異符号のイオン化ガスが半導体基
板に供給され、半導体基板に発生する静電気が中和され
る。このため、絶縁膜の静電破壊を防止することができ
る。
When the surface of the semiconductor substrate is polished for flattening, ionized gas having a sign different from that of the charged static electricity is supplied to the semiconductor substrate to neutralize the static electricity generated in the semiconductor substrate. Therefore, electrostatic breakdown of the insulating film can be prevented.

【0008】[0008]

【実施例】以下、図面を参照しながら本発明に係る半導
体基板研磨装置の一実施例について説明する。この装置
は、図1及び図2からわかるように、研磨用の円形回転
テーブル1を有する。このテーブル1は研磨の際の基準
面となるテーブル面1Aを有し、そのテーブル面1Aの
反対側で回転軸2に取り付けられている。また、テーブ
ル回転用のモータ3にはプーリ4が取り付けられ、回転
軸2とプーリ4の間にはベルト5が張設されている。こ
のようなテーブル1の上方に半導体基板6をテーブル表
面1Aに対して接離させる接離機構7が設けられてい
る。この接離機構7は半導体基板6を固定するための固
定リング7aを有し、この固定リング7aは回転軸7b
を介して半導体基板回転用のモータ7cに取り付けられ
ている。半導体基板6は搬送装置8によって順次搬送さ
れてくる。また、研磨時にテーブル面1A上に研磨剤を
供給するための研磨剤供給ノズル9が配置されている。
研磨剤としては、例えばコロイダルシリカ(二酸化ケイ
素SiO)が用いられるが、コロイダルシリカに添加
剤を加えたものでもよい。この研磨剤供給ノズル9から
研磨時には流量調節された研磨剤が供給され、研磨終了
後には切り換えバルブ10によって純水が供給されるよ
うになっている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a semiconductor substrate polishing apparatus according to the present invention will be described below with reference to the drawings. As shown in FIGS. 1 and 2, this apparatus has a circular rotary table 1 for polishing. The table 1 has a table surface 1A which serves as a reference surface for polishing, and is attached to the rotary shaft 2 on the opposite side of the table surface 1A. A pulley 4 is attached to the motor 3 for rotating the table, and a belt 5 is stretched between the rotary shaft 2 and the pulley 4. A contact / separation mechanism 7 for contacting / separating the semiconductor substrate 6 with respect to the table surface 1A is provided above the table 1. The contact / separation mechanism 7 has a fixing ring 7a for fixing the semiconductor substrate 6, and the fixing ring 7a has a rotating shaft 7b.
It is attached to the motor 7c for rotating the semiconductor substrate via. The semiconductor substrate 6 is sequentially transported by the transport device 8. Further, a polishing agent supply nozzle 9 for supplying a polishing agent on the table surface 1A during polishing is arranged.
As the abrasive, for example, colloidal silica (silicon dioxide SiO 2 ) is used, but colloidal silica to which an additive is added may be used. The polishing agent supply nozzle 9 supplies a polishing agent whose flow rate is adjusted during polishing, and pure water is supplied by a switching valve 10 after completion of polishing.

【0009】さらに、テーブル1上の半導体基板6にイ
オン化ガスを噴射できるようにイオン化ガス供給部11
が設けられている。このイオン化ガス供給部11のノズ
ル(吹きだし口の径3〜10mm)11aには、図3に
示すように、放電電極11bが絶縁して差し込まれてい
る。この放電電極11bには電源部12から高電圧が印
加され、放電電極11bから放電が行われて、ノズル1
1a内を通るガスがイオン化される。ここで用いるガス
は、エアー、又は不活性ガス(窒素ガス、ヘリウム、ネ
オン、アルゴンガス等)、即ち、研磨剤と化学的に反応
しないガスであれば良い。これらのガスは放電によって
陽イオンとなり、静電気によって負に帯電する半導体基
板6に噴射される。
Further, an ionized gas supply unit 11 is provided so that the ionized gas can be injected onto the semiconductor substrate 6 on the table 1.
Is provided. As shown in FIG. 3, a discharge electrode 11b is inserted in an insulating manner into a nozzle (blowout port diameter 3 to 10 mm) 11a of the ionized gas supply unit 11. A high voltage is applied to the discharge electrode 11b from the power supply section 12 to cause discharge from the discharge electrode 11b, and the nozzle 1
The gas passing through the inside of 1a is ionized. The gas used here may be air or an inert gas (nitrogen gas, helium, neon, argon gas, etc.), that is, a gas that does not chemically react with the polishing agent. These gases become positive ions by discharge and are sprayed onto the semiconductor substrate 6 which is negatively charged by static electricity.

【0010】上述の装置によって半導体基板を研磨する
場合について説明する。まず、テーブル1を矢印の方向
にモータ3によって回転させる。半導体基板6は搬送装
置8から搬送され、接離機構7の固定リング7aに吸着
固定される。この半導体基板6をモータ7cによって回
転させた状態で、テーブル表面1Aに接触させる。この
とき、研磨剤供給ノズル9からは研磨剤が供給され、ほ
ぼ同時にイオン化ガス供給部11からイオン化ガスが噴
射される。テーブル表面1Aと半導体基板6の表面との
接触部分にイオン化ガスが噴射されているため、研磨に
よって発生する静電気を中和しながら研磨することにな
る。この状態で半導体基板6の表面の研磨が行われる。
A case where a semiconductor substrate is polished by the above apparatus will be described. First, the table 1 is rotated by the motor 3 in the direction of the arrow. The semiconductor substrate 6 is transferred from the transfer device 8 and adsorbed and fixed to the fixing ring 7 a of the contact / separation mechanism 7. The semiconductor substrate 6 is brought into contact with the table surface 1A while being rotated by the motor 7c. At this time, the polishing agent is supplied from the polishing agent supply nozzle 9, and the ionized gas is jetted from the ionized gas supply unit 11 almost at the same time. Since the ionized gas is jetted to the contact portion between the table surface 1A and the surface of the semiconductor substrate 6, the polishing is performed while neutralizing the static electricity generated by the polishing. In this state, the surface of the semiconductor substrate 6 is polished.

【0011】このように研磨した後の半導体基板の静電
気の帯電量について従来例と比較して示すと以下のよう
になる。即ち、10000オングストロームの酸化膜
(絶縁膜)で覆われている半導体基板に平坦化加工を施
した場合においては、従来例では、基板表面の電位は−
3000V〜−4000Vに帯電していた。これに対
し、本実施例では、基板表面の電位は±0Vであった。
このことから、半導体基板の静電気はほとんど除去され
ていることがわかる。なお、従来例と本実施例との平坦
化加工効果についてはほぼ同程度であった。次に、静電
破壊については耐圧評価サンプルの耐圧を測定した結
果、従来例においては、歩留りが75%であったが、本
実施例においては歩留りが90%に向上した。
The amount of static charge on the semiconductor substrate after being polished in this way is shown below in comparison with the conventional example. That is, when the semiconductor substrate covered with the oxide film (insulating film) of 10000 angstrom is subjected to the planarization process, the potential of the substrate surface is − in the conventional example.
It was charged to 3000V to -4000V. On the other hand, in this example, the potential of the substrate surface was ± 0V.
From this, it is understood that the static electricity of the semiconductor substrate is almost removed. The flattening effect of the conventional example and that of the present example were substantially the same. Next, with respect to electrostatic breakdown, as a result of measuring the withstand voltage of the withstand voltage evaluation sample, the yield was 75% in the conventional example, but in the present example, the yield was improved to 90%.

【0012】本発明の実施例によれば、半導体基板を研
磨する際に、静電気中和用のイオン化ガスを噴射しなが
ら研磨するようにしたので、基板に発生する静電気を中
和しながら研磨することができ、静電破壊に起因した製
品歩留りの低下が防がれる。また、本発明の装置は、イ
オン化ガスを半導体基板に噴射するだけであるので、表
面平坦化加工効果(研磨効果)に悪影響を与えることを
極力抑えることができる。例えば、イオン化ガスとし
て、不活性ガスを使用することにより、研磨剤と化学反
応を起こしたりするという事態を防止することができ
る。
According to the embodiment of the present invention, when a semiconductor substrate is polished, the ionization gas for neutralizing static electricity is jetted, so that the static electricity generated on the substrate is neutralized and polished. Therefore, it is possible to prevent a decrease in product yield due to electrostatic breakdown. Further, since the apparatus of the present invention only injects the ionized gas onto the semiconductor substrate, it is possible to suppress the adverse effect on the surface flattening processing effect (polishing effect) as much as possible. For example, by using an inert gas as the ionized gas, it is possible to prevent the chemical reaction with the polishing agent.

【0013】なお、実施例において研磨剤として具体的
に例示したものはあくまでも例示であって、それに限定
されることがないのは当然である。
It should be noted that the concrete examples of the polishing agent in the examples are merely examples, and the polishing agent is not limited thereto.

【0014】[0014]

【発明の効果】本発明によれば、基板に発生する静電気
を中和しつつ研磨を行うようにしたので、半導体基板が
帯電することを防ぐことができ、半導体基板に形成され
た絶縁膜の静電破壊を極力抑えることができる。
According to the present invention, since the polishing is performed while neutralizing the static electricity generated on the substrate, the semiconductor substrate can be prevented from being charged, and the insulating film formed on the semiconductor substrate can be prevented. Electrostatic breakdown can be suppressed as much as possible.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の概略構成図。FIG. 1 is a schematic configuration diagram of an embodiment of the present invention.

【図2】図1の装置の要部の斜視図。FIG. 2 is a perspective view of a main part of the apparatus shown in FIG.

【図3】イオン化ガス供給部の縦断面図。FIG. 3 is a vertical cross-sectional view of an ionized gas supply unit.

【図4】半導体基板の研磨時の様子を説明するための説
明図。
FIG. 4 is an explanatory diagram for explaining how the semiconductor substrate is polished.

【符号の説明】[Explanation of symbols]

1 回転テーブル 2 回転軸 3 モータ 4 プーリ 5 ベルト 6 半導体基板 7 接離機構 7a 固定リング 7b 回転軸 7c モータ 8 搬送装置 9 研磨剤供給ノズル 10 切り換えバルブ 11 イオン化ガス供給部 11a ノズル 11b 放電電極 12 電源部 DESCRIPTION OF SYMBOLS 1 rotary table 2 rotary shaft 3 motor 4 pulley 5 belt 6 semiconductor substrate 7 contact / separation mechanism 7a fixed ring 7b rotary shaft 7c motor 8 transfer device 9 abrasive supply nozzle 10 switching valve 11 ionized gas supply unit 11a nozzle 11b discharge electrode 12 power supply Department

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】半導体基板の表面を平坦化するための回転
テーブルの表面に半導体基板の表面を回転させながら接
触させ、研磨剤を注入して前記半導体基板の表面を研磨
する半導体基板研磨装置において、 前記半導体基板を研磨する際に前記半導体基板に発生す
る静電気を中和するために、静電気と異符号のイオン化
ガスを前記半導体基板に供給するイオン化ガス供給手段
を備えることを特徴とする半導体基板研磨装置。
1. A semiconductor substrate polishing apparatus for polishing a surface of a semiconductor substrate by bringing the surface of the semiconductor substrate into contact with the surface of a rotary table for flattening the surface of the semiconductor substrate while rotating the surface and injecting an abrasive. A semiconductor substrate comprising an ionized gas supply means for supplying an ionized gas having a sign different from that of the static electricity to the semiconductor substrate in order to neutralize the static electricity generated in the semiconductor substrate when polishing the semiconductor substrate. Polishing equipment.
【請求項2】前記イオン化ガス供給手段は、放電によっ
てイオン化したガスを前記半導体基板に噴射させるもの
として構成されていることを特徴とする請求項1記載の
半導体基板研磨装置。
2. The semiconductor substrate polishing apparatus according to claim 1, wherein the ionized gas supply means is configured to inject gas ionized by discharge to the semiconductor substrate.
【請求項3】前記研磨剤はコロイダルシリカを主成分と
した溶液であり、前記ガスはエアー又は不活性ガスであ
ることを特徴とする請求項2記載の半導体基板研磨装
置。
3. The semiconductor substrate polishing apparatus according to claim 2, wherein the polishing agent is a solution containing colloidal silica as a main component, and the gas is air or an inert gas.
JP26007194A 1994-10-25 1994-10-25 Semiconductor substrate grinder Pending JPH08124885A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26007194A JPH08124885A (en) 1994-10-25 1994-10-25 Semiconductor substrate grinder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26007194A JPH08124885A (en) 1994-10-25 1994-10-25 Semiconductor substrate grinder

Publications (1)

Publication Number Publication Date
JPH08124885A true JPH08124885A (en) 1996-05-17

Family

ID=17342907

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26007194A Pending JPH08124885A (en) 1994-10-25 1994-10-25 Semiconductor substrate grinder

Country Status (1)

Country Link
JP (1) JPH08124885A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100403255B1 (en) * 1995-10-19 2003-12-18 엔이씨 일렉트로닉스 코포레이션 Wafer polishing method and wafer polishing apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100403255B1 (en) * 1995-10-19 2003-12-18 엔이씨 일렉트로닉스 코포레이션 Wafer polishing method and wafer polishing apparatus

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