JPH0755012Y2 - Address setting structure - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to an address setting structure, and in particular, a plurality of prints which are configured and mounted as one functional unit by combining one main board and two sub boards. The present invention relates to an address setting structure for setting an identification address for mounting on a board.

[Conventional technology]

Conventionally, this kind of address setting has been performed by making each address plate different, or by providing different wirings and component mounting for identifying addresses on the same printed board.

[Problems to be solved by the device]

In the conventional address setting method described above, the printed board is made separately according to the address value of the board, or if the same board is used, strap wiring or parts can be attached so that different addresses can be set in advance. It has the drawback of having to be prepared.

[Means for Solving the Problems]

The address setting structure of the present invention is an address setting structure for setting an identification address for mounting on a printed circuit board, and includes one main board forming one functional unit and two first and second boards. A sub-board and first and second connectors that hold the first and second sub-boards in parallel with one surface of the main board and electrically and structurally couple the sub-boards and dispose them at different positions. A first address discriminating circuit for receiving ground information of the main board via the first connector and discriminating and outputting the ground information as address discrimination information of the first sub-board; and receiving the ground information. A second address discriminating circuit for discriminating and outputting the absence state as the address discriminating information of the second sub-board.

〔Example〕

The present invention will now be described with reference to the drawings. FIG. 1 is a side view of an embodiment of the present invention. The embodiment shown in FIG.
The main board 1, the first sub-board 2 and the second sub-board 3, which are a plurality of printed boards that are mounted on a rack or the like to form a functional unit that exhibits one function, are arranged at different positions. A first connector 5 and a second connector 8 for electrically connecting the printed circuit boards to each other and holding them in parallel, and a main board 1.
And the ground information and receives the ground information and uses this ground information as the address discrimination information of the first sub-board 2 and the ground information obtained via the main board 1 in the second state. A second address determination circuit 10 used as address determination information of the sub-board 3 and resistors 6 and 9 are provided.

Next, the operation of the embodiment shown in FIG. 1 will be described.

First, focusing on the first sub-board 2, the grounding information by the grounding section 4 on the main board 1 is determined by the wiring path in the first connector 5.
It is sent to one end of the resistor 6 on the first sub-board 2 through 11. The other end of the resistor 6 becomes a logic low (Low) according to the ground information acquired from the main board 1 connected to the power supply. This logic Low information is supplied to the first address discrimination circuit 7 and used as address discrimination information.

On the other hand, considering the second sub-board 3, one end of the resistor 9 cannot receive the ground information from the main board 1 and therefore is logically in a high state. This logic
The High information is supplied to the second address discrimination circuit 10 and used as information for address decoding.

As described above, even though the first sub-board 2 and the second sub-board 3 are the same printed circuit board, when they are received from the main board 1 through the connector, they are logically High, Low corresponding to the presence or absence of ground information. Can be created and different address settings can be made.

[Effect of device]

As described above, the present invention uses the ground information as the address setting information and receives the ground information from the main board.
By creating two kinds of states depending on whether or not they are received, there is an effect that the two sub-boards of the first sub-board and the second sub-board can be used as the same board.

[Brief description of drawings]

FIG. 1 is a side view of an embodiment of the present invention. 1 ... Main board, 2 ... First sub board, 3 ... Second sub board, 4 ... Grounding section, 5 ... First connector, 6 ... Resistor, 7 ... First Address discrimination circuit, 8 ... second connector, 9 ... resistor, 10 ... second address discrimination circuit,
11 ... Connection path.

Claims (1)

[Scope of utility model registration request] 1. An address setting structure for setting an identification address for mounting on a printed circuit board, comprising one main board forming one functional unit and two first and second sub boards. A first connector and a second connector that hold the first and second sub-boards in parallel with one surface of the main board and electrically and structurally couple them to each other and dispose them at different positions. A first address discriminating circuit that receives ground information of the main board via the first connector and discriminates and outputs the ground information as address discrimination information of the first sub-board, and a state of not receiving the ground information. The second
Second, which is determined and output as the address determination information of the sub-board of
An address setting structure comprising: