JPH0732406B2 - Demodulation circuit - Google Patents

Description

Description: FIELD OF THE INVENTION The present invention relates to a demodulator of a carrier suppressed double sideband signal time-division multiplexed with a burst-like or other modulated signal, and particularly in an environment where the received carrier frequency fluctuates greatly. The present invention also relates to a circuit that stably generates an intermediate frequency.

[Background of the Invention]

A conventional device detects a phase error from a demodulated signal after detection and feeds back to a voltage controlled oscillator to reproduce a stable carrier, as described in, for example, Japanese Patent Laid-Open No. 58-197944.
Further, in JP-A-58-136160, it was devised to maintain stability even when the received carrier frequency fluctuates greatly. However, these are intended for continuous signal input, and no consideration has been given to signal inputs that are time-division-multiplexed with burst-like or other modulated waves.

[Object of the Invention]

An object of the present invention is to provide a demodulation circuit for a heterodyne receiver that stably demodulates a carrier-suppressed double-sideband signal such as a 4-phase phase-modulated wave that is input in bursts.

[Outline of Invention]

To achieve the above object, the present invention converts an input modulated wave into an intermediate frequency by a mixer, and detects a phase error between the frequency-converted modulated wave and the output signal of the reference oscillator from the demodulated waveform by the Costas loop method. At the same time, the direct input modulated wave and the reference oscillator output are detected by phase detection, and these two phase error signals are switched according to the type of data being modulated and fed back to the local oscillator for frequency conversion. It is in.

Example of Invention

 Hereinafter, the present invention will be described in detail with reference to examples.

FIG. 1 is a block diagram showing an embodiment of a demodulation circuit according to the present invention, and a typical 4-phase phase-modulated (4-phase PSK) wave is assumed as a carrier suppression double sideband wave. First, input terminal 1
The 4-phase PSK signal Vin input from the local oscillator 2 and mixer 3
And converted to an intermediate frequency (IF) by the band filter (BPF) 4. Here, a voltage controlled oscillator (VCO) whose oscillation frequency changes by an external input is used as the local oscillator 2, and by performing the control as described below, a 4-phase PS
The first feature of the present invention is that a constant IF frequency is always obtained even when the carrier frequency of the K signal changes. The present embodiment will be described below with reference to this control method.

The 4-phase PSK signal V _IF converted to the IF frequency is the phase detector 5, 6
And low-pass filters (LPF) 7 and 8 perform synchronous detection.
This synchronous detection carrier signal is the output signal of the reference oscillator 17.
The signals V _I and V _Q obtained by phase shifting V _R by + 45 ° and −45 ° by the phase shifters 15 and 16 are used. The sign discriminators 9 and 10 discriminate between positive and negative of the synchronously detected signals V ₀₁ and V ₀₂ , and output a positive constant voltage when positive and a negative constant level voltage when negative. This output signal V ₁₁ ,
V ₁₂ is output through output terminals 11 and 12. Further, these V ₀₁ , V ₀₂ and V ₁₁ , V ₁₂ are alternately multiplied by the multipliers 13 and 14, respectively, and when they are subtracted by the subtracter 18, the phase error signal Ve _{1 of} V _IF and V _I and V _Q is obtained. can get. This is a phase error detection method known as the Costas loop method.
₁ was fed back to the reference oscillator 17 via the loop filter 19. In the present invention, this is fed back to the local oscillator 2 instead of the reference oscillator 17, so that the IF
The frequency is always kept constant (oscillation frequency of the reference oscillator 17). As a result, the center frequency shift of the BPF 4 and the deterioration of the phase shift characteristics of the phase shifters 15 and 16 due to frequency fluctuations, which have been problems in the past, are eliminated.

By the way, when the input signal Vin is input in a burst manner, the time from the input of Vin to the phase synchronization becomes a problem. Since the demodulation cannot be substantially performed within this time, the received data will be lost. Therefore, this synchronization time needs to be as short as possible. On the other hand, the Costas loop method described above has excellent steady-state characteristics after synchronization, but it takes a relatively long time to synchronize because it detects phase error from the detection output and applies feedback. Normally, in anticipation of this synchronization time, data that may be missing, called a preamble word, is transmitted in advance, but this is a very short time, and it is a very difficult problem to complete synchronization within this time. is there.

Therefore, in the present invention, as shown in FIG. 1, the phase error signal Ve ₂ is detected by directly comparing the phase of V _IF and V _R with the phase detection 20 and fed back to the local oscillator 2 via the loop filter 21. By doing so, the configuration is such that synchronization is achieved in a short time. Immediately before the synchronization is completed and the original data is transmitted, the phase error detection loop is switched to the Costas loop by the switching circuit 22 and demodulated. Here, the reason why the loop is switched is that since the four-phase PSK signal is originally a carrier suppression signal, a phase error signal cannot be obtained even if the phase is directly detected. On the contrary, since the preamble period is transmitted in a so-called non-modulation state, it is possible to synchronize even in a normal phase locked loop (PLL). Reference numeral 23 is an input terminal for this loop switching control signal.

FIG. 2 is a block diagram showing another embodiment of the present invention, in which the input signal Vi is time-division multiplexed with another modulation wave such as FM modulation.
A demodulation circuit suitable for a PSK signal is shown. In the figure, 24 is a sample bold circuit, 25 is an input terminal for the control signal thereof, and the same reference numerals as those in FIG. 1 indicate the same functions. The sample hold circuit 24 receives the phase error signal Ve ₁ or Ve ₂ as it is when the 4-phase PSK signal is input,
When other modulated waves are input, hold the previous Ve ₁ or Ve ₂ value. As a result, the phase relationship between the frequency-converted input signals V _IF and V _R , V _I , and V _Q is maintained almost the same as before even when other modulated waves are input. When a 4-phase PSK signal is input, it synchronizes in a short time. Thus, in this embodiment, the four-phase SP
From the viewpoint of K demodulation, there is an effect that the phase synchronization time is not delayed even when another modulated wave equal to the interfering wave is time-division multiplexed and input.

FIG. 3 is a constitutional view showing still another embodiment of the present invention, and has the same effect as the embodiment of FIG. In the figure, 26 and 28 are sample hold circuits, 27 and 29 are control input terminals thereof, 30 is an adder circuit, and the same reference numerals as those in FIGS. 1 and 2 indicate the same functions. Sample hold circuit 28 is 4
During the phase SPK signal input, Ve ₂ is output as it is during the preamble period and the PLL is closed. In the other periods, the hold state is entered and the PLL is opened. Conversely, the sample-hold circuit closes the Costas loop when a 4-phase PSK signal is input, excluding the preamble period, and remains in the hold state during other periods to open the loop. Therefore, when the 4-phase PSK signal is input, either the Costas loop or the normal PLL is closed and the phases are synchronized, and when other modulated waves are input, both loops open.
This is exactly the same as the illustrated embodiment. Phase difference point is input terminal 23,25
The only difference is that the timings of the control signals input to and 27 and 29 are different.

As a method for obtaining these control signals, there is a method of demodulating another modulated wave (for example, FM) which is time-division multiplexed, but the present invention is not limited to this method.

Further, from the viewpoint of eliminating the interference to the phase error detection loop due to other modulated waves, for example, in the embodiment shown in FIG. 1, the input terminal 1 and the mixer 3, or the BPF 4 and the phase detectors 5 and 6 are used. If a breaking circuit is inserted between 20 and 20, and an interfering wave is cut or cut, it becomes substantially equivalent to a simple burst wave, and the same effect as that of the embodiment shown in FIGS. 2 and 3 can be obtained. .
Further, in the embodiment of FIG. 3, a sample hold circuit is provided.
The same applies when 26 is arranged in the latter stage of LPFs 9 and 10.

Although the present invention has been described above with respect to a demodulation circuit for a four-phase PSK signal, it is needless to say that the present invention is not limited to this and can be applied to all carrier suppressed double sideband signals capable of Costas loop demodulation. .

〔The invention's effect〕

As described above, according to the present invention, a frequency-converted IF signal can be phase-synchronized in a short time even with a carrier suppressed double sideband signal that has large frequency fluctuation and is transmitted in bursts. A stable demodulation operation is possible.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a demodulation circuit according to the present invention, FIG. 2 is a block diagram showing another embodiment of the present invention, and FIG. 3 is a block diagram showing yet another embodiment of the present invention. Is. 2 …… Local oscillator, 3 …… Mixer 17 …… Reference oscillator, 20 …… Phase detector 22 …… Switching circuit 24,26,28 …… Sample hold circuit 30 …… Adder

Claims (3)

[Claims] 1. A first and a second path for converting an input modulated wave from a transmission line into an intermediate frequency by a mixer and a local oscillator, and synchronously detecting the input modulated wave converted to the intermediate frequency, In a heterodyne receiver having a reference oscillator corresponding to an intermediate frequency, a first shifter provided in the first path provided with a signal obtained by shifting the output signal of the reference oscillator by + 45 ° and -45 °, respectively. The phase detector and the second phase detector provided in the second path, and the outputs of the first and second phase detectors provided in the first and second paths, respectively, are positive. First and second discriminating circuits for discriminating between negative and negative; and first and second output signals of the first and second phase detectors and first and second discriminating circuits for crossing and multiplying, respectively. First and second multipliers and the first and second multiplications A subtracter for subtracting the other from one of the outputs of the detector, a third phase detector for receiving the output signal of the reference oscillator and synchronously detecting the input modulated wave converted to the intermediate frequency, and the third phase detector. Demodulation, characterized in that a switching circuit for receiving the output signal of the phase detector and the output signal of the subtractor, and outputting either one is provided, and the oscillation frequency of the local oscillator is controlled by the output signal of the switching circuit. circuit. 2. A demodulation circuit according to claim 1, wherein the output signal of the switching circuit is applied to the local oscillator through a sample hold circuit. 3. The first and second sample-hold circuits at the output ends of the subtractor and the third phase detector, respectively, in place of the switching circuit, according to claim 1. A demodulation circuit, characterized in that an adder for adding the output signals of the first and second sample hold circuits is provided, and the local oscillator is controlled by the output signal of the adder.