JPH07297202A - Formation of bipolar transistor - Google Patents

Abstract

PURPOSE:To acquire stable device characteristics which are free from irregularities of device characteristics of a bipolar transistor such as breakdown strength, current amplification rate, etc., by etching a base electrode formation layer with a specified surface of a semiconductor substrate covered with an emitter region protection pattern. CONSTITUTION:An emitter electrode 23 is formed by etching an emitter electrode formation layer 22. Here, a resist pattern is formed on the emitter electrode formation layer 22. The emitter electrode 23 is formed by etching emitter electrode formation layer 22 by using the resist pattern as a mask. Then, a BPSG film is formed on an upper surface of the emitter electrode 23 and an insulation layer 20, and reflow is performed for it at 900 deg.C. Impurities in the emitter electrode 23 are diffused in a semiconductor substrate 11 in this way. An emitter region 24 formed by diffusing n-type impurities in the semiconductor substrate 11 is obtained.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to a method of forming a bipolar transistor.

[0002]

2. Description of the Related Art When forming a bipolar transistor on a semiconductor substrate made of silicon, first, as shown in FIG. 7A, an element isolation region 72 made of an oxide film and a first conductivity type impurity are diffused in a semiconductor substrate 71. The collector region 73 thus formed is formed. Then, the semiconductor substrate 7 is exposed so that the emitter / base region of the semiconductor substrate 71 is exposed.
The oxide film 74 on 1 is etched. After that, the polysilicon layer 75 is formed on the semiconductor substrate 71 and the oxide film 74, and the insulating film 76 is formed on the polysilicon layer 75. Then, the insulating film 76 and the polysilicon layer 75 in the portion shown by the broken line are removed by etching to form a base electrode 77 made of the polysilicon layer 75. Then, impurities of the second conductivity type are injected and diffused into the semiconductor substrate 71 from the exposed surface of the semiconductor substrate 71. Further, the second conductivity type impurities are diffused from the base electrode 77 into the semiconductor substrate 71. As a result, impurities of the second conductivity type are removed from the semiconductor substrate 71.
A base region 81 diffused therein is formed.

Next, as shown in FIG. 7B, a side wall 78 made of an insulating film is formed on the side wall of the base electrode 77. Then, from the exposed surface of the semiconductor substrate 71, the second
Impurity of conductivity type is injected and diffused. After that, FIG.
As shown in (3), an emitter electrode 79 made of polysilicon is formed in a state of being connected to the semiconductor substrate 71 exposed from the sidewall 78. Then, the first conductivity type impurities are diffused from the emitter electrode 79 into the semiconductor substrate 71 to form the emitter region 82.

In the bipolar transistor described above, the distance between the base electrode 77 and the emitter electrode 79 is determined by the width of the sidewall 78. Therefore, the capacitance between the emitter and the base is set to a low value.

[0005]

However, the above-mentioned method for forming a bipolar transistor has the following problems. That is, the etching selection ratio between the polysilicon forming the base electrode and the emitter electrode and the silicon forming the semiconductor substrate is about 1. Therefore, when etching the polysilicon laminated on the silicon substrate, it is not possible to detect the end point of the etching by detecting the change in the etching rate. Therefore, in the etching of polysilicon when forming the base electrode, the upper layer portion of the semiconductor substrate is over-etched in order to completely remove the polysilicon on the emitter region. By this over-etching, the semiconductor substrate is removed by about 40 to 100 nm. Therefore, the distance between the base region and the collector region formed immediately below the emitter region varies depending on the progress of the above-described overetching. This causes variations in device characteristics of the bipolar transistor such as withstand voltage characteristics and current amplification factor.

Further, in the above method of forming a bipolar transistor, the surface of the semiconductor substrate is physically damaged by dry etching of polysilicon when forming the base electrode and dry etching of the insulating film when forming the sidewall. enter. As a result, the diffusion rate of impurities in the base and emitter regions changes, and the impurity distribution in each region changes. In addition, a leak current flows between the base and the emitter. Therefore, the variation in device characteristics of the bipolar transistor is further increased.

Therefore, an object of the present invention is to provide a method for forming a bipolar transistor that solves the above problems.

[0008]

The present invention for achieving the above object is a method of forming a bipolar transistor in a semiconductor substrate in which a collector region formed by diffusing a first conductivity type impurity is buried. In the first step, first,
An emitter region protection pattern is formed on a predetermined surface of the semiconductor substrate, and sidewalls made of an insulating material are formed on the sidewalls of the pattern. Then, a second conductivity type impurity is introduced from the exposed surface of the semiconductor substrate so as to enter below the sidewall. In the next second step, a base electrode forming layer containing a second conductivity type impurity is formed on the semiconductor substrate. Then, a second conductivity type impurity is introduced into the semiconductor substrate from the base electrode forming layer and the base electrode forming layer is etched to form a base electrode. Then, in a third step, an insulating layer is formed so as to cover the base electrode and expose the surface of the emitter region protection pattern. Then, the emitter region protection pattern is removed by etching to expose a predetermined surface, and a second conductivity type impurity is introduced into the semiconductor substrate from there. Next, in a fourth step, an emitter electrode forming layer containing an impurity of the first conductivity type is formed in a state of being connected to the predetermined surface of the semiconductor substrate. Thereafter, an impurity of the first conductivity type is introduced into the semiconductor substrate from the emitter electrode forming layer and the emitter electrode forming layer is etched to form an emitter electrode.

In the first step, a lower layer thin film may be formed below the emitter region protection pattern as follows. First, an insulating lower layer thin film is formed on the semiconductor substrate. Then, the emitter region protection pattern is formed on this, and the sidewall is formed. Then, the exposed portion of the lower layer thin film is removed by etching.

In this case, the emitter region protection pattern may be formed of polysilicon containing phosphorus, and the sidewalls may be formed of an oxide film grown on the exposed surface of the emitter region protection pattern.

Further, when forming a lower layer thin film under the emitter region protection pattern, first, a lower layer thin film is formed on the semiconductor substrate to form the emitter region protection pattern. Then, the exposed portion of the lower layer thin film is removed by etching. Then, the sidewalls are formed on the sidewalls of the emitter region protection pattern and the lower layer thin film.

When the lower layer thin film is formed as the lower layer of the emitter region protection pattern as described above, the third step is performed as follows. First, an insulating layer similar to that described above is formed, and then the emitter region protection pattern is removed by etching. Then, a second conductivity type impurity is introduced into the semiconductor substrate from a predetermined surface of the semiconductor substrate, and the exposed portion of the lower layer thin film is removed by etching to expose the predetermined surface of the semiconductor substrate. The etching of the lower layer thin film may be wet etching.

In the method for forming the bipolar transistor, the surface layer on the exposed surface of the semiconductor substrate may be etched after the second conductivity type impurity is introduced into the semiconductor substrate in the first step.

[0014]

In the above method of forming the bipolar transistor,
Since the base electrode forming layer is etched with the predetermined surface of the semiconductor substrate covered with the emitter region protection pattern,
The predetermined surface is protected from etching species. Therefore, when the base electrode made of polysilicon having an etching selection ratio to silicon of about 1 is formed on the silicon substrate, the predetermined surface of the semiconductor substrate is not over-etched. Then, the predetermined surface and the collector region embedded in the semiconductor substrate are kept at a predetermined distance. Further, a base region and an emitter region are formed from this predetermined surface by introducing impurities of the first conductivity type and impurities of the second conductivity type. Therefore, the collector region and the base and emitter regions are kept at a predetermined distance.

Further, in the method for forming a bipolar transistor in which the emitter region protection pattern is formed on the semiconductor substrate via the lower layer thin film, the lower layer thin film may be removed by low energy etching when exposing the predetermined surface. . Therefore, the predetermined surface of the semiconductor substrate is not physically damaged by etching. Therefore, the diffusion rate of the impurities introduced into the semiconductor substrate from the predetermined surface is kept in a predetermined state near the surface layer of the semiconductor substrate. And
In the base region and the emitter region formed by the first conductivity type impurities and the second conductivity type impurities introduced from the predetermined surface, the diffusion state of the impurities is stabilized.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIG. In the embodiment, the embodiment will be described by taking the case of forming an npn junction bipolar transistor as an example. As shown in FIG. 1A, a semiconductor substrate 1 on which a base electrode and an emitter electrode of a bipolar transistor are formed.
No. 1 is a p-type silicon substrate 111 having a second conductivity type (hereinafter, the second conductivity type is referred to as p-type) on a silicon substrate 111 and having a specific resistance of 1 Ωcm.
An epitaxial layer 112 of n-type silicon (hereinafter, referred to as the first conductivity type is n-type), which is a conductivity type, is grown to have a film thickness of about 1 μm. An element isolation region 12 is formed in a predetermined region on the upper layer of the semiconductor substrate 11. The element isolation region 12 is formed by a normal LOCOS oxidation method. A collector region 13 is formed on the semiconductor substrate 11. This collector region 13
Is an N ⁺ buried layer 131 and a collector extraction layer 132
Consists of. The N ⁺ buried layer is the p-type silicon substrate 11
1 is a region where, for example, n-type impurity antimony ions (Sb ⁺ ) are implanted and diffused. The collector extraction layer 132 is a region in which, for example, phosphorus ions of an n-type impurity are implanted and diffused in the epitaxial layer 112. An oxide film 14 is formed on the surface of the semiconductor substrate 11, and a channel stop diffusion layer 15 formed by diffusing, for example, boron ions that are p-type impurities is formed on the lower surface of the element isolation film 12.

The first step of forming a bipolar transistor on the semiconductor substrate 11 formed as described above is performed as follows. First, a resist pattern (not shown) is formed on the upper surface of the oxide film 14. Then, using this resist pattern as a mask, the oxide film 14 is etched so as to expose the surface of the semiconductor substrate 11 where the emitter base region is to be formed.

Next, the emitter region protection pattern 10 is formed on the predetermined surface 11a of the semiconductor substrate 11 to which the emitter electrode is to be connected. This emitter area protection pattern 1
0 is formed as follows, for example. First, CVD
A silicon nitride film having a film thickness of about 500 nm is formed on the semiconductor substrate 11 by the method. After that, a silicon oxide film with a thickness of about 100 nm is formed on this silicon nitride film by the CVD method. A resist pattern is formed on this silicon oxide film. Then, using the resist pattern as a mask, the silicon oxide film and the silicon nitride film are etched to form an emitter region protection pattern 10 having a two-layer structure of an upper silicon oxide film and a lower silicon nitride film. The emitter region protection pattern 10 is formed by using a material that can have a large etching selection ratio between the base electrode and the semiconductor substrate 11 which will be formed in the next step.

Next, a sidewall 10a made of an insulating material is formed on the sidewall of the emitter region protection pattern 10. Here, for example, an oxide film is formed with a film thickness of about 200 nm by the CVD method. Then, the oxide film is etched back so that the oxide film remains on the sidewall of the emitter region protection pattern 10, and the sidewall 1 is formed by this oxide film.
0a is formed.

Then, from the exposed surface of the semiconductor substrate 11, BF ₂ ⁺ as p-type impurities is introduced into the semiconductor substrate 11.
Inject ions. This ion implantation is performed while rotating the semiconductor substrate 11 at an implantation energy of 60 keV and an incident angle of 45 degrees, and implants up to a dose amount of about 3E13 / cm ² . After that, the implanted ions are diffused into the semiconductor substrate 11, and the semiconductor substrate 1 below the sidewall 10a is diffused.
A connection base region 16 is formed so as to enter the inside of 1.

After the first step, the second step of the method for forming the bipolar transistor shown in FIG. 1B is performed.
In the second step, first, the semiconductor substrate 11 is covered with the emitter region protection pattern 10 and the sidewall 10a.
A base electrode forming layer 17 containing p-type impurities is formed thereon. The base electrode forming layer 17 is formed as follows, for example. First, 300 nm on the semiconductor substrate 11
Polysilicon is deposited to a film thickness of. After that, for example, BF ₂ ⁺ which is a p-type impurity as a second conductivity type impurity is implanted into the polysilicon with an implantation energy of 50 keV up to a dose amount of 5E15 / cm ² . In this way p
A base electrode forming layer 17 containing a type impurity is formed.

Thereafter, the base electrode forming layer 17 is heat-treated at 850 ° C. to activate the impurities implanted therein and diffuse the impurities from the base electrode forming layer 17 into the semiconductor substrate 11 to obtain a graft base. Area 18
To form. The base electrode forming layer 17 may be formed of amorphous silicon or a polycide structure of lower layer polysilicon doped with p ⁺ -type impurity B ⁺ and upper layer silicide.

Next, the base electrode forming layer 17 is etched to form a base electrode 19. Here, first, a resist (not shown) is applied to the upper surface of the base electrode forming layer 17. Then, the resist and the base electrode forming layer 17 are etched back until the silicon oxide film on the surface of the emitter region protection pattern 10 is exposed to flatten the surface. Then, a resist pattern (not shown) is formed on the flattened surface. Then, the base electrode forming layer 17 is etched using the resist pattern as a mask to form a base electrode 19.

After the second step, the third step of the method for forming the bipolar transistor shown in FIG. 1C is performed.
In the third step, first, the insulating layer 20 is formed so as to cover the base electrode 19 and expose the surface of the emitter region protection pattern 10. The insulating layer 20 is formed as follows. First, the semiconductor substrate 11 on which the base electrode 19 is formed
An insulating material such as an oxide film is CVed over the entire upper surface of the
A 400 nm-thickness is deposited by the D method. afterwards,
Here, a resist (not shown) is applied to the entire surface. Then, the resist and the insulating material are etched back from the resist surface until the silicon oxide film on the surface of the emitter region protection pattern 10 is exposed to flatten the surface. In this way, the insulating layer 20 made of an insulating material is formed. The insulating layer 20 is formed of SOG (Spin On Glass).
Alternatively, an oxide film may be formed by etching, and the surface of the SOG film may be flattened by etching back or CMP (Chemical Mechanical Polishing).

Next, the emitter region protection pattern 10 is formed.
Are selectively removed by etching. Then, the semiconductor substrate 1
The predetermined surface 11a of No. 1 is exposed. Here, first, the upper silicon oxide film of the emitter region protection pattern 10 is removed by dry etching. After that, the etching gas species are changed to selectively remove the lower silicon nitride film of the emitter region protection pattern 10.

Then, for example, BF ₂ which is a p-type impurity is introduced into the semiconductor substrate 11 from the predetermined surface 11a exposed above.
⁺ Is implanted at an implantation energy of 40 keV and an incident angle of 15 degrees up to a dose amount of 3E13 / cm ² . In this way, the authentic base region 21 is formed. In this ion implantation, the incident angle is adjusted according to the crystal orientation of the semiconductor substrate 11 in order to prevent the implanted impurities from penetrating deep into the semiconductor substrate.

After the third step, the fourth step of the bipolar transistor forming method shown in FIG. 1D is performed.
In the fourth step, first, the predetermined surface 11a of the semiconductor substrate 11 is
An emitter electrode forming layer 22 containing an n-type impurity is formed in a state of being connected to. Here, polysilicon is deposited on the exposed surfaces of the insulating layer 20 and the semiconductor substrate 11 by CVD at a temperature of 620 ° C. and a thickness of 150 nm. Then, arsenic ions, for example, as n-type impurities are implanted into the entire surface of the polysilicon at 45 keV up to a dose amount of 1.5E16 / cm ² . Then, an emitter electrode formation layer 22 is formed by diffusing n-type impurities in polysilicon. The emitter electrode forming layer 22 may be formed of amorphous silicon, or a polycide structure of lower layer polysilicon containing n-type impurities and upper layer silicide in addition to the above polysilicon.

After that, the emitter electrode forming layer 22 is etched to form the emitter electrode 22. here,
A resist pattern (not shown) is formed on the emitter electrode formation layer 22. Then, the emitter electrode forming layer 22 is etched using the resist pattern as a mask to form the emitter electrode 23.

Next, a BPSG (Boro-Phospho-Silicate-Glass) film (not shown) is formed on the upper surfaces of the emitter electrode 23 and the insulating layer 20 and reflowed at 900.degree. In this way, the impurities in the emitter electrode 23 are diffused into the semiconductor substrate 11. Then, the emitter region 24 formed by diffusing the n-type impurities is formed in the semiconductor substrate 11. In this way, the bipolar transistor 1 is formed.

The bipolar transistor 1 formed by the above method has the BPSG film 2 as shown in FIG.
A contact hole 26 is formed at 5. Then, the wiring 27 is formed so as to be connected to the bottom surface of the contact hole 26. Then, a passivation film 28 is formed on the wiring 27 and the BPSG film 25.

In the method for forming the bipolar transistor, as shown in FIG. 1, when the base electrode 19 is formed, the base electrode forming layer 17 is formed with the predetermined surface 11a of the semiconductor substrate 11 covered with the emitter region protection pattern. Etching. Therefore, the predetermined surface 11a of the semiconductor substrate 11 is protected from the etching species. When the base electrode 22 made of polysilicon having an etching selection ratio to silicon of about 1 is formed on the silicon substrate, the predetermined surface 11a of the semiconductor substrate 11 is not overetched. Therefore, the predetermined surface 11a and the collector region 13 embedded in the semiconductor substrate 11 are kept at a predetermined distance. An authentic base region 21 and an emitter region 23 are formed by introducing impurities of the first conductivity type and impurities of the second conductivity type from the predetermined surface 11a.
Therefore, the collector region 13 and the genuine base region 2
1 and the emitter region 23 are kept at a predetermined distance.

Next, a second embodiment will be described with reference to FIG. As shown in FIG. 3A, in the semiconductor substrate 11 forming the base electrode and the emitter electrode of the bipolar transistor in the second embodiment, the collector region 13 is embedded inside similarly to the first embodiment. It is what The first step of forming a bipolar transistor on the semiconductor substrate 11 is performed as follows. First, the oxide film 14 is etched so as to expose the surface of the semiconductor substrate 11 where the emitter base region is to be formed. Next, the lower layer thin film 31 made of an insulating material and having a film thickness of about 10 nm is formed on the semiconductor substrate 11. The lower thin film 31 is formed of a thermal oxide film formed by oxidizing the exposed surface of the semiconductor substrate 11 by thermal oxidation, for example.

Then, an emitter region protection pattern 30 similar to that of the first embodiment is formed on the lower layer thin film 31 which is above the predetermined surface 11a to which the emitter electrode of the semiconductor substrate 11 is to be joined. Then, sidewalls 30a made of an insulating material are formed on the sidewalls of the emitter region protection pattern 30 in the same manner as in the first embodiment. After that, the exposed portion of the lower layer thin film 31 is removed by etching. Then, in the same manner as in the first embodiment described above, p
A type impurity is introduced to form a connecting base region 32.

After the above first step, the second step of the method for forming a bipolar transistor shown in FIG. 3B is performed.
In the second step, the base electrode forming layer 33a is formed to form the base electrode 33 in the same manner as in the first embodiment.
Further, the graft base region 34 is formed.

After the second step, the third step of the method for forming a bipolar transistor shown in FIG. 3C is performed.
In the third step, first, similarly to the first embodiment, the insulating layer 35 is formed while covering the base electrode 33 and exposing the surface of the emitter region protection pattern 30. Then, the emitter region protection pattern 30 is removed by etching.

Then, the semiconductor substrate 1 is formed on the lower thin film 31.
BF ₂ ⁺ , which is a p-type impurity, is injected into
Dose amount 3E13 / cm ^{2 at 0} keV and 15 degree incident angle
And then the impurity is diffused into the semiconductor substrate 11. In this way, the authentic base region 36 is formed.

Next, the exposed portion of the lower thin film 31 shown by the broken line is removed by wet etching, and the semiconductor substrate 11 is removed.
The predetermined surface 11a of is exposed. In the wet etching of the lower layer thin film 31, the exposed surface of the sidewall 30a made of the same silicon oxide film as the lower layer thin film 31 is also etched. However, the thickness of the lower thin film 31 is 10 to 15 n.
Since the thickness is m, the sidewall 30a is not entirely etched.

After the third step, the fourth step of the method for forming the bipolar transistor shown in FIG. 3D is performed.
In the fourth step, similarly to the first embodiment, the emitter electrode forming layer 37a is formed to form the emitter electrode 37, and further the emitter region 38 is formed. And
An npn-junction bipolar transistor 3 is formed.

In the method of forming the bipolar transistor of the second embodiment, the semiconductor substrate 1 is formed as in the first embodiment.
The base electrode 33 is formed with the predetermined surface 11a of No. 1 covered with the emitter region protection pattern 30. Therefore, the collector region 13 and the authentic base 16 are the same as in the first embodiment.
And the emitter region 38 are kept at a predetermined distance. Further, since the emitter region protection pattern 30 is formed on the semiconductor substrate 11 via the lower layer thin film 31, the lower layer thin film 31 may be etched with low energy when exposing the predetermined surface 11a. Therefore, the semiconductor substrate 1
It is possible to prevent physical damage due to etching from entering the predetermined surface 11a of No. 1. Therefore, the semiconductor substrate 1 of the impurities introduced into the semiconductor substrate 11 from the predetermined surface 11a.
The diffusion rate near the surface layer of No. 1 is maintained in a predetermined state.

Next, a third embodiment will be described with reference to FIG. As shown in FIG. 4 (1), the semiconductor substrate 11 forming the base electrode and the emitter electrode of the bipolar transistor in the third embodiment has the same structure as in the first and second embodiments. is there. The first step of forming a bipolar transistor on the semiconductor substrate 11 is performed as follows. First, the oxide film 1 is exposed to expose the surface of the semiconductor substrate 11 where the emitter base region is formed.
Etch 4. Next, as in the second embodiment, the lower thin film 41 made of an insulating material is formed on the semiconductor substrate 11.

Thereafter, an emitter region protection pattern 40 made of polysilicon containing phosphorus is formed on the lower layer thin film 41 which is above the predetermined surface 11a to which the emitter electrode of the semiconductor substrate 11 is to be joined. The emitter region protection pattern 40 is formed as follows. First,
By a CVD method using a reaction gas added with a gas containing phosphorus, 650 nm of polysilicon doped with phosphorus at 8E20 / cm ³ or more is deposited. Next, a resist pattern is formed on the deposited polysilicon by lithography. Using the resist pattern as a mask, the polysilicon is anisotropically etched so that the polysilicon remains above the predetermined surface 11a. Thus, the emitter region protection pattern 42 made of polysilicon containing phosphorus is formed. The film of polysilicon doped with phosphorus may be formed by first depositing polysilicon and then doping the polysilicon with phosphorus.

Next, a sidewall 40a made of an insulating material is formed on the sidewall of the emitter region protection pattern 40. Here, first, the emitter region protection pattern 4 made of polysilicon is formed by steam oxidation at 750 ° C.
An oxide film of about 150 nm is grown on the exposed surface of 0. The oxide film grown on the side wall of the emitter region protection pattern 40 is used as the side wall 40a. Next, the exposed portion of the lower thin film 41 is removed by etching with low energy.
At this time, the oxidation rate of the silicon substrate in the steam oxidation is about 1/6 of the oxidation rate of polysilicon containing phosphorus. Therefore, the lower thin film 41 made of a silicon oxide film
The oxide film thickness of the semiconductor substrate at the portion where the
The film thickness including 1 can be suppressed to about 25 nm. Therefore, by removing the lower thin film 41 by etching, the film loss of the element isolation film 12 can be suppressed small.

Next, as in the first and second embodiments, the connecting base region 42 is formed.

After the above-mentioned first step, FIGS.
Second method of forming bipolar transistor shown in (4)
~ The 4th process is performed like the said 2nd Example. In this way, the npn junction bipolar transistor 4 is formed.

In the method of forming the bipolar transistor according to the third embodiment, it is not necessary to etch the insulating film material when forming the sidewall 40a of the emitter protection pattern 40. Therefore, in comparison with the second embodiment, physical damage is less likely to occur on the surface of the semiconductor substrate 31 when the sidewall 43 is formed. In this way, the connecting base region 42 and the graft base region 44
The diffusion rate of the impurities injected into the semiconductor substrate 11 for forming the is stabilized. Therefore, the connecting base region 4
2 and the distribution state of impurities in the graft base region 44 are stabilized.

Next, a fourth embodiment will be described with reference to FIG. As shown in FIG. 5A, in the semiconductor substrate 11 forming the base electrode and the emitter electrode of the bipolar transistor in the fourth embodiment, the collector region 13 is buried as in the first to third embodiments. It is what The first step of forming a bipolar transistor on the semiconductor substrate 11 is performed as follows. First, the first to the above
Similar to the third embodiment, the oxide film 14 is formed so as to expose the surface of the semiconductor substrate 11 where the emitter base region is formed.
To etch. Next, the lower thin film 51 is formed on the semiconductor substrate 11. The lower thin film 51 is formed of a material such as a silicon nitride film having a large etching selection ratio with the semiconductor substrate 11 made of silicon.

Next, the lower thin film 5 which is above the predetermined surface 11a to which the emitter electrode of the semiconductor substrate 11 is to be joined.
An emitter region protection pattern 50 is formed on the substrate 1 in the same manner as in the second and third embodiments.

After that, the exposed portion of the lower thin film 51 is removed by etching. Then, sidewalls 50a made of an insulating material are formed on the sidewalls of the lower thin film 51 and the emitter region protection pattern 50. The sidewall 50a is formed by the same method as in the first and second embodiments.

Further, the connecting base region 52 is formed in the same manner as in the first to third embodiments.

Thereafter, the second to third steps shown in FIGS. 5 (2) to 5 (4) are performed in the same manner as in the second and third embodiments.

In the above bipolar transistor forming method, the lower layer thin film 51 does not remain under the sidewall 50a. Therefore, the material of the lower layer thin film 51 is not limited to an insulating material such as a silicon oxide film. Therefore, by forming the lower layer thin film 51 with a material having a large etching selection ratio with respect to the sidewall 50a and the semiconductor substrate 11 made of silicon, the sidewall 50 is etched in the step of removing the lower layer thin film 51 shown in FIG. 5C. Can be prevented. Therefore, the insulating state between the base electrode 53 and the emitter electrode 57, which are insulated by the sidewall 50a, becomes more reliable.

Next, a fifth embodiment will be described with reference to FIG. As shown in FIG. 6A, the semiconductor substrate 11 forming the base electrode and the emitter electrode of the bipolar transistor in the fifth embodiment has the same structure as in the first to fourth embodiments. is there. The first step of forming a bipolar transistor on the semiconductor substrate 11 is performed as follows. First, the oxide film 14 is etched so that the surface of the semiconductor substrate 11 where the emitter base region is formed is exposed as in the first to fourth embodiments.

Next, the emitter region protection pattern 60 is formed on the predetermined surface 11a of the semiconductor substrate 11 on which the emitter electrode is to be joined by one of the methods of the first to fourth embodiments.
And a sidewall 60a are formed. Then, the connecting base region 62 is formed in the same manner as in the first to fourth embodiments. Then, the surface layer of the exposed surface of the semiconductor substrate 11 is reduced to 30
Anisotropically etch about 0 nm.

After the above-mentioned first step, FIGS.
In the second to third steps shown in (4), one of the first to fourth embodiments is selected depending on the structure of the emitter region protection pattern 60, and the bipolar transistor 6 is formed accordingly.

In this method, the surface of the semiconductor substrate 11 to which the base electrode is joined is dug below the predetermined surface 11a. Therefore, the graft base region 64 formed in the second step shown in FIG. 6B is formed so as to extend below the predetermined surface 11a. And FIG.
The bonding state between the genuine base region 66 and the graft base region 64 formed in the third step shown in (3) is further stabilized.

As described above, in the first to fifth embodiments, the first conductivity type is n-type and the second conductivity type is p-type. However, in each of the above embodiments, the first conductivity type may be p-type and the second conductivity type may be n-type.

[0057]

As described above, according to the present invention, the base electrode is formed in a state in which the predetermined surface of the semiconductor substrate to which the emitter electrode is to be joined is covered with the emitter region protection pattern. It is possible to form the base electrode without overetching. Therefore, it is possible to form a bipolar transistor in which the genuine base region and the collector region formed in the semiconductor substrate below the predetermined surface are kept at a predetermined distance.
Further, in the method of forming the emitter region protection pattern via the lower layer thin film, since it is not necessary to perform high energy etching when exposing the semiconductor substrate, it is possible to prevent the predetermined surface from being physically damaged by etching. Therefore, it is possible to prevent the diffusion rates of the base impurities and the emitter impurities diffused from the predetermined surface into the semiconductor substrate from varying, and it is possible to stabilize the impurity distribution in the emitter region and the genuine base region. From the above, according to the present invention, the device characteristics of the bipolar transistor can be stabilized.

[Brief description of drawings]

FIG. 1 is a process drawing of a first embodiment.

FIG. 2 is a cross-sectional view of a semiconductor device using a bipolar transistor of an example.

FIG. 3 is a process drawing of the second embodiment.

FIG. 4 is a process drawing of the third embodiment.

FIG. 5 is a process drawing of the fourth embodiment.

FIG. 6 is a process drawing of the fifth embodiment.

FIG. 7 is a process diagram of a conventional example.

[Explanation of symbols]

1, 3, 4, 5, 6 Bipolar transistor 10, 30, 40, 50, 60 Emitter region protection pattern 10a, 30a, 50a, 60a Side wall 11 Semiconductor substrate 11a Predetermined surface 13 Collector region 17, 33a Base electrode formation layer 19 , 33, 53 Base electrode 20, 35 Insulating layer 22, 37a Emitter electrode forming layer 23, 37, 57 Emitter electrode 31, 41, 51 Lower layer thin film

Claims (6)

[Claims] 1. A method of forming a bipolar transistor on a semiconductor substrate in which a collector region formed by diffusing a first conductivity type impurity is embedded, the method comprising: forming a bipolar transistor on a predetermined surface of the semiconductor substrate to which an emitter electrode is to be joined. After forming the emitter region protection pattern and forming a sidewall made of an insulating material on the side wall of the emitter region protection pattern, a second layer is formed in the semiconductor substrate in such a manner that the exposed region of the semiconductor substrate enters below the sidewall. A first step of introducing impurities of the second conductivity type; and forming a base electrode forming layer containing impurities of the second conductivity type on the semiconductor substrate in a state of covering the emitter region protection pattern and the sidewalls, The second conductivity type impurity is introduced into the semiconductor substrate from the base electrode forming layer, and the base electrode forming layer is etched. A second step of forming a base electrode by etching, forming an insulating layer in a state of covering the base electrode and exposing the surface of the emitter region protection pattern, and then etching away the emitter region protection pattern and A second surface is formed in the semiconductor substrate from a predetermined surface of the semiconductor substrate.
A third step of introducing a conductivity type impurity; forming an emitter electrode forming layer containing a first conductivity type impurity in a state of being connected to a predetermined surface of the semiconductor substrate, and forming the semiconductor electrode from the emitter electrode forming layer. A method for forming a bipolar transistor, which comprises performing a fourth step of forming an emitter electrode by introducing an impurity of the first conductivity type into a substrate and etching the emitter electrode forming layer. 2. The method for forming a bipolar transistor according to claim 1, wherein in the first step, a lower layer thin film made of an insulating material is formed on the semiconductor substrate, and the lower layer above a predetermined surface of the semiconductor substrate. After forming an emitter region protection pattern on the thin film, a sidewall made of an insulating material is formed on a sidewall of the emitter region protection pattern, and then an exposed portion of the lower thin film is removed by etching, and then an exposed surface of the semiconductor substrate is formed. A second conductivity type impurity is introduced into the semiconductor substrate under the side wall of the semiconductor substrate and the second step is performed, and then the base electrode is covered in the third step. In addition, after forming an insulating layer with the surface of the emitter region protection pattern exposed, the emitter region protection pattern is etched. The second conductive type impurities are introduced into the semiconductor substrate from a predetermined surface of the semiconductor substrate, and the exposed portion of the lower thin film is removed by etching to expose the predetermined surface of the semiconductor substrate. 4. A method of forming a bipolar transistor, characterized in that the step 4 is performed. 3. The method for forming a bipolar transistor according to claim 2, wherein the emitter region protection pattern is formed of polysilicon containing phosphorus, and the sidewall is grown on an exposed surface of the emitter region protection pattern. A method of forming a bipolar transistor, which is characterized in that it is formed of a film. 4. The method for forming a bipolar transistor according to claim 1, wherein in the first step, a lower layer thin film is formed on the semiconductor substrate, and the emitter is formed on the lower layer thin film above a predetermined surface of the semiconductor substrate. After forming the region protection pattern, the exposed portion of the lower layer thin film is removed by etching, and then a sidewall made of an insulating material is formed on the sidewalls of the emitter region protection pattern and the lower layer thin film, and then the semiconductor substrate is exposed. An impurity of the second conductivity type is introduced into the semiconductor substrate in a state where the second conductive type impurity is introduced into the semiconductor substrate from the surface, and in the third step, the base electrode is covered and in the third step. After forming an insulating layer with the surface of the region protection pattern exposed, the emitter region protection pattern is removed by etching, A second conductivity type impurity is introduced into the semiconductor substrate from a predetermined surface of the semiconductor substrate, the lower layer thin film is removed by etching to expose the predetermined surface of the semiconductor substrate, and the fourth step is performed. And method for forming bipolar transistor. 5. The method for forming a bipolar transistor according to claim 2, 3 or 4, wherein the etching of the lower layer thin film in the third step is performed by wet etching. 6. The method of forming a bipolar transistor according to claim 1, wherein the semiconductor of the second conductivity type is formed after the impurity of the second conductivity type is introduced into the semiconductor substrate in the first step. A method for forming a bipolar transistor, which comprises etching a surface layer of an exposed surface of a substrate.