JPH07154870A - Home controller - Google Patents

Abstract

PURPOSE:To provide a home controller capable of discriminating valid system data even when the rewriting processing of the system data is interrupted and further restoring the data to a usable state as much as possible. CONSTITUTION:A memory area is constituted of two blocks (a) and (b) and when the existing system data are stored in one of the blocks (a) and (b), the new system data are written in the system data area 14b or 14a of the other block (b) or (a). At the time of writing the data, respective data area 15a-18a and 15a-18b are changed by a prescribed procedure. When a write processing is interrupted, at the time of restoration, the data of the respective data areas 15a-18a and 15b-18b are referred to, a state in which a write operation is interrupted, is judged and the adandonment or preservation of the written data and the restoration of the entire system data are selectively performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a home automation system, and more particularly to a home controller having a non-volatile memory.

[0002]

2. Description of the Related Art In recent years, various devices in the home are connected by a network to realize various systemized services.
So-called home automation systems are widespread.

FIG. 20 is a conceptual diagram of a home automation system, which is a video system terminal such as a camera, an antenna, a television, a communication system terminal such as an intercom, an information system terminal such as a personal computer, a smoke detector, and a gas detector. , Security terminals such as crime prevention switches and electronic keys, device terminals such as air conditioners, baths, and lighting, and a home controller are connected to a home bus via an information signal connector. A signal line from the outside such as a telephone line is also connected to the home controller, and various service functions such as telephone, intercom, security, device control, and telecontrol can be realized.

FIG. 21 is a block diagram showing a general configuration example of a home controller which is the heart of the home automation system. Home controller 50
1 is an interface unit 503 for the home bus 502.
A control unit 505, an I / O (Input / Output) unit 506, and a memory unit 512 are included. The I / O unit 506 includes a key input unit, a display unit, a voice input / output unit, and the like. The memory unit 512 of the home controller 501 has a memory area 509 for storing a system program and an application program of the home automation system.
And a memory area 510 for storing system data
And a memory area 511 to be used for work when the program is executed. Generally, a ROM (Read Only Memory) is used for the memory area 509 of the memory unit 512, and a RAM (Random Access Memory) is used for the memory area 511. Further, the memory area 510 has an EEPROM.
(Electrically Erasable and Programable Read Only
Memory) or SR backed up by battery
AM (Static Random Access Memory) is used.

By the way, regarding the functions that can be realized by home automation systems, they will become more and more new in the future due to changes in the social environment, trends in user needs, enhancement of terminal equipment accompanying technological advances, and maintenance of communication networks. It is expected that various technologies will be proposed. On the other hand, the home automation system, which is a residential facility, is installed once and then used for a long period of time thereafter.

As described above, it is necessary for the home automation system to be configured so that it can be used for a long period of time while having the expandability of future functions. As a proposal for this, in the related art, in Japanese Patent Laid-Open No. 2-265395, a memory of a memory unit 512 of the conventional example shown in FIG. Areas 509, 510,
A home bus system having the function of adding any or all of the storage means corresponding to 511 is shown.

[0007]

However, Japanese Patent Laid-Open No. 2-2
In the technique proposed in Japanese Patent No. 65395, it is necessary to newly add hardware called a memory card. Therefore, there are costs associated with changing or expanding the contents of the home automation system. By the way, recently, a flash memory has attracted attention as a nonvolatile memory that has a large capacity, a low unit price per bit, and is electrically erasable and rewritable. If this flash memory is used as the memory area 509 for storing the system program and application program of the memory unit 512 of the home controller 501 shown in FIG. 21 and the memory area 510 for storing the system data, the contents of the system will be improved. Can be easily performed by rewriting the contents of the memory without adding additional hardware as in the conventional case when changing or expanding. Further, conventionally, two types of memories, a ROM for storing a system program and an application program, and a RAM for storing system data, were required as the memory unit 512, but both of them are provided by one flash memory. By configuring, the number of parts can be reduced and the device can be downsized.

The home automation system has a different optimum configuration depending on the installation environment (individual home), and it is necessary to configure the product according to each installation environment. Therefore, when the device is produced, it is inevitably a high-mix low-volume production. Since the hardware configuration of the conventional device differs depending on the individual product, there is a possibility that the assembly cost and the component procurement cost may increase. However, in the case of a device configured using a flash memory, it is possible to easily set data according to the installation environment of each home by simply changing the stored contents of the memory individually.

Data modification (rewriting) in the home automation system will be described. Rewriting of the memory area storing the system program and application program of the home automation system is usually performed by a specialized worker at the time of manufacturing or when the system is changed or expanded. Therefore, even if some abnormality occurs in the middle of the rewriting work, since the worker has the specialized knowledge, it is possible to deal with the failure relatively easily. On the other hand, the system data of the home automation system is set or changed by an actual user in each home where the home automation system is installed according to the purpose, environment, and taste. In this case, the person who uses the home automation system is not an expert who is skilled in machine operation, but a housewife, a child in an ordinary household, or people who are unfamiliar with machine operation, such as an old man. Therefore, ensure the reliability of the system so that valuable data will not be lost even if a power failure occurs and the device abnormally stops while these general persons are rewriting the system data. is important.

Meanwhile, the flash memory has a drawback that data can be erased only in a predetermined unit (block unit) when rewriting the data. Problems in using the flash memory due to this drawback will be described.

FIG. 22 shows memory areas 509 and 51 of the memory unit 512 of the home controller 501 shown in FIG.
3 is a schematic diagram showing a configuration example of a memory space when the flash memory 507 is used for 0. FIG. In the figure, the flash memory 507 is divided into n blocks,
The n−2 blocks are used in the memory area 509, and the two blocks are used in the memory area 510. The two blocks included in the memory area 510 are referred to as block a and block b in the following description.

The flash memory 5 configured in this way
Consider the case of storing system data in 07. The system data is written in the block a by a specialist at the time of manufacturing or installation. When changing the contents of the system data, the new system data is stored in the block b.
Write to. After that, the contents of the block a which has become the old system data are erased. When the contents of the system data are changed again, the new system data is written in the block a, and then the contents of the block b are erased. As described above, when the system data is stored in the flash memory and the content thereof is changed, writing and erasing are alternately repeated between the plurality of blocks. In the following description, writing and erasing of system data are alternately repeated using a plurality of blocks, and existing system data stored in one block is written with new system data in another block. Replacing with is called "rewriting between blocks".

The problem here arises when an abnormal situation such as a power failure occurs while writing new system data in the block a or the block b, and the rewriting operation is interrupted midway. For example, when the system data before the change is stored in the block b and the system data after the change is stored in the block a, in the process of performing the rewriting operation between the blocks, the block a being written and the block before the change are stored. The system data exists in both the block b and the system data in which the system data is written. In such a state, if the operation of the system is interrupted due to a power failure or the like, the home controller 501 cannot determine which block, block a or block b, is valid system data. Will be lost.

The present invention has been made to solve the above-mentioned problems, and when a non-volatile memory such as a flash memory is used, an abnormal situation may occur during the rewriting of data between blocks. At the time of recovery when it occurs, the rewriting state between blocks is detected to determine the valid data to be used, and whether the data can be restored is determined. It is an object of the present invention to provide a home controller that can be made to perform.

[0015]

In order to achieve the above-mentioned object, the invention according to claim 1 is a home controller for controlling household appliances via a home bus.
A control data storage unit including a non-volatile memory and including two blocks for storing control data; and two first data corresponding to each of the two blocks, including a non-volatile memory. First to store
And a non-volatile memory.
Second data storage means for storing two second data corresponding to each of the two blocks, and the household based on the control data stored in any one of the two blocks. Of the two blocks by the writing means, a signal generating means for generating a signal for controlling a device for use, a writing means for writing the control data in each of the two blocks, Of 1
After writing the control data to one block,
The first data corresponding to the one block
From the first state to the second state, and then the first data switching means for switching from the second state to the first state, and the first data from the first state to the second state.
After switching to the second state, and before switching to the second state, the second data of either one of the two second data is changed from the third state to the third state. No. 4 state, and second data switching means for switching the other second data from the fourth state to the third state, the two first data and the two second data.
And a determination means for determining which of the two blocks is to be the one of the two blocks based on the data.

According to a second aspect of the present invention, a non-volatile memory is provided, and a third data storage means for storing the third data and a part of the predetermined data included in the control data are stored. After the writing by the writing means to one block is completed, the third data is switched from the fifth state to the sixth state, and then from the sixth state to the fifth state. Third data switching means for switching, and other part except the part of the data included in the control data is read from another block different from the one block by referring to the third data. Read / write means for writing to the one block.

The invention according to claim 3 further includes a data buffer area formed of a non-volatile memory, wherein the writing means includes buffer writing means for writing control data in the data buffer area, and Buffer read means for reading the data stored in the buffer write means and writing the data in the block, wherein the home controller further includes: when the write operation by the write means is interrupted due to an abnormality. In order to recover the data, a part of the control data other than the part written in the block is read from the data buffer area and written in the block.

According to a fourth aspect of the present invention, each of the two blocks includes a storage area that can be collectively erased.

According to a fifth aspect of the present invention, two blocks included in the control data storage means, two areas for storing the first data included in the first data storage means, and the second block. Two second data storage means included in
One of the areas for storing the data and the other is provided on the memory that can be collectively erased.

[0020]

According to the structure of claim 1, the home controller sends the signal generated by the signal generation means based on the control data stored in the control data storage means through the home bus, so that the home controller Control the equipment. The control data storage means includes two blocks for storing the control data, and the signal generation means uses the data of either one of the blocks. When changing the control data, the writing means writes the changed new control data in the other block different from the block in which the existing control data is stored. When the writing of the control data into one block by the writing unit is completed, the first data switching unit sets the first data corresponding to the other block different from the block in which the writing is completed to the first data. The state is switched to the second state, and then the second state is switched to the first state.

On the other hand, the second data switching means changes the first data from the first state to the second data by the first data switching means.
After being switched to the state of
Before switching from the first state to the third state, the second data of either one of the two second data is changed to the third data.
State is switched to the fourth state, and the other second data is switched from the fourth state to the third state.

Here, consider a case where an abnormality such as a power failure occurs and the control data changing process is interrupted. When the home controller is restored, the determining means determines which of the two blocks stores the control data to be used, based on the two first data and the two second data. To do. That is, the second data is
Indicates whether the corresponding block is in a state where the writing of control data has been completed. Therefore, when only one of the two second data is in the fourth state, the determining means determines which control data should be used by which block only by referring to the second data. Can be determined.

Further, when the control data is already written in one block and the writing of the new control data after the change in the other block is completed by the writing means. Both of the two second data are in the fourth state. During this period, the determination unit cannot determine which block of control data to use by only referring to the second data. This period is included in the period in which either one of the two first data is in the second state, and is divided into two blocks depending on which of the first data is in the second state. Which of the blocks stores the new control data after the change is indicated.

The determination means refers to the first data, and determines 2
If both first data are in the first state,
The block storing the control data to be used is determined by referring to the second data, and if either one of the first data is in the second state, the second data is By referring, the block storing the control data to be used is determined.

According to the structure of claim 2, the writing means is
After the writing of a part of the predetermined data included in the control data into one of the two blocks is completed, the third data switching means sets the third data to the fifth state. To the sixth state, and then from the sixth state to the fifth state. The read / write means is the third
If it is determined that the writing of some of the predetermined data included in the control data is completed by referring to the data of, the part of the writing included in the control data is completed. Other parts except the data of are read from the other block and written into the block. Further, when an error such as a power failure occurs, when the home controller is restored, if writing of a part of predetermined data is completed, the read / write means writes the block. It is possible to read the other part from the other block except the part of the data which has been completely written, write it to the block, and write the new control data after the change to the control data storage means.

According to the third aspect of the invention, the buffer writing means writes the control data in the data buffer area. The buffer reading means reads the control data stored in the data buffer area and writes it in the block. When an abnormality such as a power failure occurs and the writing operation by the writing unit is interrupted, the partial read / write unit is executed. The partial read / write means reads a part of the control data excluding the part already written in the block from the data buffer area and writes it in the block. As a result, the part of the control data that has been written in the data buffer area can be written in the block of the control data storage means and can be used for subsequent processing.

According to the structure of the fourth aspect, the data in the storage areas of the two blocks are collectively erased before writing the new control data after the change.

According to the structure of claim 5, one of the two blocks, one of the two first data and one of the two second data are stored in the same erasable memory. One of them can be erased collectively. Also, a first state or a second state of the first data, and a third state or a fourth state of the second data,
If the erase state of the memory is associated with each other, the erase of the control data stored in the block by the batch erase of the memory, the switching of the state of the first data, and the switching of the state of the second data are performed at the same time. Can be done.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Three embodiments embodying the present invention will be described below with reference to the drawings. Further, each embodiment exemplifies a configuration using a flash memory as a memory, but the present invention is not limited to the case of using a flash memory, and it can be similarly applied to other nonvolatile memories in general. Please note.

FIG. 1 is a block diagram showing the configuration of a home controller according to the first embodiment of the present invention. The home controller 1 includes an interface unit 3 for transmitting and receiving data to and from a home bus 2 connected to a home device (not shown), a control unit 5 for managing the operation of the home controller 1 as a whole, An I / O (Input / Output) unit 6 for performing key input, display / voice input / output, etc., a memory unit 12 for storing various data necessary for the operation of the home controller 1, and a memory unit 12 And a memory control unit 8 for managing storage of data.

The memory unit 12 has a first memory area 9 for storing system programs and application programs of the home automation system, a second memory area 10 for storing system data, and
It includes a third memory area 11 for providing a storage area for work of the control section 5 when the control section 5 executes the system program or the application program. Second
The memory controller 8 writes and erases data in the memory area 10.

In this embodiment, the first memory area 9 and the second memory area 10 are composed of the flash memory 7.

The second memory area 10 stores the system data area 14 for writing the system data and the rewriting start data for storing the data for indicating that the rewriting operation between the blocks of the system data (described later) has started. Area 15
And a rewriting end data area 16 for storing data for indicating that the rewriting operation between the blocks of the system data has ended, and for indicating whether or not the data stored in the block is data before rewriting. And the old and new display data area 17 for storing the data. The system data area 14, the rewriting start data area 15, the rewriting end data area 16, and the old and new display data area 17 are provided in each of the two blocks provided in the second memory area 10. It is what is done. The configuration of these two blocks will be described later with reference to FIG.

FIG. 2 is a schematic diagram showing the configuration of two blocks a and b provided in the second memory area 10. The block a includes a system data area 14a for storing system data, a rewrite start data area 15a, a rewrite end data area 16a, and a new display data area 17a. Similarly, the block b is the system data area 14b.
And rewriting start data area 15b and rewriting end data area 16
b and the old and new display data area 17b are included.

3 and 4 are flowcharts showing the procedure of the operation of the home controller 1 when the system data is changed by rewriting between blocks in this embodiment. In the following description, the rewriting start data, the rewriting end data, and the old and new display data will be described as "flags" for indicating set / reset on the program. Each flag is set by writing data in the data area, and is reset by erasing the memory content of each flag as the memory content of the block is erased.

First, in step (hereinafter, simply referred to as "S") 1, in response to a command from the control unit 5, the memory control unit 8 determines whether or not the rewriting start flag 15a of the block a is set. Find out. If the rewrite start flag 15a is set, the memory control unit 8 returns (Y in S1).
ES), it is determined that the system data is currently written in the block a. Then, the memory control unit 8 determines that new system data should be written in the block b.

Next, the memory control unit 8 checks whether or not the storage content of the block b has been erased (S2), and if the storage content of the block b has not been erased (N in S2).
O), the stored contents of block b are erased (S3). At this time, the system data area 14b included in the block b
The rewriting start flag 15b, the rewriting end flag 16b, and the old and new display flag 17b are all erased. This is because the flash memory erases data for each block.

Next, the memory controller 8 sets the rewrite start flag 15b of the block b (S4). Subsequently, when all writing to the block b is completed (S5), the memory control unit 8 sets the old / new display flag 17a of the block a (S6). After that, the memory control unit 8 sets the rewrite end flag 16b of the block b (S7). Further, the memory control unit 8 erases the stored contents of the block a (S8), and finishes the process of rewriting the system data from the block a to the block b.

On the other hand, if the rewriting start flag 15a of the block a is not set in S1 (S1).
No), the memory control unit 8 determines that the system data is not currently written in the block a, and subsequently checks whether or not the rewrite start flag 15b of the block b is set (S9). If the rewrite start flag 15b is set (YES in S9), the memory control unit 8 determines that the system data is currently written in the system data area 14b of the block b. In this case, the memory control unit 8 determines that new system data should be written in the block a.

Next, the memory control unit 8 checks whether or not the stored contents of the block a are erased (S10). If not erased (NO in S10), the stored contents of the block a are erased. (S11). Next, the memory control unit 8
Sets the rewrite start flag 15a of block a (S12). Then, the memory control unit 8 writes new system data in the system data area 14a of the block a (S13). When all the writing to the block a is completed, the memory control unit 8 sets the old and new display flags 17b of the block b (S14).

Thereafter, the memory control unit 8 sets the rewriting end flag 16a of the block a (S15). Then, the memory control unit 8 erases the stored contents of the block b (S16), and finishes the process of rewriting the system data from the block b to the block a.

If the rewriting start flag 15b of the block b is not set in S9 (S9).
NO), the memory control unit 8 determines that the system data is not currently written in the block a or the block b. Such a state usually occurs when the system data is not set, such as when the home controller 1 is manufactured or installed. In this case, the memory control unit 8
Writes the system data in block a. The block to which the system data is first written when the system data is not set may be either the block a or the block b.

Next, the memory control unit 8 checks whether or not the contents of the block a are erased (S17). If not erased (NO in S17), the contents of the block a are erased (S18). ). Next, the memory control unit 8 sets the rewrite start flag 15a of the block a (S19).
Then, the memory control unit 8 writes new system data in the block a (S20). When all the writing to the block a is completed, the memory control unit 8 sets the rewriting end flag 16a of the block a (S21).

Then, the memory control unit 8 checks whether or not the stored contents of the block b are erased (S22), and if not (NO at S22), the contents of the block b are erased (S23). ), The rewriting process of the system data ends. However, in this case, since there is no block in which old system data before rewriting is stored, to be precise, the system data is first written.

If an abnormal situation such as a power failure occurs while the above-described rewriting process between blocks of system data is being executed, the home controller 1 resets the system. At this time, the rewriting process between blocks is interrupted midway. The operation of the home controller 1 at the time of recovery from such an abnormal situation will be described below.

5 and 6 are flow charts showing the operation procedure when the home controller 1 is restored. First, S
At 24, in response to the command from the control unit 5, the memory control unit 8 checks whether or not the rewrite start flag 15a of the block a is set. If the rewrite start flag 15a is not set (NO in S24), the memory control unit 8 checks whether or not the rewrite start flag 15b of the block b is set (S25). Memory controller 8
If the rewrite start flag 15b is not set (NO in S25), it is determined that there is no system data in either block a or block b (S2).
6). Such a state occurs when the system data is not set at the time of manufacturing or installing the controller 1 as described above.

If the rewrite start flag 15b of the block b is set in S25 (YES in S25), the memory control unit 8 subsequently determines whether the rewrite end flag 16b of the block b is set. It is checked whether or not (S27). The memory control unit 8 uses the rewrite end flag 16
If b is set (YES in S27), currently,
System data is a block b system data area 14
It is determined that it is written in b (S29).

On the other hand, in step S24 described above, block a
If the rewriting start flag 15a is set (S24
In YES, the memory control unit 8 checks whether or not the rewrite start flag 15b of the block b is set (S).
30). If the rewrite start flag 15b is not set (NO in S30), the memory control unit 8 next checks whether or not the rewrite end flag 16a of the block a is set (S31).

The memory controller 8 rewrites the rewriting end flag 16a.
Is set (YES in S31), the system data is currently in the system data area 14a of block a.
(S33).

On the other hand, the memory control unit 8 does not set the rewriting end flag 16a of the block a (S31).
No), the stored contents of block a are erased (S3).
2). This operation is a process corresponding to the case where an abnormal situation occurs while the process of S20 shown in FIG. 4 is being executed. Such processing is required when the system data is first written by an expert when the controller 1 is manufactured or installed. In this case, since an expert who is an operator has proper knowledge for operating the controller 1, an operation of operating the home controller 1 to easily write the system data in the flash memory 7 after the system is reset. Can be done.

If the rewrite end flag 16b of the block b is not set in S27 (NO in S27), the memory controller 8 erases the stored contents of the block b (S28). However, in the present embodiment, when the system data is not set as shown in FIG. 4, the system data is written in the block a first (see S20 in FIG. 4), and therefore the process in S28 is normally performed. The required state does not occur.

Next, if system data exists in both block a and block b in S30 (S3).
The process of (YES at 0) will be described. Such a state occurs when an abnormal situation occurs during the rewriting process between blocks shown in FIG. 3 and the rewriting process is interrupted midway. At this time, the memory control unit 8 first checks whether or not the old / new display flag 17a of the block a is set (S34). If old and new display flag 17a is set (YES in S34), memory control unit 8
It is determined that the operation is interrupted immediately after the end of S6 of FIG. 3 during the process of rewriting the data from the block a to the block b.

Subsequently, the memory control unit 8 checks whether or not the rewriting end flag 16b of the block b is set (S35). If the rewriting end flag 16b is not set (NO in S35), the memory control unit 8 sets the rewriting end flag 16b of the block b (S3).
6). Next, the memory control unit 8 erases the contents of the block a (S37). In this case, the memory control unit 8 determines that the system data is written in the block b (S29), and sends a signal to that effect to the control unit 5.

If the old / new display flag 17a of the block a is not set in S34 (S3).
4, the memory control unit 8 checks whether or not the old / new display flag 17b of the block b is set (S).
38). If the old / new display flag 17b is set (YES in S38), the memory control unit 8 determines that the block b
During the process of rewriting the system data from the block to the block a, it is determined that the operation is interrupted immediately after the end of S14 of FIG. Then, the memory control unit 8 checks whether or not the rewrite end flag 16a of the block a is set (S
39), if the rewrite end flag 16a is not set (NO in S39), the rewrite end flag 16a is set (S40). Next, the memory control unit 8 uses the block b.
The stored contents of are deleted (S41). In this case, the memory control unit 8 determines that the system data is written in the block a (S33).

If the old / new display flag 17b of the block b is not set in S38 (N in S38).
O), the memory control unit 8 checks whether or not the rewrite end flag 16a of the block a is set (S42).
If the rewrite end flag 16a has been set (YES in S42), the memory control unit 8 returns to the state shown in FIG. 3 during the process of rewriting the system data from the block a to the block b.
It is determined that the operation has been interrupted before the processing of S6 is executed. In this case, the system data area 14 of block b
Since the system data in the middle of being written in b is incomplete as it is, the memory control unit 8 erases the stored contents of the block b (S41).

Then, the memory control unit 8 judges that the system data is written in the block a (S33),
A signal indicating that is sent to the control unit 5.

If the rewriting end flag 16a of the block a is not set in S42 (NO in S42), the memory control section 8 checks whether or not the rewriting end flag 16b of the block b is set. (S4
3). If the rewriting end flag 16b is set (S
(YES in 43), the memory control unit 8 determines that the operation is interrupted during the process of rewriting the system data from the block b to the block a before the process of S14 of FIG. 3 is executed. In this case, the memory control unit 8 determines that the system data being written in the system data area 14a of the block a is incomplete, and erases the stored contents of the block a (S37). Then, the memory control unit 8 determines that the system data is written in the block b (S29), and sends a signal to that effect to the control unit 5.

In the above S43, the block b
The state that the rewriting end flag 16b is not set occurs when the initialization process of the flash memory 7 or the writing process of the system data is not normally performed at the time of manufacturing or installing the controller 1. In this case, the memory control unit 8 erases the stored contents of both the block a and the block b (S44), and sends a signal indicating that there is no system data in both the blocks a and b to the control unit 5. Send to. Upon receiving this signal, the control unit 5 informs the user of a message indicating the absence of system data. Then, the user inputs system data in response to this message.

By the above operation, the system data before the change is stored even if an abnormal situation occurs during the rewriting process of the system data and the rewriting process between blocks is interrupted midway. By discriminating the block, the controller 1 can be restored to a state in which proper system data can be used.

The system data areas 14a and 14b constitute the control data storage means described in the claims. The old and new display data areas (flags) 17a and 17b
This constitutes the first data storage means described in the claims. Rewriting end data area (flag) 16a, 16
The second data storage means described in the claims is constituted by b. The control unit 5 constitutes the signal generating means described in the claims.

According to a first aspect of the present invention, there is provided a memory control section 8 and a program for causing the memory control section 8 to perform the above-described steps S6, S14, S8 and S16.
Data switching means. The memory control unit 8 and the above-mentioned S7, S8, S1
A second data switching means is defined by the program for executing the processing of 5, S16, S21 and S23. Further, the memory control unit 8 and a program for causing the memory control unit 8 to execute the processes shown in the flowcharts of FIGS.

Next, a second embodiment of the present invention will be described. In the above-described first embodiment, for example, when an abnormal situation occurs during the execution of S5 or S13 shown in FIG. 3, the system data before the change is saved, but the new data is about to be written. The changed system data will be lost. In this case, the user has to input the changed system data to the home controller 1 again.

By the way, in general, system data is used as it is after only a part of the data is changed after being first input by an expert at the time of manufacturing or installing the home controller, and the other parts are not changed. It is often done. Therefore, the system data can be changed by inputting a part of the new system data after the change without inputting the entire new system data. In this embodiment, focusing on this point,
The first embodiment described above is modified so that the system data can be easily changed.

FIG. 7 is a block diagram showing the configuration of the home controller according to this embodiment. The same symbols are given to those having the same functions as in the first embodiment. The home controller 101 includes an interface unit 3, a control unit 5, an I / O unit 6, a memory unit 12, and a memory control unit 108. The memory unit 12 includes the first memory area 9, the second memory area 10, and the third memory area 11 as in the first embodiment. The first memory area 9 and the second memory area 10 are composed of the flash memory 7.

The second memory area 10 includes a system data area 14, a rewrite start data area 15, a rewrite end data area 16 and a new and old display data area 17. Then, in the present embodiment, the second memory area 10 is further
It includes a change end data area 18 for storing data indicating that writing of a changed portion is completed when rewriting between blocks of system data.

FIG. 8 is a schematic diagram showing the structure of the second memory area 10. In addition to the configuration of the block a and the block b of the first embodiment described above, in this embodiment, the block a further includes a change end data area 18a, and the block b
Further includes a change end data area 18b.

9 and 10 are flowcharts showing the procedure of the operation when the system data of the home controller 101 in the second embodiment is changed by rewriting between blocks. 9 and 10, the same steps as those shown in FIGS. 3 and 4 of the first embodiment described above have the same step numbers. Further, in the following description, only the part obtained by modifying the procedure of the first embodiment will be described in order to simplify the description.

When the system data is currently written in the system data area 14a of the block a and the new system data is written in the system data area 14b of the block b, the memory control unit 108 starts the rewriting of the block b. The flag 15b is set (S4). Next, the memory control unit 108 writes only the newly changed portion included in the new system data, that is, the data different from the old system data written in the block a, into the system data area 14b of the block b. (S45).
When the writing process of the changed portion is completed, the memory control unit 108 sets the change end flag 18b of the block b (S46).

Next, the memory control unit 108 writes the data of the unchanged portion of the system data in the system data area 14b of the block b (S47). When the writing of the unchanged portion of the system data to the block b is completed, the memory control unit 108 sets the old and new display flags 17a of the block a (S6). After that, the memory control unit 108 sets the rewrite end flag 16b of the block b (S7). Then, the memory control unit 108
The stored contents of the block a are erased (S8), and the rewriting process of the system data from the block a to the block b is completed.

On the other hand, currently, the system data is block b.
Has been written to the new system data block a.
When writing to the memory, the memory control unit 108
The rewrite start flag 15a is set (S12). Then, the memory control unit 108 writes the changed data included in the system data in the block a (S48). When the writing of the changed portion to the block a is completed, the memory control unit 108 sets the change end flag 18a of the block a (S49). Next, the memory control unit 108 writes the data of the unchanged portion included in the system data in the system data area 14a of the block a (S5).
0). Then, the memory control unit 108 sets the old and new display flags 17b of the block b when the writing of the data of the unchanged portion into the block a is completed (S14).
After that, the memory control unit 108 sets the rewriting end flag 16a of the block a (S15). Then, the memory control unit 108 erases the stored contents of the block b (S1
6) The system data rewriting process from block b to block a is completed.

11 and 12 are flow charts showing the operation procedure at the time of restoration of the home controller 101 in the second embodiment. Similar to FIGS. 9 and 10, only parts different from the first embodiment will be described. If the old / new display flag 17b of the block b is not set in S38 (NO in S38), the memory control unit 108 checks whether or not the rewrite end flag 16a of the block a is set (S42). If rewriting end flag 16a is set (YES in S42), memory control unit 108
Determines that the operation is interrupted before S6 of FIG. 9 is executed.

Here, in the case of the above-described first embodiment, the memory control unit 8 (FIG. 1) judges that the system data being written in the block b is incomplete data,
The stored contents of block b were erased. On the other hand, in the case of the second embodiment, the memory control unit 108 uses the changed portion of the newly written system data, depending on whether or not the writing of the changed portion of the system data has been completed. Is restored, or it is judged that the system data cannot be restored, and the stored contents of the block b are erased selectively.

The memory control unit 108 checks whether or not the change end flag 18b of the block b is set (S51). If the change end flag 18b is set (YES in S51), the memory control unit 108 determines that the writing process of the changed portion data included in the changed system data in the block b is completed. . And
The memory control unit 108 reads the data of the unaltered portion of the system data from the system data area 14a of the block a and the system data area 1 of the block b
Write to 4b (S53).

When the writing process of the system data to the block b is completed, the memory control unit 108 sets the old / new display flag 17a of the block a (S54), and further sets the rewrite end flag 16b of the block b. (S5
5). Then, the memory control unit 108 erases the stored contents of the block a (S56), and the blocks a to b are deleted.
The rewriting process of the system data to the. Then, the memory control unit 108 sends to the control unit 5 a signal indicating that the system data is written in the block b.

In step S51, the block b
If the change end flag 18b is not set (S
(NO in 51), the memory control unit 108 returns to S in FIG.
It is determined that an abnormality occurred during the execution of 45 and the writing process was interrupted.

In the present embodiment, as the flash memory 7, one for reading or writing data in units of 8 bits or 16 bits is used. If the data length of the system data is the same as the read / write unit of the flash memory 7, data management is relatively easy. However, in reality, some system data is composed of 1 bit like data indicating whether or not a terminal device is connected, and some system data requires a plurality of bytes such as a telephone number.

As described above, the data length differs depending on the type of data included in the system data, and when the data length of the system data is larger than the read / write unit of the flash memory 7, the data is written. If an error occurs during the writing and the writing process is interrupted, the data written halfway cannot be used. Therefore, the memory control unit 108 erases the stored contents of the block b (S52). Then, the memory control unit 108
Determines that the system data has been written in the block a (S33), and sends a signal to that effect to the control unit 5.

On the other hand, if the rewrite end flag 16a of the block a is not set in S42 (NO in S42), the memory control unit 108 checks whether the rewrite end flag 16b of the block b is set. (S
43). If the rewriting end flag 16b is set (YES in S43), it is determined that the operation is interrupted before the execution of S14 of FIG. In this case, the memory control unit 108 then continues to the change end flag 18a of the block a.
It is checked whether or not is set (S57).

If change end flag 18a is set (YES at S57), memory control unit 108 determines that writing of the changed portion of the system data to block a has been completed. Then, the memory control unit 108
Reads the data of the unchanged part of the system data from the system data area 14b of the block b and writes it in the block a (S59).

When the writing of all the system data to the block a is completed, the memory control unit 108 will block b.
The old and new display flag 17b is set (S60). Next, the memory control unit 108 sets the rewriting end flag 16a of the block a (S61). Further, the memory control unit 108 erases the stored contents of the block b (S6
2) The system data rewriting process ends. In this case, the memory control unit 108 determines that the system data is written in the block a (S33), and sends a signal to that effect to the control unit 5.

If the change end flag 18a of the block a is not set in S57 (NO in S57), the memory control unit 108 has an abnormality during the execution of S48 in FIG. , Judge that the writing has been interrupted. In this case, the memory control unit 108 erases the stored contents of the block a (S58). Then, the memory control unit 108 determines that the system data is written in the block b (S29), and sends a signal to that effect to the control unit 5.

As described above, according to the second embodiment,
Even if an error occurs during the rewriting process of system data and the rewriting operation is interrupted midway, if the writing process of the changed part included in the system data is completed,
Copy the unchanged part from the existing system data and restore the entire modified system data. This allows the user to write the changed data even if an error such as a power failure occurs and the rewriting process is interrupted during or after the input of the changed system data. If completed, there is no need to input the changed system data again, and the recovery work can be simplified.

The change end data area (flag) 18
The third data storage means described in the claims is constituted by a and 18b. The memory control unit 108 and the above-mentioned S46, S8, S49, S16
And a program for performing the processing described in (3) above constitutes a third data switching means. The memory control unit 108 and the above-mentioned S
53 and the program for executing the processing of S59 constitute the reading / writing means.

Next, a third embodiment of the present invention will be described. In this embodiment, even if an abnormality occurs while writing the changed portion included in the system data and the writing process is interrupted, the change data written before the abnormality occurs , Have configured the home controller to be in a usable and enabled state.

FIG. 13 is a block diagram showing the structure of the home controller 201 according to the third embodiment. The same reference numerals are given to those having the same functions as those shown in the first embodiment. The home controller 201 includes an interface unit 3, a control unit 5 and an I / O unit.
The unit 6, the memory control unit 208, and the memory unit 12 are included. The memory unit 12 includes a first memory area 9, a second memory area 10, and a third memory area 11 as in the first embodiment. The first memory area 9 and the second memory area 10 are composed of the flash memory 7.

Further, the second memory area 10 includes a system data area 14, a rewrite start data area 15, a rewrite end data area 16, a new / old display data area 17, and a change end data area 18. Further, the second memory area 10 includes a change data buffer 19 which is a feature of the third embodiment.

Conventionally, when the system data is changed, the changed portion data is written in the third memory area 11 used as a working storage area when the program is executed, and all the changing work is completed. After that, the system data is collectively written in the flash memory 7. In this embodiment, the data of the changed portion is written in the third memory area 11, and the data of the changed portion is also written in the change data buffer 19.

FIG. 14 is a schematic diagram showing the structure of the second memory area 10 in this embodiment. In this embodiment, blocks a and b are provided with change data buffers 19a and 19b in addition to the various data areas 14a to 18a and 14b to 18b shown in the second embodiment.

FIG. 15 is a schematic diagram showing the structure of the changing data buffer 19a provided in the block a.
Since the changing data buffer 19b of the block b has the same configuration as that shown in FIG. In FIG. 15, the change data buffer 19a is
It stores m pieces of change data. Each change data is composed of a data number for identifying each data, a data size indicating the length of the data handled in the flash memory 7 (FIG. 13) as a unit, and data.

The flash memory 7 is in a certain state (usually at a high level) when the stored contents are erased. Therefore, when the head data of the changing data buffer 19a is read when it is not written in the changing data buffer 19a and is in the unused state, its value becomes a certain constant value. For example, when the flash memory 7 is configured such that one word has 8 bits and the erased state is the high level, the data buffer 1 for changing unused data is used.
The read value of the head data of 9a becomes FFH. By utilizing such a characteristic, in the present embodiment, when the change data exists, the data number is set to a value other than the constant value in the erased state, and the change data is changed according to the value of the data number. It is possible to determine the presence or absence of.

16 and 17 are for writing the data of the changed portion (hereinafter referred to as "changed data") into the change data buffers 19a and 19b when the system data is changed by the rewriting process between blocks. 6 is a flowchart showing a procedure of an operation of home controller 201. The procedure shown in this flowchart is executed once for each piece of changed data. Similar to the first and second embodiments described above, the data indicating the rewriting state of the system data will be described as a flag.

First, the memory control unit 208 checks whether or not the rewriting start flag 15a of the block a is set (S63). If the rewriting start flag 15a is not set (NO in S63), the memory control unit 208
Next checks whether or not the rewrite start flag 15b of the block b is set (S64). If the rewrite start flag 15b is not set (NO in S64),
The memory control unit 208 determines that the system data is not set in the second memory area 10 when the home controller 201 is manufactured or installed.
In this case, since it is not the system data change process, the memory control unit 208 causes the change data buffer 19 to change.
Writing to a and 19b is not performed.

If the rewrite start flag 15a of the block a is set in S63 (YE in S63).
S), the memory control unit 208 determines that the system data is currently written in the block a. At this time,
The memory control unit 208 writes the change data in the change data buffer 19a of the block a. The procedure of the writing process to the change data buffer 19a will be described below.

Variables used by the memory control unit 208 include a data number counter n, a data value Ka (n), a data number sub-counter j, a data length counter k, and a maximum data capacity n _MAX . The data number counter n indicates the number of data from the beginning in the change data buffer 19a. The data value Ka (n) indicates the value of the nth data in the changing data buffer 19a. The data number sub-counter j is a counter for adding the value of the data number counter n separately. The data length counter k is a variable for substituting the data length of the changed data.

First, the memory control unit 208 searches for an unused area in the change data buffer 19a. The memory control unit 208 sets 1 to the data number counter n (S7).
5). Next, the memory control unit 208 checks the value of Ka (n). The value of Ka (n) at this time is the data number of the top change data in the change data buffer 19a. The memory control unit 208 determines whether the area of the changed data is in the used state or the unused state based on the value of the read data number as described above (S76). If the read data number value determines that the area is in use (NO in S76), the memory control unit 208 checks the value of the data number counter n to check the data number of the next change data. Is updated according to the equation (1) (S77).

N ← n + Ka (n + 1) +2 (1)

In the equation (1), n on the right side is the number of data (address) in the change data buffer at the present time, and shows the position of the data number of the change data as the storage area. Ka (n + 1) which is the data size of the changed data is added to this n.

Furthermore, 1 is added as the address part of the area storing the data size, and then 1 is added so that the counter indicates the address of the data number of the next change data. Therefore, in order to calculate the address indicating the data number of the next changed data from the address indicating the data number of the previous changed data, the formula (1) is used.
The data number counter n is updated according to the calculation formula described in. In this way, the memory control unit 208 continues to S7 until an unused area of the change data buffer 19a is found.
6 and S77 are repeated.

If the unused area is found (YES in S76), memory control unit 208 changes data buffer 1
It is checked whether or not there is a free area in which the changed data can be written in 9a. That is, the memory control unit 208 sets the data number sub-counter j to n + 1 and the data length counter k to the data length of the changed data (S78).
Then, the memory control unit 208 checks whether or not the number of data j + k after writing the changed data does not exceed the maximum data capacity n _MAX of the changing data buffer 19a (S79).

The memory control unit 208 determines that the data number j + k exceeds the maximum data capacity n _MAX (N in S79).
O), it is determined that the change data cannot be written in the change data buffer 19a any more, and at this point, similar to the rewriting process between blocks shown in the second embodiment, the above-described steps shown in FIGS.
According to the processing procedure shown in FIG.
The system data is rewritten to (S84). S
When the processing of 84 is completed, the memory control unit 208 executes the procedure S
Returning to 63, the processing for the changed data is executed.

When the memory control unit 208 determines that the number of data j + k is smaller than the maximum data capacity n _MAX and the change data can be written (YES in S79), the data length of the change data is set to the change data. The data is written in the buffer 19a (S80). Next, the memory control unit 208 writes the contents of the change data in the change data buffer 19a (S8).
1, S82). At this time, the i-th data of the write data is set to the data value Ka (j) of the change data buffer 19a, the variable j of the number of data and the write data number i are incremented by 1, and i is k. When it becomes larger than the above, the process proceeds to the next process. Next, the memory control unit 208 sets the data number of the change data to the data value Ka (n) and writes the data number in the change data buffer 19a (S8).
3).

As described above, since the memory control unit 208 writes the data number at the end of the process, an abnormal situation occurs during the execution of S80 to S82, and the change data buffer 1
When the data written in 9a becomes incomplete, the data number is not written in the changing data buffer 19a. Therefore, by reading the data number and determining the value in the subsequent processing, it is possible to invalidate the write data that has become incomplete due to an abnormal situation.

On the other hand, if the rewrite start flag 15b of the block b is set in S64 (YE in S64).
S), the memory control unit 208 determines that the system data is currently written in the block b, and performs the process of writing the change data in the change data buffer 19b of the block b. The processing procedure when writing the change data to the change data buffer 19b is the same as that of the change data buffer 19a described above.
S65 to S7, which are the processes of the change data buffer 19b
Corresponds to 3 respectively. The variable Ka indicating the value of the data in the changing data buffer 19a is shown as the variable Kb in the changing data buffer 19b.
The detailed processing procedure for writing the change data in the change data buffer 19b will be omitted.

Through the above processing, all the change data are changed data buffer 19a or change data buffer 19
If it is written in b, those data are written in block b or block a by the same procedure as the rewriting process between blocks shown in S84 and S74.

17 and 18 show the home controller 20.
6 is a flowchart showing an operation procedure at the time of restoration of No. 1; This flowchart shows the process at the time of restoration when an abnormal situation occurs during the writing process of the system data shown in FIGS. 17 and 18, and the process procedure of the second embodiment shown in FIGS. This is modified by using the change data buffers 19a and 19b. The same step numbers are shown for the same processing contents as those in FIGS. In the following description, only the parts different from the configurations of FIGS. 11 and 12 will be described.

When the memory control unit 208 determines in S27 that the system data is written in the block b (YES in S27), the change data is written in the change data buffer 19b in the block b. It is checked whether it is rare (S85). If the data has been written in the change data buffer 19b (S85).
NO), it is determined that the operation is interrupted while the change data is being written in the change data buffer 19b of the block b in the flowcharts shown in FIGS. In this case, the memory control unit 208 determines that new system data should be written in the block a.

Then, the memory control unit 208 checks whether or not the stored contents of the block a are erased (S8).
6) If the memory content of block a has not been erased (NO in S86), the memory content of block a is erased (S87). Next, the memory control unit 208 determines that the block a
The rewriting start flag 15a is set (S88). The memory control unit 208 then changes the data buffer 19 for change.
The change data written in b is written in block a (S9
5), the change end flag 18a is set (S96).

Next, the memory control unit 208 uses the block b as the data of the part which is not changed in the system data.
The data written in the system data area is read and the data is written in the system data area of block a (S59).

When the writing of the system data to the block a is completed, the memory control unit 208 sets the old and new display flags 17b of the block b (S60), and then sets the rewrite end flag 16a of the block a ( S61).
Finally, the memory control unit 208 erases the contents of the block b (S62) and ends the system data rewriting process. In this case, the memory control unit 208 determines that the system data is written in the block a (S33), and sends a signal to that effect to the control unit 5.

When the memory control unit 208 determines in S31 that the system data is written in the block a (YES in S31), the change data is stored in the change data buffer 19a in the block a. It is checked whether or not it has been written (S89). If the change data is written in block a (NO in S89), memory control unit 2
08, in the processing procedure shown in FIGS.
It is determined that the operation is interrupted while the change data is being written in the change data buffer 19a of the block a. In this case, the memory control unit 208 determines that new system data should be written in the block b.

Next, the memory control unit 208 determines that the block b
It is checked whether or not the memory content of is deleted (S90),
If not erased (NO in S90), the stored contents of block b are erased (S91). After that, the memory control unit 208 sets the rewrite start flag 15b of the block b (S92). Then, the memory control unit 208
The change data written in the change data buffer 19a is written in the block b (S93), and the change end flag 18b
Is set (S94).

Next, the memory control unit 208 reads the data of the unaltered portion of the system data from the system data area 14a of the block a and writes it in the system data area 14b of the block b (S53).

When the writing of the system data to the block b is completed, the memory control unit 208 sets the old and new display flags 17a of the block a (S54), and then sets the rewrite end flag 16b of the block b ( S55).
Then, the memory control unit 208 finally erases the contents of the block a (S56) and ends the rewriting process of the system data. In this case, the memory control unit 208 determines that the system data is written in the block b (S29),
A signal indicating that is sent to the control unit 5.

The memory control unit 208 checks in S42 whether or not the rewriting end flag 16a of the block a is set. The memory control unit 208 uses the rewrite end flag 16
If a is set (YES in S42), it is determined that the operation is interrupted during the process of rewriting the system data from block a to block b before the execution of S6 in FIG.

In this case, the memory control unit 208 checks whether or not the change end flag 18b of the block b is set (S51). The memory control unit 208 determines that the change end flag 18b is not set (N in S51).
O), it is determined that an error has occurred while the process of S45 of FIG. 9 is being executed while the change data is being written to the block b, and the writing operation has been interrupted. In this case, since a part of the change data written in the change data buffer 19a has already been written in the block b, the memory control unit 208 changes the change data not written in the block b. Block b searched from data buffer 19a
(S93).

Thereafter, the memory control unit 208 sets the change end flag 18b (S94). Next, the memory control unit 208 reads the data of the unaltered portion included in the system data from the block a and writes it in the block b (S53). When the writing of all the system data to the block b is completed, the memory control unit 208 sets the old and new display flags 17a of the block a (S54), and then sets the rewrite end flag 16b of the block b (S55). ). Finally, the memory control unit 208 erases the stored contents of the block a (S56), and ends the system data rewriting process. In this case, the memory control unit 208
Judges that the system data has been written in the block b (S29), and sends a signal to that effect to the control unit 5.

If the rewriting end flag 16a of block a is not set in S42 (NO in S42), the memory control unit 208 rewrite end flag 16 of block b.
It is checked whether or not b is set (S43). If the rewrite end flag 16b is set (YES in S43), the memory control unit 208 is in the process of rewriting the system data from the block b to the block a and, in step S14 of FIG.
It is determined that the operation was interrupted before execution of.

In this case, the memory control unit 208 checks whether or not the change end flag 18a of the block a is set (S57). The memory control unit 208 determines that the change end flag 18a is not set (N in S57).
O), it is determined that an error occurred during the execution of S48 of FIG. 9 while the change data was being written to the block a, and the write operation was interrupted. Since a part of the change data written in the change data buffer 19b has already been written in the block a, the memory control unit 208 searches for the change data not written in the block a and retrieves that data. Write to block a (S95).

Thereafter, the memory control unit 208 sets the change end flag 18a of the block a (S96). Next, the memory control unit 208 reads the data of the part that is not changed and is included in the system data from the block b and writes the data in the block a (S59). The memory control unit 208
When the writing of the system data to the block a is completed, the old and new display flag 17b of the block b is set (S6
0) and thereafter, the rewriting end flag 16a of the block a is set (S61). Then, the memory control unit 208
Finally, the stored contents of the block b are erased (S62), and the rewriting process of the system data ends. In this case, the memory control unit 208 determines that the system data is written in the block a (S33), and sends a signal indicating that fact to the control unit 5.
Send to.

As described above, according to the third embodiment,
Even when an abnormal situation occurs during execution of the system data rewriting process and the rewriting process between blocks of the flash memory 7 is interrupted midway, the change data written in the change data buffer can be used. If so, it is possible to restore the entire system data using that data. Therefore, the recovery work performed by the user to deal with an abnormal situation can be reduced.

The change data buffers 19a, 19b
The data buffer area described in the claims is constituted by. The memory control unit 208 and the memory control unit 20
A buffer writing means is constituted by a program for causing the CPU 8 to execute the processing shown in the flowcharts of FIGS.

Further, the memory control unit 208 and the data written in the change data buffer 19a or the change data buffer 19b in the memory control unit 208 are processed in the block b or the block by the same procedure as the rewriting process between blocks. A buffer reading means is defined by a program for executing the process of writing in a. The memory control unit 208 and the memory control unit 2
Partial read / write means is constituted by a program for causing S.08 to execute the processing of S93 and S95 described above.

[0123]

As described above, according to the first aspect of the invention, the control data stored in the control data storage means composed of the non-volatile memory and used for controlling the household appliances is newly added. Change by writing data to.
The control data storage means includes two blocks, and writes new control data in the other block, which is different from the block in which the existing control data is stored, of the two blocks. The writing states of the two blocks of the control data storage means are the first data and the second data respectively stored in the first data storage means and the second data storage means which are nonvolatile memories. It can be determined by the data of Therefore, even if an abnormality such as a power failure occurs in the middle of the control data change process and the change process is interrupted, the determination means is based on the first data and the second data at the time of restoration. It is possible to determine which of the two blocks should use the control data stored therein.

According to the second aspect of the present invention, it is possible to determine by the third data whether or not the writing of a predetermined part of the data included in the control data has been completed. It is possible to read the data of the other part excluding the predetermined part of the data from the other block and write the data in the block. Therefore, when new control data is written in the control data storage means and the control data is changed, a part of the control data is written by the writing means and the other data is written. Is read from the other block storing the existing control data, the entire new control data can be written. Even if an abnormality such as a power failure occurs and the control data change process is interrupted, if a part of the predetermined data has been written at the time the process is interrupted. , By reading and writing the other portion of the existing control data excluding the portion for which writing has been completed, new control data can be written without performing the process of rewriting some predetermined data. It can be written in the control data storage means.

According to the third aspect of the invention, when newly writing the control data in the control data storage means,
The control data is written in the data buffer area, and the written data is read and written in the block. Further, since the means for reading the portion of the control data excluding the portion written in the block from the data buffer area and writing it in the block is provided, an abnormality such as a power failure occurs, and the writing by the writing means occurs. Even when the writing operation is interrupted, the data written in the data buffer area can be made ready for use in the subsequent processing.

According to the fourth aspect of the present invention, since the data in the storage area included in each of the two blocks of the control data storage means can be erased at once, the control data is newly stored in the block. Before writing, the existing control data stored in the storage area of the block can be collectively erased.

According to the invention described in claim 5, one of the two blocks, the two first data and the two second data are stored in the same erasable memory. One of these three can be erased at once. Then, the first state or the second state of the first data and the third state or the fourth state of the second data are stored in the block by making them correspond to the erased state of the memory. It is possible to simultaneously erase the control data, switch the state of the first data and switch the state of the second data.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a home controller according to a first embodiment of the present invention.

FIG. 2 is a schematic diagram showing a configuration of a memory area of the home controller according to the first embodiment.

FIG. 3 is a flowchart showing an operation procedure of the home controller when the system data is changed by the rewriting process between blocks in the first embodiment.

FIG. 4 is a flowchart showing an operation procedure of a home controller when system data is changed by a rewriting process between blocks in the first embodiment.

FIG. 5 is a flowchart showing a procedure of an operation when the home controller is restored in the first embodiment.

FIG. 6 is a flowchart showing a procedure of an operation when the home controller is restored in the first embodiment.

FIG. 7 is a block diagram showing a configuration of a home controller according to a second embodiment of the present invention.

FIG. 8 is a schematic diagram showing a configuration of a memory area of a home controller according to a second embodiment.

FIG. 9 is a flowchart showing a procedure of operation of a home controller when system data is changed by rewriting processing between blocks in the second embodiment.

FIG. 10 is a flowchart showing a procedure of an operation of the home controller when the system data is changed by the rewriting process between blocks in the second embodiment.

FIG. 11 is a flowchart showing a procedure of an operation when the home controller is restored in the second embodiment.

FIG. 12 is a flowchart showing a procedure of an operation when the home controller is restored in the second embodiment.

FIG. 13 is a block diagram showing a configuration of a home controller according to a third embodiment of the present invention.

FIG. 14 is a schematic diagram showing a configuration of a memory area of a home controller according to a third embodiment.

FIG. 15 is a schematic diagram showing the configuration of a change data buffer according to the third embodiment.

FIG. 16 is a flowchart showing an operation procedure of the home controller for writing the change data in the change data buffer when the system data is changed by the inter-block rewriting process in the third embodiment.

FIG. 17 is a flowchart showing an operation procedure of the home controller for writing the change data in the change data buffer when the system data is changed by the inter-block rewriting process in the third embodiment.

FIG. 18 is a flowchart showing the procedure of an operation at the time of restoration of the home controller in the third embodiment.

FIG. 19 is a flowchart showing the procedure of an operation when the home controller is restored in the third embodiment.

FIG. 20 is a conceptual diagram showing a configuration of a general home automation system.

FIG. 21 is a block diagram showing a configuration of a general conventional home controller.

FIG. 22 is a schematic diagram showing a configuration of a memory area of a general conventional home controller.

[Explanation of symbols]

 1, 101, 201 Home controller 2 Home bus 3 Interface section 5 Control section 7 Flash memory 8, 108, 208 Memory control section 10 Second memory area 15, 15a, 15b Rewriting start data area 16, 16a, 16b Rewriting end data Area 17, 17a, 17b Old and new display data area 18, 18a, 18b Change end data area 19, 19a, 19b Change data buffer

Claims (5)

[Claims] 1. A home controller for controlling household equipment via a home bus, comprising a non-volatile memory, and control data storage means including two blocks for storing control data. A first data storage unit, which is composed of a non-volatile memory and stores two first data corresponding to each of the two blocks, and a non-volatile memory, which corresponds to each of the two blocks Second data storage means for storing the two second data, and for controlling the household appliance based on the control data stored in one of the two blocks Signal generating means for generating the signal, write means for writing the control data in each of the two blocks, and After the writing of the control data to one of the two blocks is completed, the first data corresponding to the one block is switched from the first state to the second state, and then the first data is switched to the second state. First data switching means for switching from the second state to the first state; and after the first data has been switched from the first state to the second state, and further Before being switched to the second state, the second data of either one of the two second data is switched from the third state to the fourth state, and the other second data is switched to the second state. Second data switching means for switching from the fourth state to the third state, and which one of the two blocks is based on the two first data and the two second data. Decide which block to use Home controller comprising a determining means for. 2. The home controller comprises a non-volatile memory, a third data storage means for storing third data, and a part of the predetermined data included in the control data. After the writing by the writing means to one block is completed, the third data is switched from the fifth state to the sixth state, and then, the sixth state is switched to the fifth state. And a third data switching unit for reading the other part other than the part of the data included in the control data from another block different from the one block with reference to the third data. The home controller according to claim 1, further comprising read / write means for writing to said one block. 3. The home controller further includes a data buffer area formed of a non-volatile memory, the writing means includes: buffer writing means for writing control data in the data buffer area; and the buffer. Buffer read means for reading the data stored in the write means and writing the data in the block, wherein the home controller is further provided when the write operation by the write means is interrupted due to an abnormality. 2. The read / write means for reading the part of the control data excluding the part written in the block from the data buffer area and writing the read data in the block for recovery. Alternatively, the home controller described in 2. 4. The home controller according to claim 1, wherein each of the two blocks includes a storage area that can be collectively erased. 5. Included in the control data storage means 2
One block, one area for storing two first data included in the first data storage means, and one area for storing two second data included in the second data storage means 4. The home controller according to claim 1, wherein the home controller is provided on a memory that can be collectively erased.