JPH06334054A - Microwave semiconductor circuit device - Google Patents
Microwave semiconductor circuit deviceInfo
- Publication number
- JPH06334054A JPH06334054A JP5116845A JP11684593A JPH06334054A JP H06334054 A JPH06334054 A JP H06334054A JP 5116845 A JP5116845 A JP 5116845A JP 11684593 A JP11684593 A JP 11684593A JP H06334054 A JPH06334054 A JP H06334054A
- Authority
- JP
- Japan
- Prior art keywords
- matching circuits
- input
- output
- microwave
- matching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4076—Timing circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Databases & Information Systems (AREA)
- Dram (AREA)
- Microwave Amplifiers (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明はマイクロ波半導体回路装
置に関し、特にマイクロ波の増幅に係るマイクロ波半導
体回路装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microwave semiconductor circuit device, and more particularly to a microwave semiconductor circuit device for microwave amplification.
【０００２】[0002]
【従来の技術】図３に従来のマイクロ波増幅回路の回路
図を示す。図３において、ゲート電圧の印加および信号
の入力を兼用する入力端子１には、入力するマイクロ波
の整合を取るための入力整合回路３ｅが接続されてい
る。入力整合回路３ｅの出力は、並列に配置された入力
整合回路３ａ、３ｂに接続されている。入力整合回路３
ａおよび３ｂは各々電界効果トランジスタ（以後ＦＥＴ
と略記）４ａ、４ｂのゲート電極に接続されている。Ｆ
ＥＴ４ａおよび４ｂのドレイン電極は各々出力整合回路
３ｃ、３ｄに接続され、ソース電極は接地電位に接続さ
れている。出力整合回路３ｃおよび３ｄは共通して出力
整合回路３ｆに接続され、出力整合回路３ｆにはドレイ
ン電圧の印加および信号の出力を兼用する出力端子２が
接続されている。また、入力整合回路３ａと３ｂの間お
よび出力整合回路３ｃと３ｄの間には各々抵抗５が並列
に接続されている。2. Description of the Related Art FIG. 3 shows a circuit diagram of a conventional microwave amplifier circuit. In FIG. 3, an input matching circuit 3e for matching the input microwaves is connected to the input terminal 1 which also serves to apply a gate voltage and input a signal. The output of the input matching circuit 3e is connected to the input matching circuits 3a and 3b arranged in parallel. Input matching circuit 3
a and 3b are field effect transistors (hereinafter FETs)
(Abbreviated)) are connected to the gate electrodes of 4a and 4b. F
The drain electrodes of ETs 4a and 4b are connected to the output matching circuits 3c and 3d, respectively, and the source electrodes are connected to the ground potential. The output matching circuits 3c and 3d are commonly connected to the output matching circuit 3f, and the output matching circuit 3f is connected to the output terminal 2 for both applying a drain voltage and outputting a signal. A resistor 5 is connected in parallel between the input matching circuits 3a and 3b and between the output matching circuits 3c and 3d.
【０００３】次に動作について説明する。本回路を動作
させるためには、まず、ＦＥＴ４ａおよび４ｂを動作さ
せるために入力端子１および出力端子２に対して各々ゲ
ート電圧およびドレイン電圧を印加する。この状態で入
力端子１からマイクロ波信号が入力されると、ＦＥＴ４
ａ、４ｂで増幅されたマイクロ波信号が出力端子２に与
えられる。ここで、一般に産業用マイクロ波回路システ
ムはインピーダンス５０Ωで設計されているが、ＦＥＴ
の入出力インピーダンスは数Ωであるので、そのままで
はインピーダンス不整合を起こして信号が反射するなど
の不都合が発生する。そこで整合回路をＦＥＴの入力お
よび出力側に配置することで、ＦＥＴの入出力インピー
ダンスを５０Ωにまで高めて、インピーダンス不整合を
解消する。そのために整合回路３ａ〜３ｆが適宜配置さ
れている。また、抵抗５を入力整合回路３ａと３ｂの間
および出力整合回路３ｃと３ｄの間に並列に接続するこ
とによって、各整合回路間での発振を防止する。Next, the operation will be described. To operate this circuit, first, a gate voltage and a drain voltage are applied to the input terminal 1 and the output terminal 2, respectively, to operate the FETs 4a and 4b. When a microwave signal is input from the input terminal 1 in this state, the FET 4
The microwave signals amplified by a and 4b are given to the output terminal 2. Here, although the industrial microwave circuit system is generally designed with an impedance of 50Ω,
Since its input / output impedance is several Ω, if it is left as it is, inconvenience occurs such as impedance mismatching and signal reflection. Therefore, by arranging a matching circuit on the input and output sides of the FET, the input / output impedance of the FET is increased to 50Ω and the impedance mismatch is eliminated. Therefore, matching circuits 3a to 3f are appropriately arranged. Further, by connecting the resistor 5 in parallel between the input matching circuits 3a and 3b and between the output matching circuits 3c and 3d, oscillation between the matching circuits is prevented.
【０００４】[0004]
【発明が解決しようとする課題】従来のマイクロ波増幅
回路は以上のように構成されているので、整合回路間で
の発振を防止することは可能であったが、該増幅回路の
動作中にＦＥＴの動作バランスがくずれて出力信号レベ
ルが著しく低下して利得が低下するという問題があっ
た。Since the conventional microwave amplifier circuit is configured as described above, it was possible to prevent oscillation between matching circuits, but it is possible to prevent it from operating during the operation of the amplifier circuit. There has been a problem that the operation balance of the FET is lost and the output signal level is remarkably lowered to lower the gain.
【０００５】本発明は上記のような問題点を解決するた
めになされたもので、ＦＥＴの動作バランスを安定に保
ち、利得低下を防止したマイクロ波の増幅に係るマイク
ロ波半導体回路装置を得ることを目的とする。The present invention has been made to solve the above problems, and obtains a microwave semiconductor circuit device relating to the amplification of microwaves in which the operation balance of the FETs is kept stable and the gain reduction is prevented. With the goal.
【０００６】[0006]
【課題を解決するための手段】本発明に係るマイクロ波
半導体回路装置は、並列配置された複数のトランジスタ
と、前記トランジスタの制御電極に各々接続された複数
の入力整合回路と、前記トランジスタの一方の電極に各
々接続された複数の出力整合回路と、前記入力整合回路
間および前記出力整合回路間に接続された抵抗とを備え
るマイクロ波半導体回路装置において、前記入力整合回
路間および前記出力整合回路間に、さらにコンデンサお
よび抵抗を並列に接続して備えている。A microwave semiconductor circuit device according to the present invention includes a plurality of transistors arranged in parallel, a plurality of input matching circuits each connected to a control electrode of the transistor, and one of the transistors. A plurality of output matching circuits respectively connected to the electrodes of the microwave matching circuit, and resistors connected between the input matching circuits and between the output matching circuits. Further, a capacitor and a resistor are connected in parallel and provided.
【０００７】[0007]
【作用】本発明に係るマイクロ波半導体回路装置によれ
ば、入力整合回路間および出力整合回路間に、さらにコ
ンデンサを並列に接続することで入力整合回路間および
出力整合回路間がマイクロ波信号に対して短絡されるの
で、複数のトランジスタの動作バランスが正常に保たれ
る。また、抵抗を並列に接続することで入力整合回路間
および出力整合回路間が直流および低周波信号に対して
は抵抗を有することになるので電流帰還による発振を防
止できる。According to the microwave semiconductor circuit device of the present invention, by connecting capacitors in parallel between the input matching circuits and between the output matching circuits, a microwave signal is generated between the input matching circuits and between the output matching circuits. Since they are short-circuited with respect to each other, the operation balance of the plurality of transistors is normally maintained. Further, by connecting the resistors in parallel, the input matching circuits and the output matching circuits have resistance to DC and low frequency signals, so that oscillation due to current feedback can be prevented.
【０００８】[0008]
【実施例】図１に本発明に係るマイクロ波半導体回路装
置の一実施例であるマイクロ波増幅回路の回路図、図２
に該回路のパターン図を示す。図１において入力整合回
路３ａと３ｂの間、および出力整合回路３ｃと３ｄの間
には、新にコンデンサ６と抵抗７が並列に各々接続され
ている。それ以外の構成は図３で説明した従来のマイク
ロ波増幅回路と同じである。1 is a circuit diagram of a microwave amplifier circuit which is an embodiment of a microwave semiconductor circuit device according to the present invention, FIG.
A pattern diagram of the circuit is shown in FIG. In FIG. 1, a capacitor 6 and a resistor 7 are newly connected in parallel between the input matching circuits 3a and 3b and between the output matching circuits 3c and 3d. The other structure is the same as the conventional microwave amplifier circuit described in FIG.
【０００９】次に図２を参照して本回路の構造を説明す
る。図１において説明した各整合回路は図２で示す整合
基板３１〜３４の上に形成されている。まず、入力整合
回路３ａおよび３ｂは整合基板３１の上に、出力整合回
路３ｃおよび３ｄは整合基板３２の上に、入力整合回路
３ｅは整合基板３３の上に、出力整合回路３ｆは整合基
板３４の上に形成されている。本回路を構成する各整合
回路はマイクロストリップ線路で形成されている。マイ
クロストリップ線路とは半導体装置内でマイクロ波を伝
送するためのもので、伝送損失は同軸線路と同等、小型
軽量、構造が簡単、プリント配線が可能、半導体素子と
の結合が容易などの利点を有している。一般的には基板
となる金属導体（基板導体と呼称）の上に誘電体を配置
し、その上に所望の形状の金属導体（ストリップ導体と
呼称）を形成した不平衡形が使用される。マイクロスト
リップ線路は同軸線路を変形させたものとして取り扱う
ことができ、該線路の特性インピーダンスはストリップ
導体厚さや幅および誘電体の厚さや種類によって決ま
る。よって図２において、整合基板（基板導体）３１〜
３４上に形成された各整合回路（ストリップ導体）３ａ
〜３ｆの形状によって各々の特性インピーダンスを決定
できるので、ＦＥＴ４ａ、４ｂの入出力インピーダンス
を考慮して各整合基板を形成する。Next, the structure of this circuit will be described with reference to FIG. Each matching circuit described in FIG. 1 is formed on the matching substrates 31 to 34 shown in FIG. First, the input matching circuits 3a and 3b are on the matching substrate 31, the output matching circuits 3c and 3d are on the matching substrate 32, the input matching circuit 3e is on the matching substrate 33, and the output matching circuit 3f is the matching substrate 34. Is formed on. Each matching circuit that constitutes this circuit is formed of a microstrip line. A microstrip line is for transmitting microwaves in a semiconductor device, and has the same transmission loss as a coaxial line, such as small size and light weight, simple structure, printed wiring, and easy coupling with semiconductor elements. Have In general, an unbalanced type is used in which a dielectric is arranged on a metal conductor (referred to as a substrate conductor) serving as a substrate, and a metal conductor having a desired shape (referred to as a strip conductor) is formed thereon. The microstrip line can be treated as a modified coaxial line, and the characteristic impedance of the line is determined by the thickness and width of the strip conductor and the thickness and type of the dielectric. Therefore, in FIG. 2, the matching substrates (substrate conductors) 31 to
Each matching circuit (strip conductor) 3a formed on 34
Since each characteristic impedance can be determined by the shape of 3f, each matching substrate is formed in consideration of the input / output impedances of the FETs 4a and 4b.
【００１０】入力整合回路３ａと出力整合回路３ｃおよ
び入力整合回路３ｂと出力整合回路３ｄの間には各々Ｆ
ＥＴ４ａ、４ｂが接続されている。抵抗５および７は整
合回路間を橋渡しするように設けられ、コンデンサ６は
整合回路３ｂおよび３ｄの上に密着して設けられてい
る。また、コンデンサ６と整合回路３ａおよび３ｃとは
金線４０で接続されている。F is provided between the input matching circuit 3a and the output matching circuit 3c, and between the input matching circuit 3b and the output matching circuit 3d.
The ETs 4a and 4b are connected. The resistors 5 and 7 are provided so as to bridge the matching circuits, and the capacitor 6 is provided in close contact with the matching circuits 3b and 3d. The capacitor 6 and the matching circuits 3a and 3c are connected by a gold wire 40.
【００１１】次に動作について説明する。基本的な動作
は図３で説明した従来のマイクロ波増幅回路と同じであ
るが、入力整合回路３ａと３ｂの間、および出力整合回
路３ｃと３ｄの間にコンデンサ６を接続することによっ
て、マイクロ波信号に対して整合回路間が接続されるの
でＦＥＴの動作バランスを保つことができ、ＦＥＴの動
作バランスがくずれて出力信号レベルが著しく低下する
といった問題が解消される。また、コンデンサ６を接続
することで整合回路間に直流および低周波信号の伝達ル
ートが形成された場合には、直流および低周波信号成分
による電流帰還の現象が発生しやすくなるので、抵抗７
を並列に接続してこの現象を解消している。Next, the operation will be described. The basic operation is the same as that of the conventional microwave amplifier circuit described in FIG. 3, but by connecting the capacitor 6 between the input matching circuits 3a and 3b and between the output matching circuits 3c and 3d, Since the matching circuits are connected to the wave signal, the operational balance of the FETs can be maintained, and the problem that the operational balance of the FETs is disturbed and the output signal level is significantly lowered is solved. Further, when a direct current and low frequency signal transmission route is formed between the matching circuits by connecting the capacitor 6, the phenomenon of current feedback due to the direct current and low frequency signal component is likely to occur.
Are connected in parallel to eliminate this phenomenon.
【００１２】ここで、コンデンサ６および抵抗７の設置
位置は、マイクロ波の伝送バランスをくずさずに、入力
整合回路３ａと３ｂおよび出力整合回路３ｃと３ｄとの
間であれば特に明確に指定されない。Here, the installation positions of the capacitor 6 and the resistor 7 are not particularly specified as long as they are between the input matching circuits 3a and 3b and the output matching circuits 3c and 3d without degrading the microwave transmission balance. .
【００１３】[0013]
【発明の効果】請求項１記載のマイクロ波半導体回路装
置によれば、複数のトランジスタの動作バランスを正常
に保つことができ、入力整合回路間および出力整合回路
間での電流帰還による発振を防止することができるの
で、安定に動作するマイクロ波半導体回路装置を得るこ
とができる。According to the microwave semiconductor circuit device of the first aspect, the operation balance of the plurality of transistors can be normally maintained, and oscillation due to current feedback between the input matching circuits and between the output matching circuits is prevented. Therefore, a microwave semiconductor circuit device that operates stably can be obtained.
【図１】本発明に係るマイクロ波半導体回路装置の回路
図である。FIG. 1 is a circuit diagram of a microwave semiconductor circuit device according to the present invention.
【図２】本発明に係るマイクロ波半導体回路装置のパタ
ーン図である。FIG. 2 is a pattern diagram of a microwave semiconductor circuit device according to the present invention.
【図３】従来のマイクロ波半導体回路装置の回路図であ
る。FIG. 3 is a circuit diagram of a conventional microwave semiconductor circuit device.
６ コンデンサ ７ 抵抗 ３ａ、３ｂ、３ｅ 入力整合回路 ３ｃ、３ｄ、３ｆ 出力整合回路 ３１、３２ 入力整合基板 ３３、３４ 出力整合基板 ４０ 金線 6 Capacitor 7 Resistance 3a, 3b, 3e Input matching circuit 3c, 3d, 3f Output matching circuit 31, 32 Input matching board 33, 34 Output matching board 40 Gold wire
─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成５年９月１０日[Submission date] September 10, 1993
【手続補正１】[Procedure Amendment 1]
【補正対象書類名】図面[Document name to be corrected] Drawing
【補正対象項目名】図３[Name of item to be corrected] Figure 3
【補正方法】変更[Correction method] Change
【補正内容】[Correction content]
【図３】 [Figure 3]
Claims (1)
力整合回路と、 前記トランジスタの一方の電極に各々接続された複数の
出力整合回路と前記入力整合回路間および前記出力整合
回路間に接続された抵抗とを備えるマイクロ波半導体回
路装置において、 前記入力整合回路間および前記出力整合回路間に、さら
にコンデンサおよび抵抗を並列に接続して備えたことを
特徴とするマイクロ波半導体回路装置。1. A plurality of transistors arranged in parallel, a plurality of input matching circuits each connected to a control electrode of the transistor, a plurality of output matching circuits each connected to one electrode of the transistor, and the input. A microwave semiconductor circuit device including resistors connected between matching circuits and between the output matching circuits, further comprising a capacitor and a resistor connected in parallel between the input matching circuits and between the output matching circuits. And a microwave semiconductor circuit device.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5116845A JPH06334054A (en) | 1993-05-19 | 1993-05-19 | Microwave semiconductor circuit device |
| KR1019940009698A KR0134747B1 (en) | 1993-05-19 | 1994-05-03 | Semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5116845A JPH06334054A (en) | 1993-05-19 | 1993-05-19 | Microwave semiconductor circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06334054A true JPH06334054A (en) | 1994-12-02 |
Family
ID=14697056
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5116845A Pending JPH06334054A (en) | 1993-05-19 | 1993-05-19 | Microwave semiconductor circuit device |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPH06334054A (en) |
| KR (1) | KR0134747B1 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012054874A (en) * | 2010-09-03 | 2012-03-15 | Mitsubishi Electric Corp | High frequency amplifier |
| JP2013098339A (en) * | 2011-10-31 | 2013-05-20 | Sumitomo Electric Device Innovations Inc | High-frequency circuit device |
| US9602068B2 (en) | 2013-08-29 | 2017-03-21 | Mitsubishi Electric Corporation | High-frequency power amplifier |
-
1993
- 1993-05-19 JP JP5116845A patent/JPH06334054A/en active Pending
-
1994
- 1994-05-03 KR KR1019940009698A patent/KR0134747B1/en not_active IP Right Cessation
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012054874A (en) * | 2010-09-03 | 2012-03-15 | Mitsubishi Electric Corp | High frequency amplifier |
| JP2013098339A (en) * | 2011-10-31 | 2013-05-20 | Sumitomo Electric Device Innovations Inc | High-frequency circuit device |
| US9602068B2 (en) | 2013-08-29 | 2017-03-21 | Mitsubishi Electric Corporation | High-frequency power amplifier |
Also Published As
| Publication number | Publication date |
|---|---|
| KR0134747B1 (en) | 1998-04-30 |
| KR940026964A (en) | 1994-12-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH11298263A (en) | High frequency power amplifier circuit and high frequency power amplifier module | |
| JP2002335136A (en) | High-frequency semiconductor device | |
| JP2643662B2 (en) | High power field effect transistor amplifier | |
| US11283145B2 (en) | Variable attenuator | |
| JPH06334054A (en) | Microwave semiconductor circuit device | |
| US5032806A (en) | Loaded line phase shifter | |
| US8344809B2 (en) | System and method for adjusting gain frequency response of RF power amplifier | |
| US6239670B1 (en) | Short-stub matching circuit | |
| JP2000106501A (en) | Power distribution circuit and power synthesizing circuit | |
| JP3886642B2 (en) | High frequency gain variable amplifier circuit | |
| JP3448833B2 (en) | Transmission line and semiconductor device | |
| JP3130857B2 (en) | High frequency circuit bias circuit and high frequency matching circuit | |
| JPH05136607A (en) | Micro wave transistor for electric power amplification | |
| JPH04287507A (en) | Field effect transistor amplifier | |
| JP3132949B2 (en) | Field effect transistor switch device | |
| JP3120762B2 (en) | amplifier | |
| JP2996906B2 (en) | Monolithic microwave integrated circuit | |
| JP2633368B2 (en) | Microwave integrated circuit | |
| JPH0918201A (en) | Dc circuit contained in high frequency circuit | |
| JP3070519B2 (en) | Microwave monolithic integrated circuit | |
| JP2001094365A (en) | Low distortion power amplifier | |
| JPH09275303A (en) | Microwave switch | |
| JPH03274902A (en) | Semiconductor device | |
| JP2001094361A (en) | High frequency amplifier circuit | |
| US5430412A (en) | Amplifier with lossless feedback |