JPH0631779Y2 - Electronic tuning device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to an electronic tuning device using a voltage synthesizer system.

[Prior Art] Conventionally, a voltage synthesizer type tuning device that generates tuning voltages corresponding to a plurality of channels and tunes at an oscillation frequency according to the tuning voltages to perform tuning has been put into practical use.

In this method, tuning voltage data of each channel is stored in advance in the memory as channel data, and since it is sufficient to generate the tuning voltage according to the channel data, tuning can be performed relatively quickly and the input electric field This has an advantage that the tuning operation can be performed stably and surely even with respect to variations in strength.

[Problems to be Solved by the Invention] However, in the above system, when this tuning device is used in a portable device, the local oscillation frequency fluctuates due to environmental changes and vibrations, which causes tuning deviations and adjacent noises. There was a case where mistuning to the station occurred.

This invention was made in view of the above situation,
An object of the present invention is to provide an electronic tuning device that can reliably tune to a local oscillation frequency fluctuation.

[Means and Actions for Solving the Problem] The present invention is directed to data on a tuning voltage that tunes to a center frequency of a frequency range in which a synchronization signal can be detected for each channel, and a constant value in both positive and negative directions with respect to the tuning frequency. The data regarding the tuning voltage with the frequency shifted is stored as a set, and when the data regarding the tuning voltage of the center frequency for each channel is read out from the above-mentioned storage means, the data is stored together with this plus and minus both. The data related to the tuning voltage shifted by a certain frequency is also read out, and the direction of the deviation of the tuning of the local oscillation frequency is identified from the tuning selection state by the read data.
The tuning deviation of the local oscillation frequency is corrected, and the tuning selection is performed based on the corrected local oscillation frequency and the direction of the tuning deviation.

[Embodiment] An embodiment in which the present invention is applied to a television channel selection device will be described below with reference to the drawings.

FIG. 1 shows the circuit configuration. In the figure, 11 is an antenna, and the radio wave received by this antenna 11 is a high frequency amplifier circuit.
After being amplified to an appropriate level at 12, it is sent to the mixing circuit 13.

On the other hand, 22 is an up (UP) key 22a for instructing tuning up by auto tuning, a down (DOWN) key 22b for instructing the same tuning down, and a set (SET) key 22 for setting channel data.
c, a key input section provided with a clear (CLEAR) key 22d for releasing the channel data set by the set key 22c, and a key input signal by a key operation of the key input section 22 controls the operation of other circuits. Is sent to the tuning control circuit 23. The tuning control circuit 23 is provided with a tuning counter 23a therein. The tuning control circuit 23 judges the operation key from the key input signal of the key input section 22 and stores the memory 24 storing the tuning voltage data of each channel based on the judgment result. The tuning voltage data of the channel corresponding to the key operation by addressing is read and output to the tuning voltage generating circuit 19 in the form of a PWM signal.
The tuning voltage signal which has been smoothed by the tuning voltage generating circuit 19 and converted into a proper voltage is sent to the local oscillation circuit 16 that follows. The local oscillation circuit 16 outputs a local oscillation wave having an oscillation frequency corresponding to the tuning voltage signal to the mixing circuit 13. Mixed circuit
Reference numeral 13 mixes the high frequency amplified reception radio wave from the high frequency amplification circuit 12 with a local oscillation wave having an oscillation frequency, frequency-converts the reception radio wave and outputs the frequency converted to the intermediate frequency amplification circuit 14. The intermediate frequency amplifier circuit 14 amplifies the intermediate frequency (the characteristics of which are shown in FIG. 2) of the transmitted signal at an appropriate level.

The amplified intermediate frequency signal is detected by the video detection circuit 15 and sent to the video / audio processing circuit in the subsequent stage for proper signal processing, and the sync separation circuit 18 extracts the sync signal. This synchronization signal is used for the deflection circuit and the PLL ( P ha
together sent to se L ocked L oop) circuit, is sent to a synchronization detection circuit 21. The synchronization detection circuit 21 detects the presence / absence of a synchronization signal, and sends a signal indicating the presence / absence of a synchronization signal, which is the detection result, to the tuning control circuit 23.

On the other hand, the intermediate frequency signal fp amplified to a proper level by the intermediate frequency amplifying circuit 14 is frequency-voltage converted by the AFC circuit 17 into a substantially S-shaped waveform signal as shown in FIG. Added to 16 to form an AFC loop,
It is sent to the level comparator 20 while improving the stability after tuning. The level comparator 20 obtains the Pu and Pd signals from the substantially S-shaped waveform signal as shown in FIG. 4 and outputs it to the tuning control circuit 23. The tuning control circuit 23 uses the Pu, Pd from the level comparator 20.
The tuning point is determined by the signal and the signal from the synchronization detection circuit 21 indicating the presence or absence of the synchronization signal, and the tuning point is stored in the memory 24.

The memory 24 stores the tuning voltage data of each channel as described above. For example, the tuning voltage data area 24a for storing the tuning voltage data of channels 1 to 12 and the tuning voltage data of a preset specific channel are stored. An address data area 24b for storing the address in the area 24a as data, of which the tuning voltage data area 24a has a map configuration as shown in FIG. In the figure, the tuning voltage data area 24
In a, a regular tuning point like the conventional one (5 as shown in FIGS. 3 and 4 in Japanese TV broadcasting)
Instead of storing tuning voltage data of 8.75 MHz), the sync signal detectable range shown in FIG. 4, that is, in Japan, depending on the characteristics of the intermediate frequency filter, it is almost in the middle of 54 to 59 MHz. The tuning voltage data of 57 MHz is stored as tuning voltage data of each channel (hereinafter referred to as "center f data" in the text and drawings). In addition, the center f data is used as a reference to prevent the synchronization signal from being out of the detectable range (1-2 MHz).
The tuning voltage data (both abbreviated as "plus f data" and "minus f data" in the following text and drawings) shifted in both plus and minus directions in z) are also stored together with the center f data. Therefore, in the tuning voltage data area 24a, 1 channel (CH1) to 12 channels (CH1)
Corresponding to each channel of 2), three data of center f data (represented as "CH1 data" in the figure), minus f data and plus f data are stored as a set.

In the above configuration, when the set key 22c of the key input section 22 is operated to perform the channel data setting process as an initial setting when the power is turned on, the operation shown in FIG. 6 is performed in response to the operation. Be done.

In FIG. 6, first, as shown in step A01, the tuning search operation is started while sequentially counting up the tuning counter 23a in the tuning control circuit 23 from the lower end of the designated band, for example, the lower end of the VHF band in the VHF band. After that, tuning up is performed until it is determined that the synchronization is detected by the sweep A02. When it is determined that the first sync signal, that is, the sync signal of channel 1 is detected, the process proceeds to step A03,
Whether or not the signal Pu shown in FIG. 4 output by the level comparator 20 judging and outputting the output level of the AFC circuit 17 has changed from high to low while further tuning up within the range of this sync signal detection. to decide. When it is determined that the signal Pu has changed from high to low, the output level of the AFC circuit 17 is at the position of point P shown in FIG. 4, so the up search is temporarily stopped, and then step A
Proceed to 04, the center f data is a point that is positively shifted by a certain amount, for example 1.7 MHz, to the intermediate frequency at this point, and a certain amount is shifted from this center f data in positive and negative directions by a certain amount, for example, negative f data. , Plus f data is calculated by calculation, and addresses "00" to "02" of the tuning voltage data area 24a of the memory 24 are calculated.
The data is stored in the position as channel 1 data.

Then, in step A05, it is determined whether or not the current tuning frequency is at the upper end of the band. If NO is determined here, the process from step A02 is repeated again.

Thereafter, the center f data, the minus f data, and the plus f data of channels 2 to 12 are stored in the tuning voltage data area 24a of the memory 24 in the same manner as described above.

Then, when the setting of the channel data in the same band is completed and it is judged in step A05 that the tuning frequency is at the upper end of the band, the processing of FIG. 4 is completed.

The above has described the channel setting operation within the VHF band, but since the same applies to UHF, the description thereof is omitted.

A process for actually selecting a channel after setting the respective channel data as described above will be described with reference to FIG. This figure shows the processing corresponding to the operation of the up key 22a of the key input unit 22, and at the beginning of the operation, first, step B
As shown in 01, the center f data, the minus f data, and the plus f data, which are the channel data one above the currently tuned channel, are read from the corresponding addresses in the tuning voltage data area 24a of the memory 24, and are read by the respective data. Synchronize in sequence. Then step B
As indicated by 02, it is determined whether or not the sync signal is detected for each of the three data. If it is determined that the sync signal has been detected in all three data, there is almost no tuning deviation according to this tuning data, and even if there is, it is a value of 500 kHz or less, so there is no problem. Go forward, center f
The data is set in the tuning counter 23a to be tuned, and thereafter the tuning is sequentially increased as shown in step B04. Then, in step B05, tuning up is performed up to the position where the state of the signal Pd is determined to be reversed, that is, the position of point Q shown in FIG. If it is determined that the counter has been inverted, the tuning counter 23a at that time is determined in step B06.
Hold the count value of, and then proceed to step B06 to tune down sequentially. In the following step B07, tuning down is performed to the position where it is determined that the state of the signal Pu is inverted from low to high, that is, the position of point P shown in FIG. At the time when it is judged to have been reversed, the tuning counter at that time is determined at step B08.
The count value of 23a is held as in step B05. After that, as shown in step B09, the above steps B05, B
Tuning counter 23 at the positions of points P and Q held in 08
The intermediate value of the count value of a is obtained by calculation, and the value is newly set in the tuning counter 23a as a value indicating a normal tuning point, and this processing is ended.

If it is determined in step B02 that the sync signal is detected only in the minus f data and the center f data, and the sync signal is not detected in the plus f data, the actual tuning point is 500 kHz or more in the high frequency direction. Since it is deviated, the process goes to step B10 to set the center f data in the tuning counter 23a, and then the tuning is performed according to the value of the tuning counter 23a in step B11 to see if the signal Pd is at the high level. Judge whether or not. If NO is determined, the center f data is 58.
Since the frequency is lower than 8 MHz, the center f data is used to move to the processing of steps B04 to B09 to obtain a regular tuning point. If YES is determined, it means that the center f data is 58 to 9 MHz. Therefore, in the subsequent step B12, the minus f data is newly set, and then the process shifts to the above steps B04 to B09 to perform regular tuning. Get the points.

Further, when it is determined in step B02 that the sync signal is detected only in the minus f data and the sync signal is not detected in the center f data and the plus f data,
Since the actual center f data is largely deviated in the direction of high frequency, the process goes to step B10 to set minus f data in the tuning counter 23a, and then in step B14 according to the value of the tuning counter 23a. Tuning is performed and it is determined whether the signal Pd is at a high level. If NO is determined, the minus f data is used as it is, and the process proceeds to steps B04 to B09 to obtain a regular tuning point. If YES is determined, the process proceeds to step B15 to start the tuning down search from the position of the minus f data, and the tuning down is performed until it is determined at step B16 that the signal Pu is inverted from low to high. After continuing, above steps B04-B09
Then, the regular tuning point is obtained.

Also, in step B02 above, plus f data and center f
When it is determined that the sync signal is detected only in the data and the sync signal is not detected in the minus f data, or the sync signal is detected only in the plus f data and the sync signal is detected in the center f data and the minus f data. If it is determined that the normal tuning point is not present, it means that the actual tuning point is shifted by 500 kHz or more in the lower frequency direction, and the regular tuning point is obtained by the processing of steps B04 to B09.

If no sync signal is detected in any of the tuning by center f data, minus f data and plus f data in step B02, it is determined that there is no input, and again in step B01 the next channel After designating the data, the processes from step B02 are performed.

If the deviation direction and the deviation width of the tuning of each channel are almost the same in the same band, it is not necessary to perform the above operation for each channel, and the deviation direction and deviation width obtained by the tuning processing of the first channel By applying the data of other channels to other channels, the search time can be shortened and the memory can be saved.
It is possible to reduce the use area of 24.

The above-mentioned FIG. 7 corresponds to the operation of the up key 22a, but the operation of the down key 22b, the tuning data of the next lower channel whose tuning frequency is lower than the channel currently tuned for each operation. Since the processing is performed in the same manner as in FIG. 7 above, the description thereof will be omitted.

[Effects of the Invention] As described in detail above, according to the present invention, data relating to the tuning voltage for tuning to the center frequency of the frequency range in which the synchronizing signal can be detected for each channel, and the plus and minus directions with respect to the tuning frequency. Both plus and minus are stored as a set with data relating to the tuning voltage with a certain amount of frequency shifted, and at the same time when the data relating to the tuning voltage at the center frequency for each channel are read from the storage means. The data related to the tuning voltage shifted by a constant frequency is also read together, and the direction of the deviation of the tuning of the local oscillation frequency is identified from the tuning selection state by the read data, and the deviation of the local oscillation frequency is corrected. Since the tuning selection is performed based on the corrected local oscillation frequency and the direction of tuning deviation, the local oscillation frequency It is possible to provide an electronic tuning device capable of responding to the fluctuations of the above and capable of quick and reliable tuning.

[Brief description of drawings]

FIG. 1 shows an embodiment of the present invention. FIG. 1 is a block diagram showing a circuit configuration, FIG. 2 is a characteristic diagram showing an output signal waveform by an intermediate frequency amplifier circuit, and FIG. 3 is an output signal by an AFC circuit. FIG. 4 is a characteristic diagram showing a waveform, FIG. 4 is a characteristic diagram similarly showing the output signal waveform by the AFC circuit in correspondence with the detectable range of the synchronizing signal, and FIG. 5 is a memory map of the tuning voltage data area of the memory of FIG. FIG. 6, FIG. 6 is a flowchart showing the processing contents for the operation of the set key, and FIG. 7 is a flowchart showing the processing contents for the operation of the up key. 11 …… antenna, 12 …… high frequency amplification circuit, 13 …… mixing circuit, 14 …… intermediate frequency amplification circuit, 15 …… video detection circuit, 16
...... Local oscillation circuit, 17 ...... AFC circuit, 18 …… Synchronous separation circuit, 19 …… Tuning voltage generation circuit, 20 …… Level comparator,
21 ... Synchronous detection circuit, 22 ... Key input section, 22a ... Up (UP) key, 22b ... Down (DOWN) key, 22
c …… SET key, 22d …… Clear (CLE
AR) key, 23 ... Tuning control circuit, 24
...... Memory, 24a ...... Tuning voltage data area, 24b ......
Address data area.

Claims (1)

[Scope of utility model registration request] 1. An electronic tuning apparatus of a voltage synthesizer system which generates tuning voltages corresponding to a plurality of channels and performs tuning tuning at a local oscillation frequency corresponding to the tuning voltages, detects a sync signal for each channel. Generating means for generating data on a tuning voltage to be tuned to the center frequency of the frequency range to be obtained, and data on a tuning voltage obtained by shifting the frequency by a certain amount in both positive and negative directions with respect to the tuning frequency, and each channel by the generating means. And a storage means for storing the tuning voltage data as a group and a pair of positive and negative constant frequencies which are stored at the same time when the data concerning the tuning voltage of the center frequency for each channel are read from the storage means. Read the data related to the shifted tuning voltage,
The direction of the deviation of the tuning of the local oscillation frequency is identified from the tuning channel selection state based on the read data, and a correction means for correcting the tuning deviation of the local oscillation frequency is provided, and the corrected local oscillation frequency and the tuning An electronic tuning device characterized in that tuning tuning is performed based on the direction of deviation.