JPH0630350A - Character and graphic information synthesizer - Google Patents

Abstract

PURPOSE:To set the size of a slave screen based on a teletext broadcasting the same as that of a slave screen of a television broadcasting with simple configuration. CONSTITUTION:A slave signal changeover circuit 9 selects either of a television signal and a synchronizing signal SYNC and gives the selected signal to a V/C/D circuit 16. The V/C/D circuit 16 generates synchronizing signals PHD, PVD for a slave screen based on the synchronizing signal SYNC. A signal conversion circuit 32 converts an output of a teletext broadcasting decoder 14 into Y, R-Y, B-Y signals, they are given to a memory and compression interpolation circuit 31 via a selector 33 and an A/D converter 21. The memory and compression interpolation circuit 31 is controlled by the synchronizing, signals PHD, PVD to compress and interpolate the teletext broadcasting signal, and the output of the memory and compression interpolation circuit 31 is outputted while being superimposed on a master, signal from a selector 17 through a selector 18. The teletext broadcasting signal is given to the memory and compression interpolation circuit 31, in which compression and interpolation processing is implemented and the size of the teletext slave screen is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a character / graphic information synthesizing apparatus suitable for a television receiver having a character multiplex receiver capable of displaying a small screen based on a television signal and a character multiplex broadcast signal on a main screen. Regarding

[0002]

2. Description of the Related Art Conventionally, a television receiver or the like has been put into practical use which has a child screen function for displaying a child screen on a part of an image based on a received television signal or an external video signal. There is. FIG. 7 is an explanatory diagram for explaining this child screen display. The small screen 2 is displayed at the lower right of the main screen 1 with a size reduced to 1/9 or 1/12 of the size of the main screen. The size of the sub screen 2 is set to be sufficiently smaller than that of the main screen 1 in consideration of the visibility of the main screen 1.

Also, television receivers having a character multiplex broadcast receiver built therein have become widespread. With the small screen function of this television receiver, a reduced screen of character multiplex broadcasting (hereinafter referred to as a small screen) can be displayed on a part of a normal television image. FIG. 8 is an explanatory diagram for explaining the display in this case. The character screen 3 is reduced to 1/4 and displayed on a part of the main screen 1.

FIG. 9 is an explanatory view showing a screen in which both a small screen (hereinafter referred to as a TV small screen) 2 based on a television signal and a character small screen 3 based on the character multiplex broadcasting are displayed. Further, FIG. 10 is a block diagram showing a conventional character / graphic information synthesizing apparatus which enables the display of FIG.

The device shown in FIG. 10 can receive UHF broadcast, VHF broadcast, satellite broadcast and teletext, and displays the parent screen and the child screen by selecting these broadcast signals and three systems of external video signals. be able to. For the sake of convenience of explanation, the synchronization / audio signal processing unit and the CRT drive circuit are included.
Illustration and description of a system control unit including a deflection processing unit and an input unit such as a remote controller are omitted.

A high-frequency video signal of UHF or VHF broadcasting (hereinafter referred to as terrestrial broadcasting) induced in the antenna 5 is supplied to the tuner 6. The tuner 6 selects a predetermined channel of the high frequency video signal and outputs it to the IF circuit 7. The IF circuit 7 performs video demodulation and outputs a baseband video signal to the parent signal switching circuit 8 and the child signal switching circuit 9. On the other hand, the satellite broadcasting signal induced in the antenna 10 for receiving the satellite broadcasting is 2
The signal of the predetermined channel is selected by the nd converter 11 and converted into the second intermediate frequency signal, and the video processing circuit 12
Is supplied to. The video processing circuit 12 demodulates the second intermediate frequency signal and outputs a baseband video signal to the parent signal switching circuit 8 and the child signal switching circuit 9. External video signals of three systems are also input to the parent signal switching circuit 8 and the child signal switching circuit 9 via the external terminal 13.

The video signal from the IF circuit 7 is also given to the character multiplex broadcast decoder 14. Teletext broadcast decoder
Reference numeral 14 separates a character signal inserted in a predetermined horizontal scanning period of a vertical blanking period of a VHF broadcast signal, decodes character and graphic information, and writes pattern data of a dot pattern in a display memory (not shown). Further, the character multiplex broadcast decoder 14 outputs a composite synchronous signal SYNC for character multiplex broadcast display to the master signal switching circuit 8. In addition, this composite synchronization signal S
YNC is selected when only the text multiplex broadcast screen is displayed, and in this case, the deflection of the CRT drive circuit (not shown) is controlled by the synchronization signal SYNC that matches the display of the text multiplex broadcast decoder.

The master signal switching circuit 8 selects a source to be displayed as a master screen, and the slave screen switching circuit 9 selects a source to be displayed as a slave screen. The video signal selected by the master signal switching circuit 8 is supplied as a master signal to the video amplifier circuit, the color signal reproducing circuit, and the synchronizing circuit (hereinafter referred to as V / C / D circuit) 15. The V / C / D circuit 15 separates a sync signal from the input video signal and outputs a drive signal for controlling horizontal and vertical deflection to a CRT drive circuit (not shown), and also a luminance signal Y and a color difference signal RY,
Play BY. These luminance signal Y and color difference signal R
-Y, BY are supplied to the selector 18 via the selector 17 and converted into primary color R, G, B signals in the selector 18. Further, the primary color R, G, B signals are transferred to C via the selector 19.
The parent screen is displayed on the display screen (not shown) by being supplied to the RT drive circuit. Further, the pattern insertion signal YO for superimposing from the OSD (on-screen display) circuit 20 is superimposed on the parent signal by the selector 17, and superimposing display such as channel display is performed on the parent screen.

On the other hand, the child signal from the child signal switching circuit 9 is V
/ C / D circuit 16 The V / C / D circuit 16 reproduces a luminance signal and a color difference signal from the child signal and outputs them to an analog-digital converter (hereinafter referred to as A / D) 21, and horizontal and vertical synchronizing signals indicating a display area of the child screen. PH
The D and PVD are output to the memory and the compression interpolation circuit 22. A
/ D21 converts the image signal for the child screen into a digital signal and outputs it to the memory and the compression interpolation circuit 22. The memory and compression / interpolation circuit 22 includes horizontal and vertical synchronization signals PHD and PVD.
Writing and reading are controlled by, the input image signal is stored for one field, and the video data stored for every 3 pixels or 4 pixels is read horizontally and vertically,
Perform compression interpolation processing. Digital-to-analog converter (hereinafter,
The reduced image data from the memory and the compression interpolation circuit 31 is input to the D / A 23, and the D / A 23 converts the reduced image data into an analog signal and outputs it to the selector 18. The selector 18 is a selector based on the synchronization signals PHD and PVD.
By selecting the output of D / A23 instead of the output of 17, the television child screen is reduced and displayed at a predetermined position on the parent screen.

The character multiplex broadcasting decoder 14 reads all the pattern data of the dot pattern stored in the display memory and outputs it to the selector 19, and at the same time, reads it every other pixel horizontally and vertically to reduce it to 1/4. The child signal of the character multiplex broadcast is output to the selector 19. The selector 19 receives a character selection signal YS from the character multiplex broadcast decoder 14 and selects the output of the selector 19 instead of the output of the selector 18 at the timing of the character selection signal YS. As a result, it is possible to display the character sub-screen of the character multiplex broadcast on a part of the parent screen.

FIG. 9 shows a screen display in this case.
A television child screen 2 based on a television broadcast or an external video signal is displayed on the lower right of the main screen 1, and a character child screen 3 based on the character multiplex broadcast is displayed on the upper right of the parent screen 1.
As described above, in the case of displaying only the character multiplex broadcast screen, the master signal switching circuit 8 uses the composite sync signal SYN.
Select C to match the synchronization of the CRT drive circuit with the synchronization of the teletext signal.

In this way, it is possible to display three types of displays at the same time by displaying the television sub-screen and the character sub-screen on the display based on the television broadcast or the external video signal. However, as shown in FIGS. 8 and 9, the character screen 3 is relatively larger than the television screen 2 and has a drawback of obstructing the display of the master screen 1. Therefore, it is conceivable to increase the compression ratio of the character sub-screen like the TV sub-screen. However, if the pixels are simply thinned out to increase the compression ratio, it becomes difficult to read the characters. Therefore, in this case, it is necessary to provide an interpolation circuit, which significantly increases the cost. Further, the character multiplex broadcast decoder 14 employs a block coloring method.
In the block coloring method, for example, coloring is performed for each block of 4 × 4 pixels, and the character multiplex decoder 14 may have a memory for holding one coloring data for 16-dot pattern data. . However, if the compression ratio is set to, for example, 1/9, which is the same as that of the television child screen, the colored block and the display data do not correspond to each other. Therefore,
In this case, for example, it is necessary to change to a method of coloring on a pixel-by-pixel basis, the memory capacity for coloring becomes 16 times as large as that of the block coloring method, and a major circuit modification is required.

By the way, in recent years, a wide screen having a horizontally long (16: 9) aspect ratio has been put into practical use as compared with the current NTSC system aspect ratio (4: 3). Some television receivers having this wide screen can display the current NTSC system image with an aspect ratio of 4: 3 in consideration of compatibility, and can display the NTSC image on a small screen. Some are possible.

11 and 12 are explanatory views for explaining this display. Due to the difference in aspect ratio, NTSC
When the image is displayed in the center of the wide screen 25, a blank part 26 (hatched part) where the image is not displayed appears on the left and right of the wide screen 25. A television child screen 28 is displayed on the lower right of the parent screen 27. Further, in FIG. 12, the parent screen 27 is wide screen 25.
It is displayed near the left side of. In this case, the margin portion 26 is generated on the right side of the wide screen 25, and the television child screen 28 can be displayed in the margin portion 26 without blocking the parent screen 27. In FIG. 12, three television sub-screens 28, 28 ',
An example in which 28 ″ is displayed in the margin portion 26 is shown.

FIGS. 13 and 14 are explanatory views showing the display when the character screen is displayed on the wide screen. FIG. 13 is an example in which a character screen 29 is displayed on the upper right of the wide screen 25. Further, FIG. 14 is an example in which a television child screen 28 is displayed on the lower right of the margin portion 26 and a character child screen 29 is displayed on the upper right of the wide screen 25.

13 and 14, there is a drawback that the display of the parent screen 25 is obstructed by the character screen 29.

[0017]

As described above, in the above-described conventional character / graphic information synthesizing apparatus, when the child screen based on the character multiplex broadcasting is compressed at a high compression ratio so as not to interfere with the display of the main screen. In addition to the need for an interpolation circuit, it is necessary to change the coloring method, which causes a problem that the cost is significantly increased.

The present invention has been made in view of the above problems, and has a simple circuit configuration and compresses a character sub-screen with a compression ratio and image quality similar to those of a TV sub-screen and synthesizes and displays the character sub-screen. An object of the present invention is to provide a character / graphic information synthesizing device capable of performing

[0019]

A character / graphic information synthesizing apparatus according to the present invention generates a character image signal for displaying characters and graphic information, and a character for generating a composite synchronizing signal synchronized with the character image signal. Graphic information generating means, parent signal processing means for performing video processing on a television signal or the character image signal and outputting a video signal for displaying a parent screen based on these signals, the television signal and the composite signal. First selection means for selecting one of the synchronization signal and for outputting a sub-picture signal for displaying a sub-screen by performing video processing on the output of the first selection means and displaying the sub-screen. And a signal converting means for converting the character image signal into a video signal for display, and the first selecting means selects the television signal. In this case, the child video signal is selected, and when the first selection means is selecting the composite synchronizing signal, second selection means for selecting the output of the signal conversion means, and the child signal processing The output of the second selecting means is compressed and interpolated based on the synchronization signal from the means, and the output of the compression interpolating means is superimposed on the output of the parent signal processing means. The third selection means is provided.

[0020]

In the present invention, the second selecting means applies the video signal from the signal converting means to the compression interpolating means when the first selecting means selects the composite synchronizing signal synchronized with the character image signal. . The child signal processing means creates a synchronizing signal for displaying the child screen based on the composite synchronizing signal, and the compression interpolating means compresses and interpolates the video signal selected by the second selecting means based on the synchronizing signal. The third selecting means displays the child screen based on the character image signal in the parent screen by superimposing the output of the compression interpolating means on the video signal from the parent signal processing means. This makes it possible to display a small screen based on the character image signal with the same size and image quality as the small screen based on the television signal.

[0021]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a character / graphic information synthesizing apparatus according to the present invention. In FIG.
The same components as 0 are assigned the same reference numerals.

A high frequency image signal of terrestrial broadcasting is induced in the antenna 5, and a satellite broadcasting signal is induced in the antenna 10 for receiving satellite broadcasting. The high frequency video signal from the antenna 5 is supplied to the tuner 6, and the tuner 6 selects a predetermined channel of the high frequency video signal and outputs it to the IF circuit 7. The IF circuit 7 performs video demodulation and outputs the baseband video signal to the master signal switching circuit 8 and the slave signal switching circuit 9 and also to the character multiplex broadcast decoder 14. The satellite broadcast signal from the antenna 10 is given to the 2nd converter 11 and 2nd.
The converter 11 selects a signal of a predetermined channel, converts it into a second intermediate frequency signal, and supplies it to the video processing circuit 12. The video processing circuit 12 demodulates the second intermediate frequency signal and outputs a baseband video signal to the parent signal switching circuit 8 and the child signal switching circuit 9. External video signals of three systems are also input to the parent signal switching circuit 8 and the child signal switching circuit 9 via the external terminal 13.

The master signal switching circuit 8 selects a source to be displayed as a master screen, and the slave screen switching circuit 9 selects a source to be displayed as a slave screen. The parent signal switching circuit 8 and the child signal switching circuit 9 select the input video signal or the synchronizing signal SYNC based on the user operation and apply the parent signal and the child signal to the V / C / D circuits 15 and 16, respectively. . V /
The C / D circuit 15 separates a sync signal from the input video signal and outputs a drive signal for controlling horizontal and vertical deflection to a CRT drive circuit (not shown) and a luminance signal Y.
And the color difference signals RY and BY are reproduced and output to the selector 17. The OSD circuit 20 also creates a pattern insertion signal Y0 for superimposing and outputs it to the selector 17. The selector 17 superimposes the pattern insertion signal Y0 on the video signal from the V / C / D circuit 15 and outputs it to the selector 18.

The character multiplex broadcast decoder 14 decodes the character information inserted in a predetermined horizontal scanning period of the vertical blanking period of the VHF broadcast signal, and writes the dot pattern pattern data in a display memory (not shown). In addition, the teletext broadcasting decoder 14 uses a composite synchronization signal SY for displaying teletext.
The NC is output to the parent signal switching circuit 8 and the child signal switching circuit 9, and also to the memory and the compression interpolation circuit 22. The character multiplex broadcast decoder 14 creates Yx signals and R, G, B signals based on the pattern data stored in the display memory and outputs them to the signal conversion circuit 32, and also outputs R, G, B signals to the selector 19. To do. Also, a character multiplex broadcast decoder
The numeral 14 outputs to the selector 19 a character selection signal YS 'indicating the timing of displaying the character multiplex broadcast screen on the display. The signal conversion circuit 32 converts the Yx signal and the R, G, B signals into the luminance signal Y and the color difference signals RY, B.
-Y is created and output to the selector 33.

FIG. 2 is a circuit diagram showing a circuit for converting digital level R, G, B signals into analog level R, G, B signals in the signal conversion circuit 32 in FIG.

The Yx signal from the character multiplex broadcasting decoder 14 is for lowering the brightness of the character screen in the case of super display or the like, and is given to the AND circuits A1, A3, A5. The color signal G is given to the AND circuits A1 and A2, the color signal B is given to the AND circuits A3 and A4, and the color signal R is given to the AND circuits A5 and A6. The output terminals of the AND circuits A1 and A2 are connected via the resistors r2 and r3, and the connection point of the resistors r2 and r3 is connected to the power supply terminal 39 via the resistor r1.

The output terminals of the AND circuits A3 to A6 are also connected to the power supply terminals via resistors, like the AND circuits A1 and A2, but they are not shown.

When the Yx signal is "H", the color signal G is level-converted based on the resistors r1 to r3 and output as the analog color signal G. The same applies to the color signals B and R. When the Yx signal is "L", the color signal G is level-converted based on the resistors r3 and r1. In this case, the level of the output analog color signal G is set to be 1/2 of that when the signal Yx is "H". The same applies to the color signals B and R.

The output analog color signals R, G, B are supplied to a resistance matrix circuit (not shown), converted into a luminance signal Y and color difference signals RY, BY, and supplied to a selector 33.

The V / C / D circuit 16 for the child signal reproduces the luminance signal Y and the color difference signals RY and BY from the child signal and outputs it to the selector 33. Further, the V / C / D circuit 16 creates horizontal and vertical synchronizing signals PHD and PVD for determining the fetch timing of the child signal based on the video signal or the synchronizing signal SYNC from the child signal switching circuit 9. The data is output to the memory and the compression interpolation circuit 31, and also to the selector 18. The selector 33 is controlled by the time slot signal TS to select one of the output of the V / C / D circuit 16 and the output of the signal conversion circuit 32 and give it to the A / D 21. The A / D 21 samples the analog video signal based on the input clock φ, converts it into a digital signal, and outputs it to the memory and the field memories 34 to 36 of the compression interpolation circuit 31.

Each of the field memories 34 to 36 is a memory for displaying a child screen, and includes three field memories.
34 to 36 make it possible to display three child screens in the parent screen. Since the sub-pictures are displayed by using the sub-pictures from one V / C / D circuit 16, the three sub-pictures cannot be completely processed as a moving picture.
The image quality of video playback is slightly degraded. However, even in this case, since the display of the small screen is small, the deterioration of the image quality is not noticeable. Writing to the field memories 34 to 36 is performed in units of n fields. In this case, the field memory
The luminance signal Y and the color difference signals RY and BY are time-divisionally switched and given to 34 to 36 by the clock φ. The time slot signal TS changes in synchronization with the clock φ, and the field memories 34 to 36 take in time division by the time slot signal TS.

The data stored in the field memories 34 to 36 are read out based on the synchronizing signals PHD and PVD and given to the compression interpolation circuit 37. The compression interpolation circuit 37 thins out the read data and interpolates the thinned data by a correlation calculation using the read data, and outputs it to the D / A 23. The D / A 23 converts the output of the memory and the compression interpolation circuit 31 into an analog signal and outputs it to the selector 18. Selector 18
Generates a surface signal that determines the display area of the child screen on the screen from the synchronization signals PHD and PVD, and switches the signal from the selector 17 and the signal from the D / A 23 based on this surface signal.
Further, these luminance signal Y and color difference signals RY and BY
Is converted into R, G, B signals and output to the selector 19. The selector 19 is controlled by the character selection signal YS 'from the character multiplex broadcast decoder 14 to select the R, G, B signals from the selector 18 or the R, G, B signals from the character multiplex broadcast decoder 14 and not shown. It is designed to output to a display device.

Next, the operation of the embodiment thus constructed will be described with reference to FIGS. 3, 4 and 5. Figure 3
4 is an explanatory diagram for explaining writing to the field memories 34 to 36, FIG. 4 is an explanatory diagram for explaining a surface signal and display on the screen, and FIG. 5 is a diagram for explaining a character selection signal YS '. FIG.

The tuner 6 selects a predetermined channel of terrestrial broadcasting from the antenna 5 and gives it to the IF circuit 7, and the 2nd converter 11 selects a predetermined channel of satellite broadcasting from the antenna 10 to give it to the video processing circuit 12. . The video signal that has been video-processed and demodulated by the IF circuit 7 and the video processing circuit 12 is supplied to the parent signal switching circuit 8 and the child signal switching circuit 9. Further, three systems of external video signals are applied from the terminal 13 to the parent signal switching circuit 8 and the child signal switching circuit 9. I
The video signal from the F circuit 7 is also given to the teletext broadcast decoder 14. The teletext broadcast decoder 14 creates a synchronization signal SYNC from the teletext signal and decodes the teletext signal to decode the Yx signal and R, The G and B signals are output to the signal conversion circuit 32.

The master signal switching circuit 8 selects the source to be displayed as the master screen. The video signal selected by the parent signal switching circuit 8 is supplied to the V / C / D circuit 15, the horizontal and vertical synchronizing signals are separated, and the luminance signal Y and the color difference signals RY and BY are reproduced. It The output of the V / C / D circuit 15 is supplied to the selector 17, which then selects the OSD circuit 20.
The pattern insertion signal Y0 from the above is superimposed on the parent signal from the V / C / D circuit 15 and output to the selector 18.

On the other hand, the child signal switching circuit 9 selects a source to be displayed as a child screen. Now, terrestrial broadcasting or satellite broadcasting shall be displayed as a child screen. That is, the child signal switching circuit 9 selects a video signal based on terrestrial broadcasting or satellite broadcasting. This television video signal is applied to the V / C / D circuit 16 and the luminance signal Y and the color difference signals RY and B are supplied.
It is converted to -Y and given to the A / D 21 via the selector 33. The A / D 21 converts the child signal from the selector 33 into a digital signal and supplies it to, for example, the field memory 34 to store it. In this case, the field memory 34 fetches the luminance signal Y, the color difference signal RY, the luminance signal Y, the color difference signal BY, ... In this order based on the clock φ, as shown in FIG. The V / C / D circuit 16 supplies the synchronizing signals PHD and PVD to the field memory 34. The field memory 34 fetches based on the synchronizing signals PHD and PVD, and the stored data is, for example, 3 pixels or 4 pixels. It is read out for each pixel. The data from the field memory 34 is given to the compression interpolation circuit 37, interpolated, and given to the D / A 23. The D / A 23 converts the digital video signal into an analog signal and gives it to the selector 18. Selector 18 is a synchronization signal PH
The output of the selector 17 and the output of the D / A 23 are switched and selected according to the noodle signal based on D and PVD, converted into R, G and B signals and given to a CRT (not shown) via the selector 19.

FIG. 4 shows the display in this case. As described above, the horizontal and vertical display positions of the child screen 42 are set based on the surface signal 40. Thus, on the lower right side of the parent screen 41, the TV child screen reduced to 1/9 or 1/12
42 is displayed.

Next, it is assumed that three child screens, namely, a television child screen based on television broadcasting, a television child screen based on an external video signal, and a character child screen based on character multiplex broadcasting are displayed on the parent screen as child screens. . Since the character multiplex broadcasting screen is basically a still screen, it is not necessary to capture it in the memory and the compression interpolation circuit 31 at a high frequency like a television moving image, and only when a part of the screen is updated, it is possible to capture. Just go.

The child signal switching circuit 9 selects a video signal based on television broadcasting in a predetermined field, and this video signal is converted into a luminance signal Y and color difference signals RY and BY by a V / C / D circuit 16. It is converted and output. Y, R
The -Y and BY signals are supplied to the A / D 21 via the selector 33, converted into digital signals, and stored in the field memory 34, for example.

Next, the child signal switching circuit 9 selects the external video signal, and the V / C / D circuit 16 performs the sync separation and the video processing on the external video signal. Since the television image signal, the external video signal and the character multiplex broadcasting signal are asynchronous with each other, the synchronization signal PH from the V / C / D circuit 16 is used.
It takes several field periods for D and PVD to stabilize. When the synchronization signals PHD and PVD are stable, V / C / D
The video signal from the circuit 16 is supplied to the A / D 21 via the selector 33, converted into a digital signal, and given to the field memory 35, for example. The field memory 35 starts taking in the signal by the synchronizing signal PVD.

When the external video signal has been captured in a few field periods, the character multiplex broadcast signal is then captured. In this case, the child signal switching circuit 9 selects the sync signal SYNC from the character multiplex broadcasting decoder 14 to select V.
/ C / D circuit 16 When several fields have passed and the synchronization signals PHD and PVD from the V / C / D circuit 16 based on the synchronization signal SYNC become stable, the time slot signal TS
Thus, the selector 33 selects the output of the signal conversion circuit 32. The signal conversion circuit 32 uses the Y from the character multiplex broadcast decoder 14.
x signal and R, G, B signals are luminance signal Y and color difference signal R
-Y, BY is converted to Y, RY, BY
The signal is given to the A / D 21 and converted into a digital signal. The digital video signal from A / D21 is V / C / D
It is taken in and stored in the field memory 36 at the timing of the synchronizing signals PHD and PVD from the circuit 16. When the acquisition of the child signal based on the character multiplex broadcasting is completed, the acquisition of the television signal is repeated again.

On the other hand, the display of the three child screens is performed asynchronously with the loading into the field memories 34 to 36. That is, each field memory is sequentially driven by the sync signal of the parent signal.
34 to 36 data are read. The compression interpolation circuit 37 interpolates the read thinned-out data and supplies it to the D / A 23. D /
A23 converts the digital video signal into an analog signal and gives it to the selector 18. The selector 18 is provided with the synchronizing signals PHD and PVD corresponding to the respective child signals, creates a surface signal which determines the display position based on the synchronizing signals PHD and PVD, and from the selector 17 based on each surface signal. Each child signal read from the field memories 34 to 36 is superposed on the parent signal of. Further, the selector 18 selects the selected Y, RY, B
The -Y signal is converted into R, G, B signals and output to the selector 19.

The R, G, B signals from the selector 19 are supplied to a CRT (not shown) for display. In this case, for example, as in FIG. 12, a television sub-screen based on television broadcasting, a television sub-screen based on an external video signal, and a character sub-screen based on character multiplex broadcasting are simultaneously displayed in the right margin of the wide screen. can do. The character screen is compressed and interpolated by the memory and the compression interpolation circuit 31,
Similar to the television child screen, it is displayed in a size of 1/9 or 1/12 of the parent screen, and the display quality is good due to interpolation.

Next, when it is detected by the microprocessor (not shown) that the character multiplex broadcasting screen is updated, the sub-signal switching circuit 9 first stops the acquisition of the sub-signal based on the television broadcast or the external video signal. To do. Next, the slave signal switching circuit 9 selects the synchronization signal SYNC and starts capturing the slave signal based on the character multiplex broadcasting. When the acquisition of one field is completed, the slave signal switching circuit 9 selects the television signal and restarts the acquisition.

Since the child signal based on the television signal is not taken in during the several field period after the update of the character multiplex broadcast screen, the television child screen remains stationary during this period. But,
Since the display size is small, the quality of video playback is not noticeable.

When only the character multiplex broadcasting screen is displayed, the master signal switching circuit 8 selects the synchronizing signal SYNC. As a result, the deflection of the CRT drive circuit (not shown) is based on the synchronization signal SYNC. The character multiplex broadcast decoder 14 supplies a character selection signal YS 'to the selector 19. The character selection signal YS 'in this case corresponds to the entire screen as shown in FIG.
Is a character multiplex broadcasting decoder based on the character selection signal YS '.
The R, G, B signals from 14 are selected, and the character multiplex broadcast screen 45 in the entire area of the parent screen is displayed.

Further, the character multiplex broadcasting screen may be super-displayed on the parent screen. In this case, as shown in FIG. 5B, the selector 19 displays the super display 46 by the character multiplex broadcasting on the lower side of the main screen 41 by the character selection signal YS 'from the character multiplex broadcasting decoder 14.

As described above, in this embodiment, the character multiplex is performed by using the memory and the compression interpolation circuit for compressing and interpolating the television signal for displaying the child screen based on the television broadcast or the external video signal. Since the character multiplex signal from the broadcast decoder is compressed and interpolated, a character screen of a relatively small size can be displayed with high image quality, like a TV child screen. The circuit scale is small and the cost can be reduced.

In this embodiment, only one processing system is provided for displaying the child screen, but by providing a plurality of child screen processing systems, a complete moving image is displayed for each child screen. Processing becomes possible.

FIG. 6 is a block diagram showing another embodiment of the present invention. 6, the same components as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted.

In this embodiment, the signal conversion circuit 51 is used instead of the signal conversion circuit 32, and the output of the V / C / D circuit 16 is supplied to the selector 33 via the A / D 21. The Yx signal and the R, G, B signals from the character multiplex broadcasting decoder 14 are given to the signal conversion circuit 51. The signal conversion circuit 51 converts the input digital R, G, B signals into a digital luminance signal Y and digital color difference signals RY, BY, and outputs them to the selector 33. The selector 33 outputs the signal from the A / D 21 or the signal conversion circuit 51 based on the time slot TS.
Output is selected and output to the memory and the compression interpolation circuit 31.

In the embodiment thus constructed,
The signal conversion circuit 51 outputs a digital luminance signal Y and color difference signals RY and BY. The selector 33 switches and outputs the child signal based on the television signal digitally converted by the A / D 21 and the child signal based on the character multiplex broadcast from the signal conversion circuit 51. Other actions and effects are similar to those of the embodiment shown in FIG.

In this embodiment, the character multiplex broadcast screen is displayed by the character multiplex broadcast decoder 14 as a sub screen, but the present invention can be applied to the case where the output of the OSD circuit is displayed as a sub screen. it can. That is, in this case, instead of the character multiplex broadcast decoder 14 of FIG.
An SD circuit is provided, and the R, G, B signals from the OSD circuit are supplied to the signal switching circuit 32, and the synchronizing signal is supplied to the slave signal switching circuit 9. Then, the on-screen display can be reduced and displayed with good image quality.

[0054]

As described above, according to the present invention, it is possible to compress a character sub-screen with a simple circuit configuration at the same compression ratio and image quality as a television sub-screen and synthesize and display the character sub-screen. Have an effect.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a character / graphic information synthesizing apparatus according to the present invention.

FIG. 2 is a circuit diagram for explaining a signal conversion circuit in FIG.

FIG. 3 is an explanatory diagram for explaining the operation of the embodiment.

FIG. 4 is an explanatory diagram for explaining the operation of the embodiment.

FIG. 5 is an explanatory diagram for explaining the operation of the embodiment.

FIG. 6 is a block diagram showing another embodiment of the present invention.

FIG. 7 is an explanatory diagram illustrating a child screen display.

FIG. 8 is an explanatory diagram illustrating a child screen display.

FIG. 9 is an explanatory diagram for explaining child screen display.

FIG. 10 is a block diagram showing a conventional character / graphic information synthesizing apparatus.

FIG. 11 is an explanatory diagram for explaining child screen display on a wide screen.

FIG. 12 is an explanatory diagram for explaining child screen display on a wide screen.

FIG. 13 is an explanatory diagram for explaining child screen display on a wide screen.

FIG. 14 is an explanatory diagram for explaining child screen display on a wide screen.

[Explanation of symbols]

8 ... Parent signal switching circuit, 9 ... Child signal switching circuit, 14 ... Character multiplex broadcast decoder, 15, 16 ... V / C / D circuit, 17, 18, 1
9, 33 ... Selector, 32 ... Signal conversion circuit, 34 to 36 ... Field memory, 35 ... Compression interpolation circuit

Claims (1)

[Claims] 1. A character / graphic information generating means for generating a character image signal for displaying character and graphic information and a composite synchronizing signal synchronized with the character image signal, and a television signal or the character image signal. Parent signal processing means for performing video processing and outputting a video signal for displaying a parent screen based on these signals; first selecting means for selecting one of the television signal and the composite synchronizing signal; Child signal processing means for performing video processing on the output of the first selecting means to output a child video signal for displaying a child screen and outputting a synchronizing signal for displaying the child screen, and the character image. A signal converting means for converting the signal into a video signal for display; and, if the first selecting means selects the television signal, the child video signal is selected, and the first selecting Selection stage said if you select the composite synchronizing signal and the second selecting an output of the signal converting means unit and the second on the basis of a synchronization signal from the child signal processing means
And a third selecting means for compressing the output of the selecting means and for interpolating and outputting the compressed output, and a third selecting means for superimposing the output of the compression interpolating means on the output of the parent signal processing means and outputting the superimposed output. Characteristic character / graphic information synthesizer.