JPH06275635A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain an LDD region without a step of forming a side wall and a step of etching-back. CONSTITUTION:A gate electrode 3 composed of poly-silicon is formed on a P-type semiconductor substrate 1, and a source/drain layer 6, a high concentration N-type impurity layer, is formed on the P-type semiconductor substrate 1, by applying the gate electrode 3, wherein a photoresist pattern 4 is left, to a mask pattern and implanting ions 5. The gate electrode 3 under the photoresist pattern 4 is narrowed by side etching, and the photoresist pattern 4 is eliminated. By applying a gate electrode 7 after side etching to a mask pattern, and implanting ions 8, an LDD layer 9 of a low concentration N-type impurity layer is formed between the gate electrode 7 and the source/drain layer 6.

Description

Detailed Description of the Invention

[0001]

The present invention relates to an LDD (Lightl)
The present invention relates to a method of manufacturing a semiconductor device having a y Doped Drain) structure.

[0002]

2. Description of the Related Art With the miniaturization of devices, there is a problem that an internal electric field rises under a constant power supply voltage and reliability deteriorates. Therefore, a transistor having a structure having an LDD layer is used to relieve the internal electric field.

The structure of the LDD structure transistor is shown in FIG.
As shown in (c), the gate insulating film 2 is formed on the semiconductor substrate 21.
2, the gate electrode 23, and the semiconductor substrate 21 on both sides thereof
The LDD layer 25 is provided inside, and the source / drain layer 29 is provided outside the gate electrode 23 of the LDD layer 25.

A method of manufacturing the transistor is shown in FIGS. 2 (a) to 2 (c), for example. That is, as shown in FIG. 2A, the LDD layer 25 is formed by ion implantation 24 after forming the gate insulating film 22 and the gate electrode 23, and then, as shown in FIG. 2B, the sidewall oxide film. 26 is deposited on the entire surface and, as shown in FIG. 2C, a sidewall 27 is formed by etching back, and then the source / drain layer 2 is formed by ion implantation 28.
9 is formed.

[0005]

However, the conventional LDD
Since a transistor having a structure requires a step of over-etching the side wall oxide film 26 by using anisotropic etching called “etchback” which easily damages the surface of the semiconductor substrate 21 when forming the side wall 27. However, there is a problem that the source / drain layer 29 is damaged.

Therefore, an object of the present invention is to provide a method of manufacturing a semiconductor device having an LDD region without the step of forming a side wall and the step of etching back.

[0007]

In order to solve the above problems, the present invention forms a gate insulating film and a conductive film on a semiconductor substrate of the first conductivity type and forms a photoresist pattern on the semiconductor substrate. Forming and selectively etching the conductive film using the photoresist pattern as a mask pattern to form the gate electrode leaving the photoresist pattern, and ion implantation using the gate electrode with the photoresist pattern left as the mask pattern. A step of forming a high-concentration second-conductivity-type impurity layer in the semiconductor substrate by, and after the gate electrode is thinned by isotropic etching, the photoresist pattern is removed and the thinned gate electrode is removed. Forming a low concentration second conductivity type impurity layer in the semiconductor substrate by ion implantation as a mask pattern Than it is.

[0008]

In the present invention, after the gate electrode is formed on the semiconductor substrate of the first conductivity type leaving the photoresist pattern,
A high-concentration second-conductivity-type impurity is formed outside the gate electrode by forming a high-concentration second-conductivity-type impurity layer in the semiconductor substrate by ion implantation using the gate electrode left with the photoresist pattern as a mask pattern. After forming a layer and thinning the gate electrode by isotropic etching, the photoresist pattern is removed, and the thinned gate electrode is used as a mask pattern for ion implantation by ion implantation into the semiconductor substrate with a low concentration second conductivity type. By forming the impurity layer of, the low-concentration second-conductivity-type impurity layer can be formed between the gate electrode and the high-concentration second-conductivity-type impurity layer, and the isotropic layer does not damage the semiconductor substrate. Since the positive etching is used, a semiconductor device with less damage to the surface of the impurity layer can be obtained.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be specifically described below with reference to FIG.

First, as shown in FIG. 1A, a gate oxide film 2 having a thickness of 20 nm and a thickness of 3 are formed on a P-type semiconductor substrate 1.
A gate electrode 3 made of polysilicon having a thickness of 00 nm and a gate length of 0.8 μm is formed by selectively etching using the photoresist pattern 4 as a mask.

Next, with the photoresist pattern 4 left, as shown in FIG. 1B, the gate electrode 3 with the photoresist pattern 4 left is used as a mask to perform ion implantation 5 for the P-type semiconductor substrate 1. Was implanted with phosphorus as an N-type impurity, and 1 × 10 ²⁰ atom was formed outside the gate electrode 3.
A source / drain layer 6 of an N-type impurity layer having a concentration of s / cm ³ is formed.

Next, as shown in FIG. 1C, the gate electrode 3 is etched by an isotropic etching method to form a gate electrode 7 after side etching, which is thinned to a gate length of 0.5 μm. To do.

Next, as shown in FIG. 1D, the photoresist pattern 4 is removed, and the side-etched gate electrode 7 is used as a mask to perform ion implantation 8 on the P-type semiconductor substrate 1 as an N-type impurity. Phosphorus is implanted to form an LDD layer 9 which is an N-type impurity layer having a concentration of 1 × 10 ¹⁸ atoms / cm ³ between the source / drain layer 6 and the gate electrode 7 after side etching.

From the above, an NMO having an LDD region
S-transistors can be manufactured.

According to the present invention, it is apparent that the structure of the PMOS transistor having the LDD region can be obtained by changing the conductivity type of the semiconductor substrate and the ion species implanted by the ion implantation.

[0016]

As described above, according to the present invention,
Since the semiconductor device having the LDD structure can be manufactured without the sidewall forming process including the etch back process that damages the semiconductor substrate, the semiconductor device with less damage to the source / drain layers can be obtained.

[Brief description of drawings]

FIG. 1 is a vertical cross-sectional view of a semiconductor device shown in the order of steps for explaining an embodiment of the present invention.

FIG. 2 is a vertical cross-sectional view of a semiconductor device, which is shown in order of steps for explaining a conventional manufacturing method.

[Explanation of symbols]

 1 P-type semiconductor substrate 2 Gate oxide film 3 Gate electrode 4 Photoresist pattern 5 N-type ion implantation 6 Source / drain layer (N-type impurity layer) 7 Gate electrode after side etching 8 N-type ion implantation 9 LDD layer (N-type) Impurity layer)

Claims (1)

[Claims] 1. A gate insulating film is formed on a semiconductor substrate of the first conductivity type, a conductive film is formed on the gate insulating film, a photoresist pattern is formed on the conductive film, and the photoresist pattern is formed. Forming a gate electrode with the photoresist pattern left by selectively etching the conductive film as a mask pattern; and ion implantation into the semiconductor substrate with the gate electrode left with the photoresist pattern as a mask pattern. Forming a high-concentration second-conductivity-type impurity layer by thinning the gate electrode under the photoresist pattern by side etching, and then removing the photoresist pattern and thinning the gate electrode. The second gate electrode of low concentration is formed in the semiconductor substrate by ion implantation using the gate electrode as a mask pattern. The method of manufacturing a semiconductor device characterized by comprising the step of forming the impurity layer.