JPH06232134A - Forming method of bump electrode in electronic part - Google Patents
Forming method of bump electrode in electronic partInfo
- Publication number
- JPH06232134A JPH06232134A JP50A JP1569993A JPH06232134A JP H06232134 A JPH06232134 A JP H06232134A JP 50 A JP50 A JP 50A JP 1569993 A JP1569993 A JP 1569993A JP H06232134 A JPH06232134 A JP H06232134A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- particles
- bump electrode
- melting temperature
- silver
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1131—Manufacturing methods by local deposition of the material of the bump connector in liquid form
- H01L2224/1132—Screen printing, i.e. using a stencil
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体素子を備えた半
導体チップ等の半導体基板を、回路基板又はリードフレ
ーム等に対して、金属製のバンプ電極を介して接続する
場合において、その接続部の一方側における電極パッド
に対して、前記バンプ電極を形成する方法に関するもの
である。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate such as a semiconductor chip having a semiconductor element connected to a circuit board, a lead frame or the like via metal bump electrodes. The present invention relates to a method of forming the bump electrode on the electrode pad on one side.
【０００２】[0002]
【従来の技術】従来、この種のバンプ電極は、金又は銀
等の金属メッキによって形成するのが一般的であった
が、この方法には、多数の工程を必要とすることによ
り、コストが大幅にアップするばかりか、メッキ液の処
理等の公害上の問題があった。そこで、先行技術として
の特開昭５９−４８９４１号公報及び特開平１−２５１
６４３号公報は、バンプ電極の形成に、前記金属メッキ
による方法に代えて、当該バンプ電極を、電極パッドに
対して、半田ペーストをスクリーン印刷にて塗着したの
ち、適宜温度に加熱・焼成することによって形成すると
言う方法を提案している。2. Description of the Related Art Heretofore, this type of bump electrode has generally been formed by metal plating such as gold or silver. However, this method requires a large number of steps, resulting in cost reduction. Not only was it significantly improved, but there was a problem with pollution such as the treatment of the plating solution. Therefore, JP-A-59-48941 and JP-A-1-251 are disclosed as prior arts.
No. 643 discloses that, instead of the method of metal plating for forming the bump electrode, the bump electrode is applied to the electrode pad with a solder paste by screen printing, and then heated and fired at an appropriate temperature. It proposes a method of forming by.
【０００３】この先行技術の方法は、半導体基板及び回
路基板等のうち一方側に、その電極パッドの部分に抜き
窓を穿設したスクリーンマスクを重ね合わせ、このスク
リーンマスクの上面に供給した半田ペーストを、当該ス
クリーンマスクの上面に沿ってスキージを往復動するこ
とによって、スクリーンマスクにおける抜き窓内に充填
したのち、前記スクリーンマスクを取り除いたのち、前
記半田の溶融温度か、これよりも高い温度で加熱・焼成
することによって、半田によるバンプ電極を形成するも
のであるから、前記した従来の金属メッキによる方法に
比べて、コストを大幅に低減できる利点を有する。According to this prior art method, a screen mask having a punched window at the electrode pad portion is superposed on one side of a semiconductor substrate, a circuit board or the like, and a solder paste supplied to the upper surface of the screen mask. By reciprocating a squeegee along the upper surface of the screen mask, after filling the draft window in the screen mask, after removing the screen mask, the melting temperature of the solder, or at a temperature higher than this. Since the bump electrodes are formed by soldering by heating and baking, there is an advantage that the cost can be significantly reduced as compared with the above-mentioned conventional method using metal plating.
【０００４】[0004]
【発明が解決しようとする課題】しかし、その反面、前
記半田によるバンプ電極は、半田の溶融温度で溶けるの
で、半導体基板を、回路基板等に対して、前記半田製の
バンプ電極にて接合したあとにおいて、回路基板等に対
して、別のトランジスター又は抵抗器等の部品を半田付
けにて取り付ける場合において、半田の溶融温度にした
とき、前記半田製のバンプ電極が溶けることになるか
ら、前記半導体基板の回路基板等に対する接合が外れる
ことが多発すると言う問題があった。On the other hand, however, since the bump electrode made of the solder melts at the melting temperature of the solder, the semiconductor substrate is bonded to the circuit board or the like by the bump electrode made of the solder. After that, when another component such as a transistor or a resistor is attached to the circuit board by soldering, when the melting temperature of the solder is reached, the bump electrode made of the solder will be melted. There has been a problem that the semiconductor substrate often comes out of contact with the circuit substrate or the like.
【０００５】本発明は、半田製のバンプ電極を半田ペス
ートのスクリーン印刷によって形成する場合において、
前記のよう問題を招来することがないようにしたバンプ
電極の形成方法を提供することを技術的課題とするもの
である。According to the present invention, when solder bump electrodes are formed by screen printing of solder paste,
It is a technical object to provide a method for forming a bump electrode that does not cause the above problems.
【０００６】[0006]
【課題を解決するための手段】この技術的課題を達成す
るため本発明は、半導体基板又は回路基板等における電
極パッドに、半田粒子を主成分とする半田ペーストに銀
又は銅等のように半田の溶融温度をアップすることがで
きる金属の粒子を混合して成る混合ペーストを、前記電
極パッドの部分に抜き窓を備えたスクリーンマスクを使
用したスクリーン印刷にて塗着したのち、前記半田の溶
融温度か、これより高い温度で加熱・焼成することにし
た。In order to achieve this technical object, the present invention provides an electrode pad on a semiconductor substrate, a circuit board, or the like, a solder paste containing solder particles as a main component, and a solder such as silver or copper. After applying a mixed paste formed by mixing metal particles capable of increasing the melting temperature of the above by screen printing using a screen mask equipped with a window at the electrode pad, melting of the solder I decided to heat and bake at a temperature higher than this.
【０００７】[0007]
【作 用】電極パッドに対してスクリーン印刷によっ
て塗着する半田ペーストに、前記のように、銀又は銅等
のように半田の溶融温度をアップすることができる金属
の粒子を混合することにより、その後における半田の溶
融温度か、これよりも高い温度での加熱・焼成に際し
て、半田粒子は互いに一体的に溶融結合すると共に、電
極パッドに対して溶着する一方、金属粒子の一部分が半
田に対して拡散して合金化することになるから、加熱・
焼成した後のバンプ電極における溶融温度は、半田にお
ける溶融温度よりも高くなるのである。[Operation] By mixing the solder paste, which is applied to the electrode pad by screen printing, with particles of metal, such as silver or copper, which can increase the melting temperature of the solder, as described above, During subsequent heating / firing at a melting temperature of the solder or at a temperature higher than this, the solder particles are melt-bonded integrally with each other and welded to the electrode pad, while a part of the metal particles is adhered to the solder. Since it will diffuse and alloy,
The melting temperature of the bump electrode after firing is higher than the melting temperature of the solder.
【０００８】すなわち、半田をベースとするバンプ電極
を、従来のように、金属メッキによることなく、スクリ
ーン印刷によって低コストで形成することができるもの
でありながら、当該バンプ電極における溶融温度を、半
田における溶融温度よりも高くすることができるのであ
る。That is, the solder-based bump electrode can be formed at a low cost by screen printing without metal plating as in the conventional case, but the melting temperature of the bump electrode can be determined by changing the soldering temperature. Can be higher than the melting temperature in.
【０００９】[0009]
【発明の効果】従って、本発明によると、半導体基板を
回路基板等に対して、前記バンプ電極にて接合したあと
において、回路基板等に対して、別のトランジスター又
は抵抗器等の部品を半田付けにて取り付ける場合におい
て、前記バンプ電極による接合が外れるを確実に防止で
きる効果を有する。Therefore, according to the present invention, after a semiconductor substrate is bonded to a circuit board or the like by the bump electrodes, another component such as a transistor or a resistor is soldered to the circuit board or the like. In the case of attachment by attachment, there is an effect that it is possible to surely prevent the connection by the bump electrode from being broken.
【００１０】[0010]
【実施例】以下、本発明の実施例を図面に基づいて説明
する。図１は、半導体基板１を示し、この半導体基板１
の上面には、各種半導体素子（図示せず）に対する複数
個のアルミ製電極パッド２とパシベーション膜３とが形
成されており、更に、前記電極パッド２の表面には、従
来の場合と同様に、チタン層及び銅層等から成るバリヤ
皮膜（図示せず）が形成されている。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a semiconductor substrate 1, and this semiconductor substrate 1
A plurality of aluminum electrode pads 2 and a passivation film 3 for various semiconductor elements (not shown) are formed on the upper surface of the electrode pad, and the surface of the electrode pad 2 is formed in the same manner as in the conventional case. A barrier film (not shown) including a titanium layer and a copper layer is formed.
【００１１】そして、前記半導体基板１の上面に、図２
に示すように、前記各電極パッド２の部分に抜き窓５を
穿設して成る板厚さ５０ミクロンのスクリーンマスク４
を重ね合わせ、このスクリーンマスク４の上面に対し
て、粒径２０ミクロン以下の共晶半田粒子を主成分とす
る従来公知の半田ペーストに、粒径１ミクロン以下の銀
粒子を適宜比率で混合して成る銀混合の半田ペースト６
を供給する。Then, on the upper surface of the semiconductor substrate 1, as shown in FIG.
As shown in FIG. 3, a screen mask 4 having a plate thickness of 50 microns is formed by forming a window 5 in each of the electrode pads 2.
On the upper surface of the screen mask 4 and a conventionally known solder paste whose main component is eutectic solder particles having a particle size of 20 μm or less, and silver particles having a particle size of 1 μm or less are mixed at an appropriate ratio. Silver mixed solder paste 6
To supply.
【００１２】なお、この場合において、共晶半田粒子を
主成分とする従来公知の金ペーストに対して、銀粒子を
主成分とする従来公知の銀ペーストを適宜比率で混合す
るようにしても良いのである。次いで、前記スクリーン
マスク４の上面に沿ってスキージ７を移動することによ
り、前記銀混合の半田ペースト６を、前記抜き窓５内に
充填する。In this case, a conventionally known silver paste containing silver particles as a main component may be mixed in an appropriate ratio with a conventionally known gold paste containing eutectic solder particles as a main component. Of. Next, by moving the squeegee 7 along the upper surface of the screen mask 4, the silver mixed solder paste 6 is filled in the removal window 5.
【００１３】そして、前記スクリーンマスク４を、図３
に示すように、取り除き、銀混合の半田ペースト６の乾
燥を行ったのち、半導体基板１の全体を、加熱炉に入れ
て、共晶半田の溶融温度である１８３℃よりも少し高い
約１９０℃の温度で約３０秒間にわたって加熱すると言
う焼成を行う。この加熱・焼成により、前記共晶半田粒
子が互いに一体的に溶融結合すると共に、電極パッドに
対して溶着するから、図４に示すように、半導体基板１
における各電極パッド２に対して、半田をベースとする
高さ約２０ミクロンのバンプ電極８を形成することがで
きるのである。The screen mask 4 is shown in FIG.
After removing and drying the silver-mixed solder paste 6, the whole semiconductor substrate 1 is put in a heating furnace and heated to about 190 ° C., which is slightly higher than the melting temperature of 183 ° C. of the eutectic solder. Baking is performed by heating at the temperature of about 30 seconds. By this heating and firing, the eutectic solder particles are integrally melt-bonded to each other and also welded to the electrode pad. Therefore, as shown in FIG.
It is possible to form a solder-based bump electrode 8 having a height of about 20 μm on each electrode pad 2 in FIG.
【００１４】しかも、前記加熱・焼成により、銀粒子の
一部分が半田に対して拡散して合金化することになるか
ら、加熱・焼成した後のバンプ電極８における溶融温度
が、共晶半田における溶融温度よりも高くなるのであ
る。すなわち、本発明者の実験によると、共晶半田粒子
に対する銀粒子の混合比率を１ｗｔ％にしたとき、バン
プ電極８の溶融温度は、共晶半田の溶融温度（１８３
℃）よりも７℃程度だけ高くなり、また、銀粒子の混合
比率を２ｗｔ％にしたとき、バンプ電極８の溶融温度
は、共晶半田の溶融温度よりも１５℃程度だけ高くな
り、更にまた、銀粒子の混合比率を３ｗｔ％にしたと
き、バンプ電極８の溶融温度は、共晶半田の溶融温度よ
りも２３℃程度だけ高くなるのであった。Further, since the silver particles are partially diffused into the solder and alloyed by the heating and firing, the melting temperature of the bump electrode 8 after heating and firing is the same as that of the eutectic solder. It is higher than the temperature. That is, according to an experiment by the present inventor, when the mixing ratio of silver particles to eutectic solder particles is set to 1 wt%, the melting temperature of the bump electrode 8 is the melting temperature of the eutectic solder (183
C.) by about 7 ° C., and when the mixing ratio of silver particles is 2 wt%, the melting temperature of the bump electrode 8 becomes about 15 ° C. higher than the melting temperature of the eutectic solder. When the mixing ratio of silver particles was set to 3 wt%, the melting temperature of the bump electrode 8 was higher by about 23 ° C. than the melting temperature of the eutectic solder.
【００１５】このことから、共晶半田粒子に対する銀粒
子の混合比率は、２ｗｔ％以上にすべきであることが判
った。なお、銀粒子の混合比率を多くすることにより、
バンプ電極８の溶融温度を更に高くすることができる
が、銀粒子の混合比率を多くすれば、コストのアップの
招来することになるから、銀粒子の混合比率は、５ｗｔ
％以下にとどめるべきである。From this, it was found that the mixing ratio of silver particles to eutectic solder particles should be 2 wt% or more. By increasing the mixing ratio of silver particles,
The melting temperature of the bump electrode 8 can be further raised, but if the mixing ratio of the silver particles is increased, the cost is increased. Therefore, the mixing ratio of the silver particles is 5 wt.
% Should be kept below.
【００１６】一方、前記した共晶半田粒子を主成分とす
る半田ペーストに、銅の粒子を混合した場合、加熱・焼
成後におけるバンプ電極８の溶融温度を、銅粒子の混合
比率を１ｗｔ％にしたとき共晶半田の溶融温度よりも２
０℃程度、銅粒子の混合比率を２ｗｔ％にしたとき共晶
半田の溶融温度よりも５０℃程度、銅粒子の混合比率を
１ｗｔ％にしたとき共晶半田の溶融温度よりも８０℃程
度だけアップすることができるのであった。On the other hand, when copper particles are mixed with the above-described solder paste containing eutectic solder particles as a main component, the melting temperature of the bump electrode 8 after heating and firing is set such that the mixing ratio of copper particles is 1 wt%. The melting temperature of the eutectic solder is 2
About 0 ° C, when the mixing ratio of copper particles is 2wt%, it is about 50 ° C higher than the melting temperature of eutectic solder, and when the mixing ratio of copper particles is 1wt%, about 80 ° C than the melting temperature of eutectic solder. It was possible to upload.
【００１７】なお、前記した共晶半田粒子を主成分とす
る半田ペーストに混合する金属粒子としては、前記した
銀粒子及び銅粒子に限らず、ニッケル粒子又は鉄粒子等
のように、半田の溶融温度をアップすることができるそ
の他の金属粒子を適用しても良いことは勿論である。The metal particles to be mixed with the solder paste containing eutectic solder particles as the main component are not limited to the silver particles and the copper particles described above, but the melting of the solder such as nickel particles or iron particles is possible. Of course, other metal particles that can raise the temperature may be applied.
【図１】本発明の実施例において、半導体基板の縦断正
面図である。FIG. 1 is a vertical sectional front view of a semiconductor substrate in an embodiment of the present invention.
【図２】半導体基板の上面における各電極パッドに対し
てスクリーンマスクを使用してペーストを塗着している
状態の縦断正面図である。FIG. 2 is a vertical cross-sectional front view of a state in which a paste is applied to each electrode pad on the upper surface of a semiconductor substrate using a screen mask.
【図３】ペーストを塗着したあとにおいて前記スクリー
ンマスクを取り除いた状態の縦断正面図である。FIG. 3 is a vertical sectional front view showing a state in which the screen mask is removed after applying a paste.
【図４】加熱・焼成にて、前記各電極パッドにバンプ電
極を形成した状態の縦断正面図である。FIG. 4 is a vertical cross-sectional front view of a state where bump electrodes are formed on each of the electrode pads by heating and firing.
１ 半導体基板 ２ 電極パッド ３ パシベーション膜 ４ スクリーンマスク ５ 抜き孔 ６ 銀混合の半田ペースト ７ スキージ ８ バンプ電極 1 semiconductor substrate 2 electrode pad 3 passivation film 4 screen mask 5 through hole 6 silver-containing solder paste 7 squeegee 8 bump electrode
Claims (1)
ッドに、半田粒子を主成分とする半田ペーストに銀又は
銅等のように半田の溶融温度をアップすることができる
金属の粒子を混合して成る混合ペーストを、前記電極パ
ッドの部分に抜き窓を備えたスクリーンマスクを使用し
たスクリーン印刷にて塗着したのち、前記半田の溶融温
度か、これよりも高い温度で加熱・焼成することを特徴
とする電子部品におけるバンプ電極の形成方法。1. An electrode pad on a semiconductor substrate, a circuit board, or the like is mixed with a solder paste containing solder particles as a main component and particles of a metal such as silver or copper capable of increasing the melting temperature of the solder. Characterized in that the mixed paste consisting of is applied by screen printing using a screen mask provided with a window in the electrode pad portion, and is then heated / baked at the melting temperature of the solder or higher. For forming bump electrodes in electronic parts.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50A JPH06232134A (en) | 1993-02-02 | 1993-02-02 | Forming method of bump electrode in electronic part |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50A JPH06232134A (en) | 1993-02-02 | 1993-02-02 | Forming method of bump electrode in electronic part |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06232134A true JPH06232134A (en) | 1994-08-19 |
Family
ID=11896024
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50A Pending JPH06232134A (en) | 1993-02-02 | 1993-02-02 | Forming method of bump electrode in electronic part |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06232134A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998009321A1 (en) * | 1996-08-27 | 1998-03-05 | Pac Tech - Packaging Technologies Gmbh | Process for selective application of solder |
| US5762259A (en) * | 1995-07-13 | 1998-06-09 | Motorola Inc. | Method for forming bumps on a substrate |
| EP0818811B1 (en) * | 1996-07-05 | 1999-12-15 | Hewlett-Packard Company | Method of making solder bumps |
| DE19832706C2 (en) * | 1998-07-14 | 2000-08-03 | Siemens Ag | Semiconductor component in chip format and method for its production |
| KR100485590B1 (en) * | 2001-12-20 | 2005-04-27 | 동부아남반도체 주식회사 | Wafer bumping method for using solder paste print |
| CN112378716A (en) * | 2020-09-30 | 2021-02-19 | 中国电子科技集团公司第十三研究所 | Sample preparation method for solderability test of CBGA device |
-
1993
- 1993-02-02 JP JP50A patent/JPH06232134A/en active Pending
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5762259A (en) * | 1995-07-13 | 1998-06-09 | Motorola Inc. | Method for forming bumps on a substrate |
| EP0818811B1 (en) * | 1996-07-05 | 1999-12-15 | Hewlett-Packard Company | Method of making solder bumps |
| WO1998009321A1 (en) * | 1996-08-27 | 1998-03-05 | Pac Tech - Packaging Technologies Gmbh | Process for selective application of solder |
| DE19832706C2 (en) * | 1998-07-14 | 2000-08-03 | Siemens Ag | Semiconductor component in chip format and method for its production |
| WO2000004584A3 (en) * | 1998-07-14 | 2000-11-16 | Siemens Ag | Semiconductor component in a chip format and method for the production thereof |
| EP1324389A3 (en) * | 1998-07-14 | 2004-02-18 | Infineon Technologies AG | Semiconductor component in a chip format and method for the production thereof |
| US6818090B2 (en) | 1998-07-14 | 2004-11-16 | Infineon Technologies Ag | Semiconductor device in chip format and method for producing it |
| US6973717B2 (en) | 1998-07-14 | 2005-12-13 | Infineon Technologies Ag | Method for producing a semiconductor device in chip format |
| KR100485590B1 (en) * | 2001-12-20 | 2005-04-27 | 동부아남반도체 주식회사 | Wafer bumping method for using solder paste print |
| CN112378716A (en) * | 2020-09-30 | 2021-02-19 | 中国电子科技集团公司第十三研究所 | Sample preparation method for solderability test of CBGA device |
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