JPH06180664A - Programming device for memory - Google Patents

Abstract

PURPOSE:To provide the programming device of a memory capable of easily updating the entire area of the memory. CONSTITUTION:In the case of updating a part stored with a nonvolatile memory control processing and a vector table, the part of the nonvolatile memory control processing and the vector table for abnormality restoration is copied to the other part, then updated, and the copied part is returned to source data after updating. The copied vector table for the abnormality restoration and nonvolatile memory control processing are executed when address conversion is performed at a reset time by an address conversion circuit 5 inserted to the address buses 31 and 32 of a CPU 2 at an abnormal time such as power source interruption during data updating or the like.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data rewritable memory programming device.

[0002]

2. Description of the Related Art In OA equipment, electronic musical instruments, game machines and the like, a memory is used for storing data such as programs, sound waveforms and character fonts as needed. This memory is usually non-volatile and erasable / writable, for example, general data is programmed at the time of assembling the device, and when the user purchases or uses the device, In many cases, when changing the usage environment, other data is programmed to improve the versatility of the device.

[0003]

If the data to be stored in the rewritable memory includes a control program for managing the operation of the device or the memory or the vector, the contents stored in the memory If the power is accidentally shut off during erasing or writing when rewriting, the processing program may be destroyed due to the malfunction caused by it. In order to prevent such an accident, conventionally, the rewriting process of the stored contents is performed only on the storage area other than the area where important data such as the control program is stored.

However, when the memory is a block (e.g., a flash (batch erasing type) memory) that is erased and written in block units, in order to efficiently rewrite the stored contents, the stored contents in a predetermined area of the memory are collectively stored. It is desirable to erase or rewrite the data in order to store the rewritable memory (hereinafter referred to as the main memory) as well as a control program that is activated when the power of the device is turned on or when the stored contents of the memory are updated. It is necessary to separately provide a non-rewritable program ROM (hereinafter, auxiliary memory), and the assembling cost is increased accordingly.

The present invention has been made to solve the above problems, and provides a memory programming device capable of updating all areas of a main memory without equipping a program ROM or the like as an auxiliary memory. The purpose is to do.

[0006]

In order to achieve the above object, the present invention converts an address holding unit that holds a specific address in a data rewritable memory and an address held by the address holding unit. Address conversion means, data input means for inputting data to be stored in the memory, data writing means for writing the data input by the input means in the memory, and a specific address in the memory is a specific address in the memory. An address discriminating means for discriminating whether or not it is included in the range, and in the memory when the address discriminating means discriminates that the address held by the address holding means is included in the write range by the writing means The data at the location indicated by the address translated by the address translation means is A data storage unit for storing data, and a memory for storing data at a location indicated by the address converted by the address conversion unit by the data storage unit, stores data at a location indicated by the address held by the address holding unit, Data copying means for copying to a location indicated by the address converted by the address converting means in the memory, and data restoring means for restoring the data saved in the memory by the data writing means in the memory Is a programming device of a memory provided with.

[0007]

With the above construction, when a specific address in a data rewritable memory is held by the address holding means and the data to be stored in the memory is inputted by the input means, the input data is written. The address determining means determines whether or not the specific address is included in the range to be written in the memory by the means. Here, when it is determined that the specific address is included in the writing range by the writing unit, the specific address held by the address holding unit is converted by the address converting unit, and the data at the location indicated by the converted address is converted. The data is stored in the data storing means, the data at the location indicated by the specific address is copied at the location indicated by the conversion address by the data copying means, and then the input data is written in the memory by the data writing means. On the other hand, when the address determining unit determines that the specific address is not included in the writing range of the writing unit, the data writing unit writes the input data to the memory as it is.

When the writing of the input data is completed, the address discriminating means discriminates whether or not the portion indicated by the conversion address is included in the range in which the input data is written. If it is determined that the portion indicated by the conversion address is not included, the data stored in the storage unit is restored to the portion indicated by the conversion address by the data restoration unit. If it is determined that the content is included, the process ends.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a schematic configuration of a memory programming device 1 according to an embodiment of the present invention. The device 1 is installed in a printer by storing a BIOS, a normal reset processing program, an abnormal reset processing program, an abnormal recovery processing program, character font data such as Mincho or Gothic font in a flash memory 3. . The device 1 includes a main CPU 2 and
A flash memory 3 which is a main memory, a reset circuit 4 which outputs a reset signal 21, an address conversion circuit 5 which converts an address sent from the CPU 2 in synchronization with the reset signal, and an operation of the address conversion circuit 5 are selected. A selection switch 6, a RAM 7 as an auxiliary memory,
The I / O unit 8 is responsible for data input / output with the outside. 64 data is stored in the flash memory 3.
Flash EEP that can be erased and written in Kbyte units
ROM was used.

The CPU 2 and the address conversion circuit 5 are connected by an address bus 31, and the address conversion circuit 5 is
The address bus 32 enables the flash memory 3 and RA
It is connected to the M7 and I / O unit 8. This gives C
The output signal from the PU 2 is sent to the flash memory 3, the RAM 7, and the I / O unit 8 via the address conversion circuit 5. The address conversion circuit 5 performs address conversion according to the reset signal 21 output from the reset circuit 4 and the selection switch 6. Further, without going through the address conversion circuit 5, the CPU 2, the flash memory 3, the RAM 7, the I / O
An address bus 33 is provided for transmitting signals to and from the O unit 8.

FIG. 2 is a block diagram showing the configuration of the address conversion circuit 5. As an example, C at reset
The address output from PU2 is set to 000000 [H], and the address converted by the address conversion circuit 5 is set to 010000 [H]. The address conversion circuit 5 includes a latch 11 for synchronizing with the reset signal 21, and a conversion data generation circuit 1 for generating a converted address value.
2, an AND gate 13, an address match detection circuit 19 and the like. If the selection switch 6 is not pressed at the time of reset, the latch 11 is cleared, its output 22 becomes Low, the output 34 (010000 [H]) from the conversion data generation circuit 12 is masked, and AN
The output 35 of the D gate 13 becomes Low. Therefore, CP
The address (000000 [H]) output from U2 and transmitted on the address bus 31 is output to the address bus 32 as it is.

On the other hand, when the selection switch 6 is pressed at the time of reset, the latch 11 is set, its output 22 becomes High, and the output 34 of the conversion data generating circuit 12 becomes the output 35 of the AND gate 13. Therefore, C
The address signal output from the PU 2 and transmitted on the address bus 31 is converted into 010000 [H] and output to the address bus 32. In this address conversion, the output of the address bus 32 has a certain value (010 in the present embodiment).
080 [H]), latch 3 is generated by the match signal (Low active) output from the address match detection circuit 19.
Continue until 2 is cleared. Then, at the time of reset, the program counter of the CPU 2 is 010080.
It is set to [H], and immediately after reset, the CPU 2
The address conversion is canceled when 080 [H] is fetched.

FIG. 3 is a diagram showing a memory map of the flash memory 3. In the 000000 [H] address 40, the execution start address at the time of normal reset is 000800 [H]
Is stored. Also, address 000080 [H] 41
Indicates the execution start address 010080 when the error is reset.
[H] is stored, and address 000100 [H] 42
Includes an error recovery processing program for recovering the inside of the memory in the event of an error, and a BIOS (hereinafter, these two are combined to create a B
IOS1) is stored in a relocatable form. This address 000080 [H] and 000100
The content of the address [H] is 010000 in a specific case.
It is copied to the address [H] and the address 010080 [H] (hereinafter, the copied BIOS1 is referred to as BIOS2).

The operation of the device 1 having the above structure will be described with reference to the flow charts shown in FIGS. Data (hereinafter, new data) to be newly stored in the flash memory 3 is input (S1). Once you have entered the data,
Flash memory 3 in the first block of the input data
The upper address pointer is set (S2).

Next, it is determined whether the block indicated by the address pointer includes the BIOS 1 (S3).
If it is determined that the BIOS 1 is not included (No in S3), new data is programmed in the block indicated by the address pointer using the BIOS 1 (S4). On the other hand, when it is determined that the block indicated by the address pointer includes the BIOS 1 (Yes in S3), the BIOS
It is determined whether S2 is valid (S5). If it is determined to be valid (Yes in S5), the BIOS remains unchanged.
2 is used to program new data in the block indicated by the address pointer. (S9)

If it is determined that the data is invalid (S
5 No), 010000 [H] to 01FFFF
After saving the contents of [H] in RAM 7 (S6), BI
The OS1 is copied from 010000 [H] (S7), and it is determined whether or not the copying is normally completed (S8). If it is determined that the copying is abnormal (N in S8,
o) After displaying an error (S14), the program processing ends. If it is determined to be normal (Yes in S8), new data is programmed in the block indicated by the address pointer using the BIOS 2 (S9).

After programming the block,
It is determined whether programming of all input data has been completed (S10). If not finished (S10
No), the address pointer is set to the head of the next block, and the processes of S3 to S10 are repeated. When programming of all data is completed (Yes in S10
s), BIOS2 in the area programmed with new data
It is determined whether or not is included (S12). If it is included (Yes in S12), the programming process is terminated as it is, and if it is not included (No in S12), S6.
The data saved in RAM 7 at 010,000
The program is restored to the address [H] (S13), and the program processing ends.

Although one embodiment of the present invention has been described above, the present invention is not limited to this, and various modifications can be made.
For example, in the device 1 shown in FIG.
PU and RAM are added, and flash memory 3 is EE
The PROM may be replaced with another memory instead of the PROM, and further, other parts may be provided depending on the application and use environment of the apparatus. Further, although the converted address output from the address bus 32 is a fixed value in the above embodiment, a variable value may be set by an external circuit and programming processing may be performed according to the address. Although the device mounted on the printer has been exemplified as the device, the present invention can be widely applied to devices using an erasable / writable memory such as a word processor, a game machine, and an electronic musical instrument, and the target data can also be used in the device. Considering each priority according to the type and purpose of
It may be handled in the same manner as OS1 and BIOS2. Furthermore, although an example of operating at reset has been shown above, the present invention
It can be applied effectively not only at reset but also when rewriting the contents of the memory.

[0019]

As is apparent from the above description,
According to the memory programming device of the present invention, it is possible to rewrite the entire area while always making the important data stored in the memory resident in the memory. So, for example,
If a recovery program at the time of abnormality and a vector table for executing this program are made resident in the memory, the recovery process can be easily executed even if the data is destroyed due to an unexpected power failure during operation. Moreover, since it is not necessary to separately equip a program ROM or the like, the assembly cost of the device can be reduced and the maintenance work can be facilitated.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a memory programming device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of an address conversion circuit 5 in the programming device for the memory.

FIG. 3 is a diagram showing a memory map of a flash memory in the programming device for the memory.

FIG. 4 is a flowchart showing an operation of the programming device for the memory.

FIG. 5 is a flowchart showing an operation of the programming device of the memory.

[Explanation of symbols]

1 memory programming device 2 CPU (address discrimination means, data writing means,
Data copying means, data restoring means) 3 flash memory 5 address conversion circuit (address conversion means) 7 RAM (data storage means) 8 I / O unit (data input means) 31, 32 address bus (address holding means)

Claims (1)

[Claims] 1. An address holding unit for holding a specific address in a rewritable memory, an address conversion unit for converting an address held by the address holding unit, and data for inputting data to be stored in the memory. Input means, data writing means for writing the data input by the input means to the memory, and address determining means for determining whether or not a specific address in the memory is included in a specific range in the memory, When the address discriminating unit discriminates that the address held by the address holding unit is included in the writing range by the writing unit, the data of the portion indicated by the address converted by the address converting unit in the memory is stored. Data storage means and this data storage In the memory in which the data of the location indicated by the address converted by the address translation means by the stage is stored, the data of the location indicated by the address held by the address holding means is converted into the address converted by the address translation means in the memory. A data programming means for copying to a location indicated by and a data restoring means for restoring the data stored by the data storing means in the memory in which the data is written by the data writing means. .