Nothing Special   »   [go: up one dir, main page]

JPH06112292A - Evaluation of silicon wafer - Google Patents

Evaluation of silicon wafer

Info

Publication number
JPH06112292A
JPH06112292A JP26674792A JP26674792A JPH06112292A JP H06112292 A JPH06112292 A JP H06112292A JP 26674792 A JP26674792 A JP 26674792A JP 26674792 A JP26674792 A JP 26674792A JP H06112292 A JPH06112292 A JP H06112292A
Authority
JP
Japan
Prior art keywords
oxide film
silicon wafer
infrared
initial oxide
withstand voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26674792A
Other languages
Japanese (ja)
Inventor
Shigeru Umeno
繁 梅野
Yutaka Nakajima
豊 中島
Takashi Fujikawa
孝 藤川
Masataka Horai
正隆 宝来
Shinsuke Sadamitsu
定光信介
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KYUSHU ELECTRON METAL
KYUSHU ELECTRON METAL CO Ltd
Nippon Steel Corp
Original Assignee
KYUSHU ELECTRON METAL
KYUSHU ELECTRON METAL CO Ltd
Sumitomo Sitix Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KYUSHU ELECTRON METAL, KYUSHU ELECTRON METAL CO Ltd, Sumitomo Sitix Corp filed Critical KYUSHU ELECTRON METAL
Priority to JP26674792A priority Critical patent/JPH06112292A/en
Publication of JPH06112292A publication Critical patent/JPH06112292A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To provide an evaluation method of a silicon wafer able to simply estimate an initial oxide film withstand voltage good article ratio without changing a surface condition and a heat history of a silicon wafer. CONSTITUTION:The infrared scatterer density of a certain wafer is measured by an infrared ray scattering tomography method, further, an oxide film of a prescribed thickness and a large number of MOS capacitors having electrode of a prescribed area are manufactured on the wafer so as to measure an oxide film withstand voltage good article ratio, the interrelation between the infrared scatterer density and the initial oxide film withstand voltage good article ratio is clarified, the infrared scatterer density of a silicon wafer having an unknown initial oxide film withstand voltage good article ratio is measured and the interrelation is applied so as to estimate the initial oxide film withstand voltage good article ratio. Thereby, the infrared scatterer density can be measured by the complete non-destructive inspection thus allowing it to maintain an initial state relating to the surface state of an inspected silicon wafer and a heat history.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、シリコンウェーハの
品質評価において、シリコンウェーハの初期酸化膜耐圧
良品率を推定する方法に係り、初期酸化膜耐圧良品率未
知のシリコンウェーハの赤外散乱体密度から当該シリコ
ンウェーハの初期酸化膜耐圧良品率を推定し、非破壊検
査を実現できるシリコンウェーハの評価方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for estimating the rate of non-defective initial oxide film breakdown voltage of a silicon wafer in the quality evaluation of silicon wafers. The present invention relates to a method for evaluating a silicon wafer capable of realizing a nondestructive inspection by estimating the initial oxide film withstand rate of the silicon wafer from the above.

【0002】[0002]

【従来の技術】シリコンウェーハの初期酸化膜耐圧良品
率は、以下のようにして測定されている。すなわち、シ
リコンウェーハ上に所定の厚さの酸化膜と所定の面積の
電極を有する多数のMOSキャパシターを作製し、各々
のMOSキャパシターに所定の方法によって電圧を印加
した場合に、絶縁破壊しなかったMOSキャパシター数
の全MOSキャパシター数に対する割合を初期酸化膜耐
圧良品としている。
2. Description of the Related Art The rate of good initial oxide film withstand voltage of silicon wafers is measured as follows. That is, when a large number of MOS capacitors having an oxide film of a predetermined thickness and electrodes of a predetermined area were produced on a silicon wafer and a voltage was applied to each MOS capacitor by a predetermined method, no dielectric breakdown occurred. The ratio of the number of MOS capacitors to the total number of MOS capacitors is defined as a good initial oxide film withstand voltage.

【0003】[0003]

【発明が解決しようとする課題】MOSキャパシターは
一般的に、熱酸化により形成した酸化膜上にLP−CV
D法によって、多結晶シリコン膜を形成した後、リンの
拡散を行い、多結晶シリコン膜を写真蝕刻法によりパタ
ーニングするという工程を経て作製される。上記のよう
に、MOSキャパシターの作製には多くの手間がかか
る。また、MOSキャパシターを作製する従来の方法
は、熱酸化等を伴う破壊検査である。
Generally, a MOS capacitor generally has an LP-CV on an oxide film formed by thermal oxidation.
After the polycrystalline silicon film is formed by the D method, phosphorus is diffused and the polycrystalline silicon film is patterned by the photoetching method. As described above, manufacturing a MOS capacitor requires a lot of work. Further, the conventional method of manufacturing a MOS capacitor is a destructive inspection involving thermal oxidation and the like.

【0004】この発明は、上記のような状況下にあって
簡便にしかもシリコンウェーハの表面状態、熱履歴を変
えることなく、初期酸化膜耐圧良品率を推定できるシリ
コンウェーハの評価方法の提供を目的とする。
An object of the present invention is to provide a method for evaluating a silicon wafer which can easily estimate the initial oxide film breakdown voltage non-defective rate without changing the surface state and thermal history of the silicon wafer under the above circumstances. And

【0005】[0005]

【課題を解決するための手段】発明者らは、シリコン結
晶中の欠陥の測定方法を種々検討したところ、CZ法で
引き上げたシリコン結晶中には、育成されたままの状態
で存在する欠陥として、赤外線散乱トモグラフィーで観
察されセコ(Secco)エッチングのセコピットとし
て観察される高温安定の欠陥、フローパターンとして観
察され高温で消滅する欠陥、リングOSF発生領域内の
外周部にリング状に分布し赤外線散乱トモグラフィーで
は観察されずセコピットとして観察される欠陥の3種類
の欠陥があることを確認し、さらに検討を加えたとこ
ろ、赤外線散乱トモグラフ法による欠陥密度(以下、赤
外散乱体密度という)とMOSキャパシターを作製して
測定した初期酸化膜耐圧良品率から求めた欠陥密度の分
布傾向が一致することを知見し、酸化膜耐圧良品率未知
のシリコンウェーハの赤外散乱体密度から当該シリコン
ウェーハの初期酸化膜耐圧良品率を推定でき、被破壊検
査が可能になることを知見し、この発明を完成した。
Means for Solving the Problems The inventors have studied various methods for measuring defects in a silicon crystal. As a result, it was found that defects found in the as-grown state exist in the silicon crystal pulled by the CZ method. , High temperature stable defects observed by infrared scattering tomography as Secco pits for Secco etching, defects observed as flow patterns that disappear at high temperature, infrared scattering scattered in the ring OSF generation region After confirming that there are three types of defects, which are not observed by tomography but are observed as secopits, and further examined, defect density by infrared scattering tomography method (hereinafter referred to as infrared scatterer density) and MOS capacitor The distribution tendency of the defect density obtained from the initial oxide film breakdown voltage non-defective rate measured by manufacturing The inventors have completed the present invention by discovering that it is possible to estimate the initial oxide film withstand rate of silicon wafers from the infrared scatterer density of silicon wafers whose oxide film withstand rate is unknown did.

【0006】すなわち、この発明は、予め測定された赤
外線散乱トモグラフ法による欠陥密度と初期酸化膜耐圧
良品率の相関関係を用いて、初期酸化膜耐圧良品率未知
のシリコンウェーハの赤外散乱体密度から当該シリコン
ウェーハの初期酸化膜耐圧良品率を推定することを特徴
とするシリコンウェーハの評価方法である。
That is, according to the present invention, the infrared scatterer density of a silicon wafer whose initial oxide film breakdown voltage non-defective rate is unknown is used by using the correlation between the defect density and the initial oxide film breakdown voltage non-defective rate measured in advance by the infrared scattering tomography method. It is a method of evaluating a silicon wafer, characterized by estimating the initial oxide film breakdown voltage non-defective rate of the silicon wafer from the above.

【0007】また、この発明は、上記構成において、赤
外線散乱トモグラフ法の測定にブルースター角入射法を
用いることを特徴とするシリコンウェーハの評価方法で
ある。
Further, the present invention is a silicon wafer evaluation method characterized by using the Brewster's angle incidence method for the measurement of the infrared scattering tomography method in the above structure.

【0008】この発明において、赤外線散乱トモグラフ
法は、赤外線光を細かく絞りこみ試料の側面より入射さ
せると、結晶内に含まれる欠陥により光が散乱されるの
で、これを垂直方向から観察するもので、該スリット状
の散乱像を合成してビームで走査した断面の断面像を作
成し、赤外散乱体密度分布を得ることができる。また、
上記の90度散乱法では測定に際しウェーハをへき開す
る必要があるが、ブルースター角入射(照明)法により
種々回転角度で測定すればへき開も不要となる。
In the present invention, the infrared scattering tomography method is to observe infrared light from a vertical direction because when the infrared light is finely squeezed and made incident from the side surface of the sample, the light is scattered by defects contained in the crystal. The infrared scatterer density distribution can be obtained by synthesizing the slit-shaped scattered images and creating a cross-sectional image of the cross section scanned by the beam. Also,
In the above 90-degree scattering method, the wafer needs to be cleaved at the time of measurement, but if the measurement is performed at various rotation angles by the Brewster's angle incidence (illumination) method, the cleaving becomes unnecessary.

【0009】[0009]

【作用】この発明によるシリコンウェーハの評価方法
は、まず、同一のウェーハあるいは単結晶インゴットの
隣接位置から切り出したウェーハを用いて、赤外線散乱
トモグラフ法にてそのウェーハの赤外散乱体密度を測定
し、またウェーハ上に所定の厚さの酸化膜と所定の面積
の電極を有する多数のMOSキャパシターを作製して絶
縁破壊しなかったMOSキャパシター数の全MOSキャ
パシター数に対する割合を求めて、初期酸化膜耐圧良品
率を測定することによって、赤外散乱体密度と初期酸化
膜耐圧良品率の相関関係を明らかにしておく。さらに、
初期酸化膜耐圧良品率が未知のウェーハに対して、赤外
線散乱トモグラフ法を用いて赤外散乱体密度を測定し、
上記の相関関係を用いて、当該ウェーハの初期酸化膜耐
圧良品率を推定する。
The silicon wafer evaluation method according to the present invention is performed by first measuring the infrared scatterer density of the wafer by the infrared scattering tomography method using the same wafer or a wafer cut from the adjacent position of the single crystal ingot. In addition, a large number of MOS capacitors having an oxide film having a predetermined thickness and electrodes having a predetermined area are formed on a wafer, and the ratio of the number of MOS capacitors that did not cause dielectric breakdown to the total number of MOS capacitors is obtained to obtain an initial oxide film. By measuring the withstand voltage non-defective rate, the correlation between the infrared scatterer density and the initial oxide film withstand voltage non-defective rate is clarified. further,
The infrared scatterer density was measured using the infrared scatter tomography method for the wafer whose initial oxide film withstand rate was unknown.
The initial oxide film withstand voltage non-defective rate of the wafer is estimated using the above correlation.

【0010】このように、初期酸化膜耐圧良品率が未知
のシリコンウェーハの赤外散乱体密度を赤外線散乱トモ
グラフ法を用いて測定し、予め求めた赤外散乱体密度と
初期酸化膜耐圧良品率の相関関係を適用することによっ
て初期酸化膜耐圧良品率を推定することができる。赤外
散乱体密度の測定は、ウェーハをへき開するだけで、あ
るいはブルースター角入射法によればへき開なしで実施
できるため、この発明によるシリコンウェーハの評価方
法によれば、MOSキャパシターを作製することなく簡
便に初期酸化膜耐圧良品率の推定ができ、しかも推定後
のウェーハは、表面状態、熱履歴に関して初期の状態を
保つことができる。
As described above, the infrared scatterer density of a silicon wafer whose initial oxide film withstand rate is unknown is measured by using the infrared scattering tomography method, and the infrared scatterer density and the initial oxide film withstand rate are obtained in advance. The initial oxide film withstand voltage non-defective rate can be estimated by applying the correlation of Since the infrared scatterer density can be measured only by cleaving the wafer or without cleaving according to the Brewster's angle incidence method, according to the silicon wafer evaluation method of the present invention, a MOS capacitor can be manufactured. Without this, the initial oxide film withstand voltage non-defective rate can be easily estimated, and the wafer after the estimation can maintain the initial state regarding the surface state and the thermal history.

【0011】[0011]

【実施例】初期酸化膜耐圧良品率が異なると予想される
15枚のCZ−シリコンウェーハを準備し、酸化膜厚2
50◆A、電極面積8mm2のMOSキャパシターをウ
ェーハ面内に作製した。このMOSキャパシターにSV
法によって電圧を印加し、8MV/cm以下の電界で絶
縁破壊(12.5μA/cm2以上)したMOSキャパ
シターを不良、それ以外を良品と判定し、良品数が全M
OSキャパシター数に占める割合を初期酸化膜耐圧良品
率とした。
[Example] Fifteen CZ-silicon wafers, which are expected to have different initial oxide film withstand rate, were prepared, and the oxide film thickness was 2
A MOS capacitor having an electrode area of 8 mm 2 was fabricated on the wafer surface. SV to this MOS capacitor
Voltage was applied by the method, and a MOS capacitor that had a dielectric breakdown (12.5 μA / cm 2 or more) under an electric field of 8 MV / cm or less was defective.
The ratio of the number of OS capacitors to the initial oxide film withstand voltage non-defective rate.

【0012】次に、MOSキャパシターをエッチングに
よって除去してへき開したウェーハの赤外散乱体密度を
赤外線散乱トモグラフ法によって測定した。上述のよう
にして測定した赤外散乱体密度と初期酸化膜耐圧良品率
の関係を示したのが図1である。図1から赤外散乱体密
度を測定することによって初期酸化膜耐圧良品率を推定
できることが明らかである。
Next, the infrared scatterer density of the cleaved wafer after removing the MOS capacitor by etching was measured by the infrared scatter tomography method. FIG. 1 shows the relationship between the infrared scatterer density and the initial oxide film withstand voltage non-defective rate measured as described above. From FIG. 1, it is clear that the initial oxide film withstand voltage non-defective rate can be estimated by measuring the infrared scatterer density.

【0013】[0013]

【発明の効果】この発明によるシリコンウェーハの評価
方法は、赤外散乱体密度と初期酸化膜耐圧良品率の相関
関係図を予め作成しておけば、他のウェーハはその赤外
散乱体密度を測定するだけで簡便に初期酸化膜耐圧良品
率を推定することができる。
According to the method for evaluating a silicon wafer according to the present invention, if a correlation diagram between the infrared scatterer density and the initial oxide film withstand rate is prepared in advance, the other wafers can be evaluated for the infrared scatterer density. The initial oxide film withstand voltage non-defective rate can be easily estimated simply by measuring.

【0014】また、赤外散乱体密度は赤外線散乱トモグ
ラフ法によってシリコンウェーハをへき開するだけ、あ
るいはブルースター角入射法を用いればへき開も不要で
あり完全な非破壊検査にて測定でき、この発明の評価方
法によって初期酸化膜耐圧良品率を推定したシリコンウ
ェーハは、その表面状態、熱履歴に関して初期の状態を
保つことができる利点がある。
The infrared scatterer density can be measured only by cleaving a silicon wafer by the infrared scatter tomography method, or by using the Brewster's angle incidence method, the cleaving is unnecessary and can be measured by a complete nondestructive inspection. The silicon wafer whose initial oxide film withstand rate has been estimated by the evaluation method has the advantage of being able to maintain the initial state regarding its surface state and thermal history.

【図面の簡単な説明】[Brief description of drawings]

【図1】CZ−シリコンウェーハの赤外散乱体密度と初
期酸化膜耐圧良品率の相関関係を示すグラフである。
FIG. 1 is a graph showing the correlation between the infrared scatterer density of a CZ-silicon wafer and the initial oxide film withstand voltage non-defective rate.

─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成5年11月29日[Submission date] November 29, 1993

【手続補正1】[Procedure Amendment 1]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0005[Name of item to be corrected] 0005

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【0005】[0005]

【課題を解決するための手段】発明者らは、シリコン結
晶中の欠陥の測定方法を種々検討したところ、CZ法で
引き上げたシリコン結晶中には、育成されたままの状態
で存在する欠陥として、赤外線散乱トモグラフィーで観
察されセコ(Secco)エッチングのピットとして観
察される高温安定の欠陥、フローパターンとして観察さ
れ高温で消滅する欠陥、リングOSF発生領域内の外周
部にリング状に分布し赤外線散乱トモグラフィーでは観
察されず、ピットとして観察される欠陥の3種類の欠陥
があることを確認し、さらに検討を加えたところ、赤外
線散乱トモグラフ法による欠陥密度(以下、赤外散乱体
密度という)とMOSキャパシターを作製して測定した
初期酸化膜耐圧良品率から求めた欠陥密度の分布傾向が
一致することを知見し、酸化膜耐圧良品率未知のシリコ
ンウェーハの赤外散乱体密度から当該シリコンウェーハ
の初期酸化膜耐圧良品率を推定でき、被破壊検査が可能
になることを知見し、この発明を完成した。
Means for Solving the Problems The inventors have studied various methods for measuring defects in a silicon crystal. As a result, it was found that defects found in the as-grown state exist in the silicon crystal pulled by the CZ method. , defects disappear at a high temperature stability of the defect, the high temperature is observed as a flow pattern observed as peak Tsu bets infrared observed in scattered tomography seco (Secco) etching, distributed in a ring shape on the outer peripheral portion of the ring OSF occurrence region not observed in the infrared scattering tomography, to ensure that there are three kinds of defects of defects observed as pins Tsu DOO, further it was added examined, defect density (hereinafter infrared laser scattering tomography, infrared scatterer density It is known that the distribution tendency of the defect density obtained from the initial oxide film breakdown voltage non-defective rate measured after manufacturing the MOS capacitor is the same. And it can estimate the initial dielectric breakdown yield rate of the silicon wafers from the infrared scatterer density of gate oxide integrity yield rate unknown silicon wafer, and found that it is possible to be destructive inspection was completed this invention.

【手続補正2】[Procedure Amendment 2]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】0008[Correction target item name] 0008

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【0008】この発明において、赤外線散乱トモグラフ
法は、赤外線光を細かく絞りこみ試料の側面より入射さ
せると、結晶内に含まれる欠陥により光が散乱されるの
で、これを垂直方向から観察するもので、散乱像を合成
してビームで走査した断面の断面像を作成し、赤外散乱
体密度分布を得ることができる。また、上記の90°散
乱法では測定に際しウェーハをへき開する必要がある
が、ブルースター角入射(照明)法により測定すればへ
き開も不要となる。
In the present invention, the infrared scattering tomography method is to observe infrared light from a vertical direction because when the infrared light is finely squeezed and made incident from the side surface of the sample, the light is scattered by defects contained in the crystal. combines the scattering image to create cross-sectional images of the cross section scanned by the beam, it is possible to obtain an infrared scatterer density distribution. Also, the 90 ° scattering method described above it is necessary to cleave the wafer upon measurement, but cleavage is also unnecessary if Rihaka constant by the Brewster angle of incidence (illumination) method.

【手続補正3】[Procedure 3]

【補正対象書類名】図面[Document name to be corrected] Drawing

【補正対象項目名】図1[Name of item to be corrected] Figure 1

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【図1】 [Figure 1]

───────────────────────────────────────────────────── フロントページの続き (72)発明者 藤川 孝 佐賀県杵島郡江北町大字上小田2201番地 九州電子金属株式会社内 (72)発明者 宝来 正隆 佐賀県杵島郡江北町大字上小田2201番地 九州電子金属株式会社内 (72)発明者 定光信介 佐賀県杵島郡江北町大字上小田2201番地 九州電子金属株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takashi Fujikawa 2201 Kamioda, Kohoku-cho, Kishima-gun, Saga Within Kyushu Denshi Metal Co., Ltd. Electronic Metals Co., Ltd. (72) Shinsuke Sadamitsu 2201, Kamioda, Kamikita-cho, Kijima-gun, Saga Prefecture Kyushu Electronic Metals Co., Ltd.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 予め測定された赤外線散乱トモグラフ法
による欠陥密度と初期酸化膜耐圧良品率の相関関係を用
いて、初期酸化膜耐圧良品率未知のシリコンウェーハの
赤外散乱体密度から当該シリコンウェーハの初期酸化膜
耐圧良品率を推定することを特徴とするシリコンウェー
ハの評価方法。
1. A silicon wafer from an infrared scatterer density of a silicon wafer whose initial oxide film breakdown voltage non-defective rate is unknown by using a correlation between a defect density and an initial oxide film breakdown voltage non-defective rate measured by an infrared scattering tomography method which has been measured in advance. A method for evaluating a silicon wafer, which comprises estimating the initial oxide film withstand rate of non-defective products.
【請求項2】 赤外線散乱トモグラフ法の測定にブルー
スター角入射法を用いることを特徴とする請求項1記載
のシリコンウェーハの評価方法。
2. The method for evaluating a silicon wafer according to claim 1, wherein the Brewster's angle incidence method is used for the measurement of the infrared scattering tomography method.
JP26674792A 1992-09-08 1992-09-08 Evaluation of silicon wafer Pending JPH06112292A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26674792A JPH06112292A (en) 1992-09-08 1992-09-08 Evaluation of silicon wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26674792A JPH06112292A (en) 1992-09-08 1992-09-08 Evaluation of silicon wafer

Publications (1)

Publication Number Publication Date
JPH06112292A true JPH06112292A (en) 1994-04-22

Family

ID=17435152

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26674792A Pending JPH06112292A (en) 1992-09-08 1992-09-08 Evaluation of silicon wafer

Country Status (1)

Country Link
JP (1) JPH06112292A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020161555A (en) * 2019-03-25 2020-10-01 信越半導体株式会社 Evaluation method of oxide film breakdown voltage characteristic of silicon wafer and manufacturing process management method of the silicon wafer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020161555A (en) * 2019-03-25 2020-10-01 信越半導体株式会社 Evaluation method of oxide film breakdown voltage characteristic of silicon wafer and manufacturing process management method of the silicon wafer

Similar Documents

Publication Publication Date Title
EP0487302B1 (en) Method for testing electrical properties of silicon single crystal
JP3451955B2 (en) Crystal defect evaluation method and crystal defect evaluation device
US6261843B1 (en) Test pattern for monitoring metal corrosion on integrated circuit wafers
JPH06295945A (en) Method and device for evaluating semiconductor manufacturing process
JPH06112292A (en) Evaluation of silicon wafer
US5742175A (en) Method of evaluating a density of oxygen-precipitation defects in a silicon wafer
JP2001085486A (en) Evaluation of substrate
US6122064A (en) Method for measuring thickness of films
JPH1154579A (en) Evaluation of semiconductor substrate
US7573568B2 (en) Method and apparatus for detecting a photolithography processing error, and method and apparatus for monitoring a photolithography process
JPH09199561A (en) Evaluation of silicon wafer
JPH11297779A (en) Detection of fault in semiconductor device and its manufacture
JP3994139B2 (en) Evaluation method of grow-in defect density of silicon wafer
KR20050012500A (en) A defect inspecting method for silicon wafer
JPH07142299A (en) Semiconductor silicon wafer
JPH0318744A (en) Method for measuring crystal strain of semiconductor
JPH11238773A (en) Evaluation of silicon wafer
JP2807679B2 (en) Insulating film defect detection method for silicon substrate
JP2864920B2 (en) Silicon wafer quality inspection method
JPH04111337A (en) Method for measuring concentration distribution in impurity layer formed on surface of semiconductor
JPH02208951A (en) Measurement of semiconductor device
JP3100960B1 (en) Method for adjusting the scale bar of an electron microscope using periodic waveforms on the vertical sidewalls of a photoresist layer
JPH09326428A (en) Method of evaluation for crystal defect of semiconductor substrate
JPH06242036A (en) Evaluation method for silicon wafer
JP2809266B2 (en) Semiconductor substrate defect inspection method and defect inspection device