JPH0574666A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device with a chip, the chip azimuth of which can be easily and clearly discriminated without increasing its area, by making one corner of power supply wiring put in a rectangular form around a circuit forming area different in shape from the other three corners and using the one corner as an azimuth discrimination mark. CONSTITUTION:This semiconductor device is constituted by mounting a semiconductor chip 1 provided with an azimuth discrimination mark 2 indicating the mounting direction of the chip 1 on its surface on a substrate 6. In such a semiconductor device, one corner of power supply wiring 4 put in a rectangular form around at least part of a circuit forming area 3 on the chip 1 is made different in shape from the other three corners. For example, the three corners of the wiring 4 are chamfered by 45 deg. and the one corner is formed to a rectangular corner formed of wires intersecting each other at right angles. The rectangular corner is used as the azimuth discrimination mark 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to an azimuth identification mark for facilitating identification of a chip mounting direction without increasing a chip area.

Nowadays, as semiconductor devices have been highly integrated, many input / output pads are required to be arranged on a chip, so that the input / output pads are often provided vertically and horizontally in the peripheral portion of the chip. For this reason, the orientation of the chip cannot be detected from the arrangement of the input / output pads, and the chip mounting direction may be erroneously recognized during bonding or the like.

Therefore, there is a need for an azimuth identification mark which can easily recognize the orientation of the chip without increasing the chip area.

[0004]

2. Description of the Related Art FIG. 4 is a plan view of an embodiment of a conventional method. FIG. 4A shows a pattern shape of a semiconductor chip.
(B) shows a semiconductor chip mounted on a DIP package. The conventional technique will be described below with reference to FIG.

Conventionally, when the directional chip 1 is mounted on the substrate 6, for example, when the chip 1 is mounted on a package for wire bonding, the chip 1 is mounted on the chip 1 in order to recognize the direction of the chip 1. The mounting direction of the chip 1 was confirmed using the provided azimuth identification mark 2.

The azimuth identification mark 2 must be easily recognized by using a device or with the naked eye. Therefore, for example, a large pattern having a characteristic shape like the arrow-shaped azimuth identification mark 2 in FIG.

Moreover, in order to facilitate recognition and prevent misidentification, it is not possible to arrange other patterns including the circuit pattern around the azimuth identification mark. Therefore, other than the circuit pattern that constitutes the semiconductor circuit, for example, the pattern of the power supply wiring 4 that surrounds the circuit forming region 3 and the input / output circuit 5 and the input / output circuit 5 that are arranged around the circuit forming region 3 In addition, it is necessary to secure a region for installing the azimuth identification mark that is not directly related to the circuit function and a sufficient space around the region, which causes an increase in the chip area.

This undesired increase in the chip area is extremely disadvantageous when a large pattern is required for visual inspection, making visual inspection difficult.

[0009]

As described above, the conventional method has a drawback in that the azimuth identification mark must be large and arranged with a sufficient space around the azimuth identification mark, which increases the chip area.

According to the present invention, a chip area is reduced by adding a function of an azimuth identification mark to a part of a circuit provided on a semiconductor chip or a registration mark used at the time of bonding so as to omit the azimuth identification mark. An object of the present invention is to provide a semiconductor device having a chip whose chip orientation can be easily and clearly identified without increasing the number.

[0011]

FIG. 1 is a plan view of a first embodiment of the present invention. FIG. 1 (a) shows a pattern shape of a semiconductor chip, and FIG. 1 (b) shows a semiconductor chip mounted on a package. Represents something.

FIG. 3 is a plan view of a second embodiment of the present invention,
3A and 3B show positioning marks provided on the semiconductor chip, and FIGS. 3A and 3B respectively show FIG. 3A and FIG.
It is a partially enlarged view of the portion (b), showing the shape of the positioning mark.

In order to solve the above problems, the first structure of the present invention is a semiconductor device in which a semiconductor chip 1 having an azimuth identification mark 2 for identifying the mounting direction is mounted on the surface with reference to FIG. In the above, the orientation identification mark 2 has a shape different from the other three corners of the corners of the power supply wiring 4 which is installed in a rectangular shape on the semiconductor chip 1 so as to surround at least a part of the circuit formation region 3. The second configuration has a plurality of positioning marks 7 and 8 for bonding on a line passing through the center of the chip 1, as shown in FIG. In the semiconductor device mounted with the semiconductor chip 1 provided, the azimuth identification mark 2 for identifying the mounting direction of the chip 1 is composed of the two positioning marks 7, 8 asymmetrical with respect to the center of the chip 1. To have Configured as a feature a.

[0014]

In the structure of the present invention, referring to FIG. 1 and FIG.
The pattern for identifying the chip orientation is a corner of the rectangular power supply wiring 4, or a positioning mark 7 for bonding,
8 is used.

Therefore, it is not necessary to provide a special chip orientation identification mark, and the chip area can be reduced. Further, the power supply wiring is thick and provided in the upper layer, so that it can be clearly identified. Therefore, the identification by the device is easy, and the visual identification can be made possible.

In addition, the power supply wiring is often arranged around the circuit pattern, and since the circuit pattern is not provided especially outside the corners, misidentification of the pattern is small. Note that the positioning marks are provided so as to be clear and not misidentified for that purpose.

Next, the azimuth discrimination based on the configuration of the present invention will be described. When the device recognizes the chip orientation, the entire field of the chip cannot be observed because the field of view of the device is narrow and limited to a specific position, and only the pattern in a small area of the specific position of the chip is observed. You must specify the chip orientation from.

In the first configuration of the present invention, referring to FIG. 1, a power supply wiring 4 is installed in a rectangular shape on the chip 1 so as to surround at least a part of the circuit formation region 3, and an orientation identification mark of the power supply wiring 4 is provided. One corner that should be 2 is formed in a shape different from the shapes of the other corners.

In the chip 1 having such power supply wiring 4,
When the chip is placed in the normal mounting orientation, the corner of the power supply wiring 4 which is used as the orientation identification mark 2 is located at the position where the orientation identification mark 2 should originally be, and goes into the field of view of the device. The shape of is the same as the given azimuth identification mark.

On the other hand, when the chip 1 is mounted in an abnormal azimuth, another corner of the power supply wiring 4 having a different shape from the azimuth identification mark 2 or no corner is located at such a position. No pattern that matches the orientation identification mark 2 is found in the visual field of the device.

Therefore, the mounting orientation of the chip 1 is determined by determining the identity between the angle of the power supply wiring 4 and the orientation identification mark 2 by using a device that includes the position where the orientation identification mark 2 should originally be in the visual field. It is possible to easily identify whether or not is normal.

In other words, the chip orientation can be easily confirmed even within a limited position, which is a specific position of one corner of the power supply wiring 4. The conventional positioning mark is formed from a centrally symmetric pattern that is arranged at a centrally symmetric position on a diagonal line that passes through the center of the chip. In this case, there is no change in the pattern with respect to the rotation of the chip by 180 degrees, and therefore, the 180 degree rotation of the chip orientation cannot be identified.

In the second configuration of the present invention, referring to FIG. 3, the relationship regarding the shapes of the plurality of positioning marks 7 and 8 provided on the line passing through the center of the chip 1 is relative to the center of the chip 1. It is a non-target pattern.

Therefore, when the chip 1 is rotated by 180 degrees, the positioning mark 8 located symmetrically from the center is located at the position where the positioning mark 7 serving as the azimuth identification mark should originally exist. However, this positioning mark 8
Is composed of a pattern asymmetric with respect to the positioning mark 7, which is an azimuth identification mark, and therefore the patterns do not always match.

Therefore, by using a plurality of positioning marks 7 and 8 in which the pattern is formed asymmetrically in the center, the chip orientation can be easily set even within a limited position at a specific position where one positioning mark 7 is present. You can check.

When the chip is rotated by 90 degrees or 270 degrees, or when the positioning mark is provided at a position different from the center even if it is rotated by 180 degrees, the positioning mark is positioned at the original position. The markings are not located so they are easily identified.

[0027]

EXAMPLES The present invention will be described with reference to examples. In the first embodiment of the present invention, referring to FIG.
A circuit forming region 3 and an input / output circuit 5 are provided on the semiconductor integrated circuit chip 1 having a substantially square shape of m, and a rectangular power source wiring surrounding the circuit forming region 3 is provided above the input / output circuit 5. Be done.

The width of the power supply wiring 4 is, for example, 200 μm, and three of its corners are 200 μm, for example, and are provided along a shape in which a corner of 45 degrees is cut. That is, when extended, two wirings that sandwich the corner at a right angle are connected via a wiring that connects at an angle of 45 degrees. Therefore, no rectangular wiring vertices are provided at these three corners.

On the other hand, in the remaining one corner of the power supply wiring 4, a rectangular apex composed of orthogonal wiring is formed as it is, and is used as the orientation identification mark 2. Then, FIG. 1 (b)
Referring to, a chip is mounted on the substrate 6, for example, a DIP package, and the input / output pads on the chip and the pads on the package are wire-bonded and connected.

The azimuth identifying device of the bonding device is adjusted so that the corner of the power supply wiring, which is the azimuth identifying mark 2, is located at the center of the visual field of the device when the chip is normally mounted. The azimuth is identified by confirming that the identification mark is composed of two half lines that sandwich a right angle.

In the present embodiment, the present invention can be easily applied only by partially changing the power supply wiring which is normally used. In addition, the power supply wiring can be visually confirmed, which facilitates visual inspection.

FIG. 2 is a plan view of a modification of this embodiment, showing a pattern shape of a semiconductor chip. In this modification, the corner serving as the azimuth identification mark of the power supply wiring 4 is formed in the corner-shaped wiring, and the power supply wiring 4 is formed in the other three corners.
Is formed as it is.

Therefore, the normal mounting direction is recognized by observing the cornered pattern. In this modification, since the three corners of the power supply wiring 4 are at right angles, it is easy to arrange the circuit pattern inside the power wiring 4 without leaving a wasted space.

The third embodiment of the present invention will be described with reference to FIG.
Positioning marks 7 and 8 used in the bonding device are provided at positions equidistant from the center of the semiconductor chip on the diagonal line.

3A and 3B, the two positioning marks 7 and 8 are plane-symmetric with respect to a plane orthogonal to a line connecting the two positioning marks 7 and 8. It consists of three cross-shaped marks placed at the vertices of the scalene right triangle.

Since there is no central axis of symmetry in the arrangement of such marks, the rotation of the chip by 180 degrees can be identified from the arrangement of the three crosses forming one mark. Therefore, orientation can be identified even with a device having a narrow field of view.

Further, in the present embodiment, since the positioning and the azimuth identification can be performed at the same time by using the same device, it is possible to make a simple and quick judgment by partially changing the existing device.

The present invention is not limited to packaging, but can be widely applied to mounting chips on a directional substrate.

[0039]

According to the present invention, since the chip orientation can be identified by using the corners or alignment marks of the power supply wiring that can be clearly observed, the mounting orientation can be easily and clearly determined without increasing the chip area. A semiconductor device having an identifiable chip can be provided, which greatly contributes to the performance improvement of the semiconductor device.

[Brief description of drawings]

FIG. 1 is a plan view of a first embodiment of the present invention.

FIG. 2 is a plan view of a modified example of the first embodiment of the present invention.

FIG. 3 is a plan view of a second embodiment of the present invention.

FIG. 4 is a plan view of an example of a conventional method.

[Explanation of symbols]

 1 chip 2 azimuth identification mark 3 circuit forming area 4 power supply wiring 5 input / output circuit 6 substrate 7, 8 positioning mark

Claims (2)

[Claims] 1. A semiconductor device having a semiconductor chip (1) having an orientation identification mark (2) for identifying a mounting direction on a surface thereof, wherein the orientation identification mark (2) is on the semiconductor chip (1). And at least a part of the circuit formation region (3) is surrounded by a corner of the power supply wiring (4) which is installed in a rectangular shape and has one corner different from the other three corners. Semiconductor device. 2. A semiconductor device equipped with a semiconductor chip (1) having a plurality of positioning marks (7, 8) for bonding on a diagonal of the chip (1), wherein the chip (1) is mounted. The azimuth identification mark (2) for identifying the direction has two positioning marks (7, 8) which are asymmetric with respect to the center of the chip (1). ..