JPH0563030A - Bonding agent and mounting method based on its application - Google Patents
Bonding agent and mounting method based on its applicationInfo
- Publication number
- JPH0563030A JPH0563030A JP3253099A JP25309991A JPH0563030A JP H0563030 A JPH0563030 A JP H0563030A JP 3253099 A JP3253099 A JP 3253099A JP 25309991 A JP25309991 A JP 25309991A JP H0563030 A JPH0563030 A JP H0563030A
- Authority
- JP
- Japan
- Prior art keywords
- adhesive
- bonding agent
- circuit board
- mounting
- mounting method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体チップ等の電子
部品の実装に関し、特にその接着剤及び実装方法に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to mounting electronic parts such as semiconductor chips, and more particularly to an adhesive and a mounting method therefor.
【０００２】[0002]
【従来の技術】ＳｉやＧａＡｓを材料に用いた半導体チ
ップを回路基板に実装する方法として、フリップチップ
法がある。これは、バンプ（突起電極）が形成された半
導体チップをフェイスダウン方式で、回路基板に接続す
る方法である。2. Description of the Related Art A flip chip method is known as a method for mounting a semiconductor chip using Si or GaAs as a material on a circuit board. This is a method of connecting a semiconductor chip having bumps (projection electrodes) to a circuit board by a face-down method.
【０００３】図１に、従来例を示す。同図は、回路基板
10に半導体チップ11を接続した状態の断面図である。こ
こで、12は半導体チップ11上にハンダや金などで形成さ
れたバンプ電極であり、回路基板10上のＩＴＯ（Indium
Tin Oxide）膜などで形成された配線パターン13と接続
される。14は半導体チップ11と回路基板10を固定するた
めの接着剤で、樹脂などが使用される。この樹脂14は、
通常、紫外線などで硬化する光硬化性樹脂で、回路基板
10が液晶ガラスなどのように透明であるような場合に、
回路基板10の底面（紙面下方）から、例えば紫外線を照
射し、樹脂14を硬化させることによって、半導体チップ
11と回路基板10を接続するようにしている。FIG. 1 shows a conventional example. The figure shows a circuit board
FIG. 3 is a cross-sectional view showing a state in which a semiconductor chip 11 is connected to 10. Here, 12 is a bump electrode formed of solder or gold on the semiconductor chip 11, and is an ITO (Indium) on the circuit board 10.
It is connected to the wiring pattern 13 formed of a tin oxide film or the like. Reference numeral 14 denotes an adhesive for fixing the semiconductor chip 11 and the circuit board 10, and resin or the like is used. This resin 14 is
A circuit board that is usually a photo-curable resin that cures with ultraviolet rays
When 10 is transparent like liquid crystal glass,
A semiconductor chip is obtained by irradiating, for example, ultraviolet rays from the bottom surface of the circuit board 10 (below the paper surface) to cure the resin 14.
11 and the circuit board 10 are connected.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、上述の
ような方法では、樹脂14に対して硬化による接着と収縮
の特性を同時に要求することになり、実装における両方
の特性の最適化が困難であった。また、光硬化性樹脂を
接着剤として用いる場合、光を照射することができない
ような構造、材料を使用するとき、具体的には回路基板
が透明でないセラミック等を使用したときなどは、この
ような接着剤を用いた方法では実装できないという不具
合が生じていた。さらに、この光硬化性樹脂は液体の状
態で吐出するため、吐出量の制御がしにくいという問題
もあった。本発明は、このような問題を解決し、半導体
チップと回路基板の接続において、光照射のできない回
路基板においても接続が可能で、特性の分化ができ、し
かも取扱いが容易な接着剤及び実装方法を提供すること
を目的とする。However, in the method as described above, the resin 14 is required to have the characteristics of adhesion and shrinkage due to curing at the same time, and it is difficult to optimize both characteristics in mounting. It was In addition, when using a photo-curable resin as an adhesive, when using a structure or material that cannot irradiate light, specifically when using a non-transparent ceramic substrate, etc. There was a problem that it could not be mounted by a method using a different adhesive. Further, since the photocurable resin is ejected in a liquid state, it is difficult to control the ejection amount. The present invention solves such a problem, and in the connection between a semiconductor chip and a circuit board, even a circuit board which cannot be irradiated with light can be connected, the characteristics can be differentiated, and the adhesive and the mounting method are easy to handle The purpose is to provide.
【０００５】[0005]
【課題を解決するための手段】上記目的を達成するた
め、本発明の接着剤は、所定の温度を印加することによ
り硬化による接着の機能を有する板状の熱硬化性接着剤
と、前記熱硬化性接着剤２枚に挟まれた、前記温度と異
なる温度を印加することにより収縮の機能を有する熱収
縮性接着剤、から成っている。また、本発明の実装方法
は、半導体素子と回路基板の接続を行なう実装方法であ
って、前記半導体素子上に形成された突起電極と、前記
回路基板上に形成された前記突起電極と対向する配線パ
ターンとを位置合わせし、前記半導体素子と前記回路基
板との間に、接着剤を介し、前記接着剤の硬化及び収縮
を行なうようにしている。To achieve the above object, the adhesive of the present invention comprises a plate-like thermosetting adhesive having a function of adhesion by curing when a predetermined temperature is applied, A heat-shrinkable adhesive sandwiched between two curable adhesives and having a function of shrinking when a temperature different from the above temperature is applied. Further, the mounting method of the present invention is a mounting method for connecting a semiconductor element and a circuit board, wherein the protruding electrode formed on the semiconductor element and the protruding electrode formed on the circuit board are opposed to each other. The wiring pattern is aligned, and the adhesive is cured and contracted between the semiconductor element and the circuit board via an adhesive.
【０００６】[0006]
【作用】このようにすると、接着剤は硬化による接着機
能と収縮機能を別々に有しているので、各々の特性の制
御が容易になる。また、硬化による接着において、例え
ば、硬化の条件が加熱であるような接着剤を用いれば、
光を照射できない場合でも問題はない。さらに、接着剤
が板状で扱いやすい形状であるため、作業性が向上す
る。In this way, since the adhesive has the adhesive function by curing and the shrinking function separately, it becomes easy to control each characteristic. Further, in the adhesion by curing, for example, if an adhesive whose curing condition is heating is used,
There is no problem even if the light cannot be emitted. Further, since the adhesive has a plate-like shape and is easy to handle, workability is improved.
【０００７】[0007]
【実施例】以下、本発明の実施例を図面を参照しつつ、
説明する。図２に、本発明を実施した両面テープ型の接
着剤20の構造を示す。同図において、21は熱硬化性接着
剤のシートである。熱収縮性接着剤22は、２枚の熱硬化
性接着剤21に挟まれている。熱硬化性接着剤21及び熱収
縮性接着剤22は、いずれも加熱という条件で硬化あるい
は収縮を行なうが、その硬化、収縮が開始する温度は異
なっている。加熱により、熱硬化性接着剤21及び熱収縮
性接着剤22は、体積収縮を起こす。前記接着剤20を使用
する場合、まず熱硬化性接着剤21が硬化する温度に加熱
して硬化させることによって、回路基板10と半導体チッ
プ11を接着する。その後、熱収縮性接着剤22が収縮する
温度に加熱して収縮させることによって熱収縮性接着剤
22の体積収縮分だけ接着剤20が収縮し、それに伴なう応
力によって回路基板10の配線パターン13と半導体チップ
11のバンプ電極12が圧接される。Embodiments of the present invention will now be described with reference to the drawings.
explain. FIG. 2 shows the structure of a double-sided tape type adhesive 20 embodying the present invention. In the figure, 21 is a sheet of thermosetting adhesive. The heat-shrinkable adhesive 22 is sandwiched between two thermosetting adhesives 21. The thermosetting adhesive 21 and the heat-shrinkable adhesive 22 both cure or shrink under the condition of heating, but the temperatures at which the curing and shrinkage start are different. The heating causes the thermosetting adhesive 21 and the heat-shrinkable adhesive 22 to shrink in volume. When the adhesive 20 is used, first, the circuit board 10 and the semiconductor chip 11 are bonded to each other by heating and curing the thermosetting adhesive 21 to a temperature at which the adhesive 21 is cured. Thereafter, the heat-shrinkable adhesive 22 is heated to a temperature at which the heat-shrinkable adhesive 22 shrinks to shrink the heat-shrinkable adhesive 22.
The adhesive 20 shrinks by the volume shrinkage of 22, and the stress accompanying it shrinks the wiring pattern 13 of the circuit board 10 and the semiconductor chip.
The bump electrodes 12 of 11 are pressed.
【０００８】図３は、上述の接着剤20を用いて、回路基
板10と半導体チップ11の接続を行なった場合の実装構造
の断面図である。図１と較べ、回路基板10上の配線パタ
ーン13と半導体チップ11のバンプ電極12の接触の強度が
違う。図３に示す構造の方が圧接された状態であり、よ
り強度が大きく、実装の信頼性が向上する。FIG. 3 is a sectional view of a mounting structure in which the circuit board 10 and the semiconductor chip 11 are connected using the adhesive 20 described above. Compared to FIG. 1, the contact strength between the wiring pattern 13 on the circuit board 10 and the bump electrode 12 of the semiconductor chip 11 is different. The structure shown in FIG. 3 is in a state of being pressure-welded, has higher strength, and improves reliability of mounting.
【０００９】上述の接着剤及び実装構造は、半導体チッ
プに限らず、容量や抵抗などの電子部品の回路基板への
実装にも応用できる。The adhesive and mounting structure described above are applicable not only to semiconductor chips but also to mounting electronic components such as capacitors and resistors on circuit boards.
【００１０】[0010]
【発明の効果】以上説明したように、本発明によれば、
接着剤が硬化による接着と収縮の両方の機能をそれぞれ
有しているため、特性のコントロールがしやすい。従っ
て、回路基板と半導体チップの接続の強度が増し、実装
の信頼性が向上する。また、加熱により硬化、収縮を生
じる接着剤なので、光の照射ができない材料の回路基板
の場合にも、容易に実装を行なうことができ、安定した
品質が得られる。さらに、板状の接着剤であるので、取
扱いが容易で、作業性の向上が図れる。また、このよう
な板状接着剤による接続であるので、半導体素子と回路
基板の熱膨張係数の差によるストレスがスライドするこ
とによって、開放され、品質向上に寄与できるという長
所もある。As described above, according to the present invention,
Since the adhesive has both functions of adhesion and contraction upon curing, it is easy to control the characteristics. Therefore, the strength of the connection between the circuit board and the semiconductor chip is increased, and the reliability of mounting is improved. Further, since it is an adhesive that is cured and contracted by heating, it can be easily mounted even on a circuit board made of a material that cannot be irradiated with light, and stable quality can be obtained. Further, since it is a plate-shaped adhesive, it is easy to handle and the workability can be improved. Further, since the connection is made by such a plate-like adhesive, the stress caused by the difference in the thermal expansion coefficient between the semiconductor element and the circuit board is slid and released, which has the advantage of contributing to quality improvement.
【図１】 従来の実装構造を説明するための図。FIG. 1 is a diagram for explaining a conventional mounting structure.
【図２】 本発明を実施した接着剤の構造を示す図。FIG. 2 is a diagram showing a structure of an adhesive embodying the present invention.
【図３】 本発明を実施した実装構造の断面図。FIG. 3 is a sectional view of a mounting structure embodying the present invention.
10 回路基板 11 半導体チップ 12 バンプ電極 13 配線パターン 14 接着剤 20 接着剤 21 熱硬化性接着剤 22 熱収縮粒子 10 Circuit board 11 Semiconductor chip 12 Bump electrode 13 Wiring pattern 14 Adhesive 20 Adhesive 21 Thermosetting adhesive 22 Heat shrinkable particles
Claims (2)
よる接着の機能を有する板状の熱硬化性接着剤と、 前記熱硬化性接着剤２枚に挟まれた、前記温度と異なる
温度を印加することにより収縮の機能を有する熱収縮性
接着剤、 から成ることを特徴とする接着剤。1. A plate-shaped thermosetting adhesive having a function of adhesion by curing when a predetermined temperature is applied, and a temperature different from the temperature sandwiched between the two thermosetting adhesives is applied. A heat-shrinkable adhesive having a function of shrinking by doing so.
装方法であって、 前記半導体素子上に形成された突起電極と、前記回路基
板上に形成された前記突起電極と対向する配線パターン
とを位置合わせし、 前記半導体素子と前記回路基板との間に接着剤を介し、
前記接着剤の硬化及び収縮を行なうことを特徴とする実
装方法。2. A mounting method for connecting a semiconductor element and a circuit board, comprising: a protruding electrode formed on the semiconductor element; and a wiring pattern formed on the circuit board and facing the protruding electrode. Positioning, via an adhesive between the semiconductor element and the circuit board,
A mounting method comprising curing and shrinking the adhesive.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3253099A JPH0563030A (en) | 1991-09-03 | 1991-09-03 | Bonding agent and mounting method based on its application |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3253099A JPH0563030A (en) | 1991-09-03 | 1991-09-03 | Bonding agent and mounting method based on its application |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0563030A true JPH0563030A (en) | 1993-03-12 |
Family
ID=17246478
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3253099A Pending JPH0563030A (en) | 1991-09-03 | 1991-09-03 | Bonding agent and mounting method based on its application |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0563030A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000019516A1 (en) * | 1998-09-30 | 2000-04-06 | Seiko Epson Corporation | Semiconductor device, connection method for semiconductor chip, circuit board and electronic apparatus |
| JP2003208105A (en) * | 2002-01-10 | 2003-07-25 | Matsushita Electric Ind Co Ltd | Display device and manufacturing method therefor |
-
1991
- 1991-09-03 JP JP3253099A patent/JPH0563030A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2000019516A1 (en) * | 1998-09-30 | 2000-04-06 | Seiko Epson Corporation | Semiconductor device, connection method for semiconductor chip, circuit board and electronic apparatus |
| US6410364B1 (en) | 1998-09-30 | 2002-06-25 | Seiko Epson Corporation | Semiconductor device, method of connecting a semiconductor chip, circuit board, and electronic equipment |
| US6656771B2 (en) | 1998-09-30 | 2003-12-02 | Seiko Epson Corporation | Semiconductor device, method of connecting a semiconductor chip, circuit board, and electronic equipment |
| JP2003208105A (en) * | 2002-01-10 | 2003-07-25 | Matsushita Electric Ind Co Ltd | Display device and manufacturing method therefor |
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