JPH0527135B2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical field to which the invention pertains] This invention relates to an external “in” signal or “off” signal.
In a phase advance capacitor control device that is equipped with an output relay that receives a signal and outputs an on or off control command to sequentially connect multiple groups of capacitors to the power system or disconnect them from the power system,
Alternatively, the present invention relates to a control device that can shorten the time from the "off" signal until the cyclical closing or disconnection of a phase advancing capacitor is completed.

[Prior art and its problems]

As a conventional control device of this type, there is one shown in FIG. This device includes a pulse generation circuit 1 that outputs a pulse signal after a predetermined time has elapsed after inputting an "on" or "off" signal, and a logical product of this pulse signal and the "on" or "off" signal. AND circuits 2 and 3 on the "in" signal side and the "off" signal side, respectively, which output clock pulses by
Delay circuits 4 and 5 delay and output the clock pulses from this AND circuit, and an "input" circuit inputs and counts the clock pulses from this delay circuit.
a trigger circuit 8 that outputs a trigger signal based on the clock pulses output from the counter circuits 6, 7 on the signal side and the "off" signal side, the AND circuits 2, 3, and the information stored in the counter circuits 6, 7; , 9, and an output storage circuit 10 which inputs the trigger signal output from this trigger circuit, outputs an on or off signal that causes the subsequent output relay to output the on or off control command, and stores this signal. , this on/off signal is 1
The output relay circuit 11 is configured so that the same number of output relays as the number of sets of ON and OFF signals in this output storage circuit when they are arranged in sets can be arranged in parallel. Therefore, the counter circuit 6 stores the advancing position of the ON control command output from the output relay circuit 11, and the counter circuit 7 stores the advancing position of the OFF control command. Further, the trigger circuits 8 and 9 output a trigger signal under the AND condition of the output signal of the counter circuit 6 or 7 and the clock pulse from the AND circuits 2 and 3, and
Although not shown here, the trigger signal output from the trigger circuit 8 on the signal side is input to the set terminal of the JK flip-flop circuit constituting the output storage circuit 10, sets this flip-flop circuit, and sets the "off" signal side. The trigger signal output from the trigger circuit 9 is input to the clock pulse terminal of the JK flip-flop circuit, and by resetting this flip-flop circuit, an on or off signal is output according to the "in" or "off" signal. A pulse signal output from the memory circuit 10 and then output from the delay circuit 4 or 5 advances the counter circuit 6 or 7 by one. An example of the operation of this device is shown in the column ``Operation A of conventional device'' shown in the upper half of FIGS. 5 and 6. The example in Figure 5 is
The output relay connects the capacitor group C ₁ to C ₁₀ , i.e.
Using a device configured to control up to 10 banks of capacitor groups, 5 banks of capacitor groups from C ₁ to C ₅ are automatically controlled (C ₆ to C ₁₀ are not used)
Indicates when to do so. In the figure, a white circle indicates a state in which the capacitor is connected, a black circle indicates a state in which the corresponding output relay is on but the capacitor is not connected (not in use), and a blank circle indicates a state in which the corresponding output relay is off and the capacitor is connected. Indicates no condition. Initially, all capacitors are disconnected from the system, and as the lagging power factor load increases, an "in" signal is output, and from step 1 to step 5, capacitor groups are turned on one bank at a time, starting with _C1. , Next, the load decreases and a "cut" signal is output, and in steps 6 to 8, one bank is disconnected from _C1 , and then the load increases again, and the capacitors are sequentially turned on starting from _C6 . It shows. However, since the capacitors C ₆ to _{C 10} are not connected to the grid, the delayed reactive power factor of the grid is not improved. Therefore, the closing command for the capacitors is outputted from _C6 to _C10 , returns from _C10 to _C1 , and then the capacitors are sequentially closed. In this device, in order to equalize the number of openings and closings of the switch that directly turns on and off the capacitor, and to make the lifespan uniform,
The on direction and off direction of the output relay are the same,
It is designed to perform cyclical movements,
Additionally, devices that operate with a delay so as not to respond to instantaneous load fluctuations are common, and in Figure 5, the time it takes to control the adjacent capacitor is set to, for example, several minutes. In this example, the time setting is performed by the pulse generation circuit 1 shown in FIG. Therefore, in this conventional device, the capacitor is connected to or disconnected from the grid only after the necessary time has been spent controlling the capacitor that is not connected to the grid. In “Operation A” in the upper half of Figure 5,
During the time when capacitors _C6 to _C10 are turned on, that is, the time from steps 9 to 13 of the "in" signal, the device is operating in vain. If the delay time is 5 minutes, it will take 25 minutes from when C5 is turned on until when C1 is turned on. "Operation A of conventional device" in the upper half of FIG. 6 shows a case where C3, C6, C8, C9, and C10 are not used, but this case also requires wasted time. In this way, with conventional equipment,
In order to perform cyclic operation, if there is an unused circuit among the circuits connected to the output relay, be sure to check the time from the operation of the used circuit to the operation of this unused circuit or this unused circuit. This has the drawback that it requires wasted time from the operation of the circuit to the operation of the circuit used, and that prompt power factor improvement cannot be achieved.

[Purpose of the invention]

As described above, the present invention eliminates the time loss of unused circuits found in conventional devices, and completes the closing or disconnecting of the required number of capacitor groups in a short time from an "ON" or "OFF" signal. The purpose of the present invention is to provide a phase advance capacitor control device that can perform the following steps.

[Key points of the invention]

This invention does not require an external “in” signal or “off” signal.
In a phase advance capacitor control device that is equipped with an output relay that receives a signal and outputs an on or off control command to sequentially connect multiple groups of capacitors to the power system or disconnect them from the power system,
A pulse generating circuit that outputs a pulse signal after a predetermined time has elapsed after the input of a signal or an "off" signal, and an "on" circuit that operates by the logical product of this pulse signal and the above-mentioned "on" signal or "off" signal. AND circuits on the signal side and "off" signal side, respective delay circuits on the "in" signal side and "off" signal side that delay and output the output pulse from this AND circuit, and from this delay circuit. A trigger signal is generated by the counter circuits on the "in" signal side and the "off" signal side, which input and store the output pulses of Trigger circuits on the "in" signal side and "off" signal side that output the signal, and a signal that inputs the trigger signal output from this trigger circuit and causes the subsequent output relay circuit to output the above-mentioned on or off control command. An output storage circuit that outputs and stores this signal, an output relay circuit that is controlled by the signal output from this output storage circuit to turn on or disconnect the corresponding phase advance capacitor, and the position of the unused phase advance capacitor. a jump setting circuit that outputs a signal and disables the output relay of the output relay circuit corresponding to the unused phase advancing capacitor to prevent the signal from being transmitted to the output relay; and the position outputted from the jump setting circuit. a jump determination circuit that determines whether or not the unused phase advancing capacitor can be skipped based on the signal, an external "in" or "off" signal, and the output signal of the counter circuit; By providing a pulse generation circuit that generates a pulse for advancing the counter circuit according to an output signal, it is possible to eliminate the wasted time that is spent before or after the operation of an unused phase advance capacitor that is found in conventional devices. That is.

[Embodiments of the invention]

FIG. 2 shows an embodiment of the invention, and the same parts as in FIG. 1 are given the same reference numerals. In this embodiment, a jump setting circuit 12, a jump determining circuit 13, a pulse generating circuit 14, and an OR circuit 15 are newly added to the conventional device shown in FIG. The jump setting circuit 12 sets the jump location in the output relay circuit, that is, the position of the unused output relay circuit, and sends the information to the jump determination circuit 13 and the output relay circuit 11. Based on this information, the contacts of the output relays where the jump is set are always turned off. If there is an unused position, the progress position of the previous stage is stored in the counter circuit 6 or 7 by the clock pulse CL1 generated from the previous stage "on" or "off" signal, and the trigger circuit 8, output storage circuit 10, and output relay Through the circuit 11, the "on" and "off" of this previous stage are controlled.
When the capacitor targeted by the signal is turned on or off, the output of the counter circuit 6 or 7 is generated by the clock pulse CL1 generated from the "on" or "off" signal of the previous stage and inputted via the delay circuit 4 or 5. signal, the position signal of the unused output relay circuit output from the jump setting circuit 12, and the "on" or "off" state of the previous stage.
A pulse is output from the jump discrimination circuit 13, which operates according to the AND condition with the signal, to activate the pulse generation circuit 14, and the clock pulse CL2 is outputted from the pulse generation circuit 14 prior to the next clock pulse CL1 outputted from the pulse generation circuit 1. is output from. Therefore, this clock pulse CL2 is stored in the counter circuit 6 or 7 via the OR circuit 15 and the AND circuit 2 or 3, and is also sent via the output storage circuit 10 by the trigger circuit 8 or 9 to the next pulse generating circuit 1. Before the output is output, it is transmitted to the output relay circuit 11 corresponding to the unused portion. In other words, the unused portions are controlled substantially simultaneously with the previous control. Note that the output storage circuit 10 uses the clock pulse CL2 from the pulse generation circuit 14 to set or reset the flip-flop circuits corresponding to the unused output relay circuits.
Since the unused circuits in the output relay circuit 11 are locked so as not to operate by the signal from the jump setting circuit 12, there is no change in the on/off state of the output relay contacts of these unused circuits.

An example of a circuit configuration for performing the above circuit operation is shown in FIG. In the same figure, if we consider the case where the jump setting circuit 12 is currently setting S3, that is, the third from the beginning of the 10 output relay circuits, when S3 is on, the input of the not circuit e is low. level (hereinafter simply referred to as "L"), and its output becomes a high level (hereinafter simply referred to as "H"), so the input A of the AND circuit d of the jump discrimination circuit 13 becomes "H". Also, when the “ON” signal is “H” (or “OFF”)
When the signal is "H"), the counter circuit 6 (or counter circuit 7) advances "0", "1", "2" and when the output of "2" becomes "H", the AND circuit a
Since the inputs of (or AND circuit b) are both "H", the output is "H", and the input of OR circuit c is "H", so its output is "H", and the output of the other circuit of AND circuit d is "H". Input B becomes "H". Therefore, the output C becomes "H" and the pulse generation circuit 14 is activated. In this way, if there is a point to jump, the signal at the jump setting position is picked up at the stage of the preceding "on" or "off" signal, and the jump point is jumped at high speed. Wasted time can be eliminated.

"Operation B" in the lower half of FIG. 5 shows that when the capacitors C6 to C10 are not used, the switches S6, S7, S
8, S9, and S10 are set to the jump side, and shows the output status of on/off control commands to the capacitor, and also shows "Operation B" in the lower half of Fig. 6.
shows the output status when S3, S6, S8, S9, and S10 are set to the jump side. For example, in the case of Fig. 6, as shown in Fig. 4,
Or, after the "off" signal is output, pulse generation circuit 1
(Fig. 2), the pulse generation circuit ₁
Period t _C of clock pulse CL2 output from 4
For example, if it is designed to be 1/10 or less, the counter circuit 6 or 7 is advanced at high speed in the section set to jump, and the flip-flop circuit of the output storage circuit 10 is set or reset.
It is as if the cyclic operation is performed only by the circuit to which the capacitor is connected. In addition, in Fig. 4, clock pulses CL1, CL2,
The number attached to CL3 indicates the circuit number in the output relay circuit 11 that received the signal from the output storage circuit 10.

〔Effect of the invention〕

According to the present invention, a jump setting circuit is provided which outputs a signal indicating the position of an unused output relay circuit, and this unused output relay circuit is rendered inoperable, and the position outputted from this jump design circuit is a jump determination circuit that determines whether or not the unused output circuit can be skipped from the signal, an external "in" or "off" signal, and the output signal of the counter circuit; and an output signal from the jump determination circuit. By adding a pulse generation circuit that generates pulses for the counter circuit increment, we have made it possible to perform cyclical ON/OFF operations using only the desired output relay in the output relay circuit. It is possible to complete the insertion or disconnection of the required number of capacitor groups from the "off" signal without wasting time, and therefore, the time required for power factor correction is significantly saved, especially when there are many capacitor groups that are not connected to the grid. At the same time, the cyclic operation of the switch that directly connects and disconnects the capacitor group is protected, so the switching life of the switch is equalized, and the switching life is shortened because the switching operation is biased to one of the switches. The advantage is thus maintained that frequent interruptions in the operation of the phase advance capacitor can be avoided.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram showing an example of the circuit configuration of a conventional phase advance capacitor control device, FIG. 2 is a block circuit diagram showing an example of the circuit configuration of a phase advance capacitor control device based on the present invention, and FIG. 4 is a circuit diagram showing an embodiment of a circuit configuration for performing an operation of jumping an unused output relay circuit, and FIG. 4 is an on/off signal applied to the output relay circuit of the phase advance capacitor control device based on the present invention. Figures 5 and 6 are waveform diagrams showing the output status of the conventional device and the device of the present invention, comparing the output status of on/off control commands for phase advance capacitors, including capacitors not connected to the power system. It is an explanatory diagram. 1... Pulse generation circuit, 2, 3... AND circuit, 4, 5... Delay circuit, 6, 7... Counter circuit, 8, 9... Trigger circuit, 10... Output storage circuit, 11... Output Relay circuit, 12... jump setting circuit, 13... jump determination circuit, 14...
Pulse generation circuit, 15...OR circuit.

Claims (1)

[Claims] 1 A phase-advanced capacitor equipped with an output relay that receives an external "in" or "off" signal and outputs an on or off control command so that multiple groups of capacitors are sequentially connected to or disconnected from the power system. The control device includes a pulse generating circuit that outputs a pulse signal after a predetermined time has elapsed after the input of the "on" signal or the "off"signal; AND circuits on the "in" signal side and "off" signal side that operate by the AND circuit, and the "in" signal side and "off" signal side, respectively, which delay and output the output pulse from this AND circuit a delay circuit,
Each counter circuit on the "in" signal side and the "off" signal side inputs and stores the output pulse from this delay circuit, and the output pulse output from the AND circuit and information stored in this counter circuit. Trigger circuits on the "in" signal side and the "off" signal side that output trigger signals according to the
An output storage circuit that inputs the trigger signal output from this trigger circuit and outputs a signal that causes the subsequent output relay circuit to output the above-mentioned ON or OFF control command, and also stores this signal; An output relay circuit that is controlled by a signal that connects or disconnects the corresponding phase advance capacitor, and an output relay circuit that outputs a signal indicating the position of the unused phase advance capacitor and corresponds to the unused phase advance capacitor. a jump setting circuit that disables the output relay and prevents signal transmission to the output relay, a signal at the position output from the jump setting circuit, an "on" or "off" signal from the outside, and the counter circuit. A jump determination circuit that determines whether the unused phase advance capacitor can be jumped based on an output signal, and a pulse generation circuit that generates a pulse for advancing the counter circuit based on the output signal from the jump determination circuit. A control device for a phase advance capacitor characterized by the following.