JPH05160727A - A/d converter - Google Patents

Abstract

PURPOSE:To obtain an A/D converter from which a stable digital signal is obtained even when a noise is inputted externally to an analog input terminal. CONSTITUTION:An analog input voltage obtained from an analog input terminal 3 and a comparison voltage from a D/A converter 2 are compared by a comparator 4 for plural number of times, plural obtained comparison results are stored in a plural-comparison result storage register 6, a majority decision circuit T applies majority decision to the plural results of comparison and the decided result of comparison is stored in a relevant bit of an A/D conversion result register 5.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an A / D converter, and more particularly, to an accurate A / D converter even for an analog input containing noise.
The present invention relates to an A / D converter that can perform D conversion.

[0002]

2. Description of the Related Art FIG. 3 shows a conventional A / D having a resolution of 4 bits.
1 is a block diagram of a converter, in which 1 is a reference voltage input terminal for inputting a reference voltage, and 2 is a comparison voltage (hereinafter, V
_Call it _ref . ) Generating D / A converter, 3 is an analog voltage input terminal to which an analog voltage (hereinafter, referred to as V _in ) is input, 4 is a comparator for comparing V _ref with V _in, and 5 is Stores the digital value that is the A / D conversion result 4
It is a bit A / D conversion result register. Where D /
The A converter 2 divides the voltage between the reference voltage input to the reference voltage input terminal 1 and the ground potential (hereinafter referred to as V _SS ) into 16 parts, and the 16 divided voltages and the A / D conversion result register The V _ref is generated based on the value of 5.

Next, the operation will be described. When A / D conversion is started, the most significant bit of the A / D conversion result register 5 is the power supply voltage level (hereinafter referred to as H level), and all other bits are at the ground level (hereinafter referred to as L level). .)become. Then, the D / A converter 2 generates V _ref according to these values, and this V _ref is input to the comparator 4. Next, the comparator 4 compares V _ref with V _in input from the analog voltage input terminal 3 once, and the comparison result is stored in the most significant bit. That is, when V _in is larger than V _ref , the most significant bit of A / D conversion result register 5 is set to H level, and when V _in is smaller than V _ref , the most significant bit of A / D conversion result register 5 is set. Set to L level. Hereinafter, this operation is performed by the A / D conversion result register 5
The analog voltage is converted into a digital value by repeating the above process for each bit and repeating to the least significant bit.

[0004]

As described above, in the conventional A / D converter, as a digital value stored in each bit of the A / D conversion result register 5, V _in
Since a comparison result obtained by comparing V _ref with V _ref once is used, when noise is externally input to the analog voltage input terminal 3 and the voltage level of V _in input to the comparator 4 fluctuates, conversion is performed. Digital value obtained by the above, that is, the comparator 4
The result of comparison between V _ref and V _in obtained from the above also fluctuates, and there is a problem that a stable digital signal cannot be obtained in a noise environment.

The present invention has been made to solve the above problems, and an A / D converter capable of obtaining a stable digital signal even when noise is externally input to the analog input terminal. Aim to get.

[0006]

A / D according to the present invention
The converter compares the comparison voltage obtained from the D / A converter with the analog voltage obtained from the analog voltage input terminal a plurality of times to obtain a plurality of comparison results, and the plurality of comparison results are judged by the majority decision circuit. However, the comparison result to be stored in the bit of the A / D conversion result register is determined.

The A / D converter according to the present invention is a D / A converter.
The first comparison result and the second comparison result of the comparison voltage obtained from the converter and the analog voltage obtained from the analog voltage input terminal
A match circuit determines whether the result of the third comparison is the same. If they match, the first comparison result is stored in a bit of the A / D conversion result register. If they do not match, the third comparison result. Is stored in the bit of the A / D conversion result register.

[0008]

In the present invention, the comparison voltage obtained from the D / A converter and the analog voltage obtained from the analog voltage input terminal are compared a plurality of times, and the plurality of comparison results obtained are used to register the A / D conversion result register. Since the comparison result to be stored in the bit is decided by the majority decision, the reliability of the comparison result stored in each bit is improved, and noise is externally input to the analog voltage input terminal during one comparison period. However, a stable digital signal can be obtained.

According to the present invention, the first comparison result and the second comparison result of the comparison voltage obtained from the D / A converter and the analog voltage obtained from the analog voltage input terminal are determined to be the same. The first comparison result is stored in the case of, and the third comparison result is stored in the bit of the A / D conversion result register when they do not match. Therefore, the reliability of the comparison result stored in each bit is Even if noise is externally input to the analog voltage input terminal during one comparison period, a stable digital signal can be obtained.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing an A / D converter according to an embodiment. In the figure, the same reference numerals as those in FIG. 3 denote the same or corresponding parts, and 6 denotes three comparisons for storing the result of a comparator 4. A result storage register, 7 is a majority circuit for judging the value of the register 6. Here, the A / D conversion result register 5 is made up of 4 bits, and the D / A converter 2 divides the voltage between the reference voltage input terminal 1 and V _SS into 16 to obtain the A / D conversion result register 5 The voltage is _divided according to the value of _Vref to generate _Vref .

Next, the operation will be described. When A / D conversion is started, the most significant bit of the A / D conversion result register 5 becomes H level, all other bits become L level,
According to these values, the D / A converter 2 generates V _ref ,
This V _ref is input to the comparator 4. And the comparator 4
V _ref and V _in input from the analog voltage input terminal 3
Is compared three times by the same principle as the conventional one, and the comparison results of these three times are stored in the comparison result storage register 6. Then, the majority decision circuit 7 makes a majority decision on the three comparison results stored in the comparison result storage register 6, and the decision result is stored in the most significant bit of the A / D conversion result register 5. Hereinafter, this operation is performed for each bit of the A / D conversion result register 5, and the analog voltage is converted into a digital value because the least significant bit is repeated.

In the A / D converter of this embodiment as described above,
V _ref and V _in are compared three times, and these comparison results are stored in the three comparison result storage registers 6, respectively.
A / D from the result of comparison of these three by the majority circuit 7.
Since the comparison result stored in the bit of the conversion result register 5 is determined, even if noise is externally input to the analog voltage input terminal 3 and the voltage level of Vin input to the comparator 4 fluctuates, each bit is changed. The reliability of the comparison result of V _ref and V _in stored for each is improved, and a stable digital signal can be obtained.

FIG. 2 shows A / A according to a second embodiment of the present invention.
2 is a block diagram showing a D converter, in which the same reference numerals as those in FIG. 1 denote the same or corresponding portions, 6 denotes a comparison result storage register for storing the comparison result in the comparator 4,
8 is a matching circuit for judging a digital value, 9a, 9b, 9
c and 9d are transmission gates. Here, the A / D conversion result register 5 consists of 4 bits, and the D / A converter 2
Divides the voltage between the reference voltage input terminal 1 and V _SS into 16 and divides the voltage according to the value of the A / D conversion result register 5 to V.
It is designed to generate _refs . Also, the transmission gate 9
a, 9b, 9c and 9d are respectively provided between the comparator 4 and the register 6, the comparator 4 and the matching circuit 8, the register 6 and the A / D conversion result register 5, and the comparator 4 and the A / D conversion result register 5, respectively. It is provided.

Next, the operation will be described. When A / D conversion is started, the most significant bit of the A / D conversion result register 5 becomes H level, all other bits become L level,
According to these values, the D / A converter 2 generates V _ref ,
This V _ref is input to the comparator 4. Then, in this comparator 4, first, V _ref and V _in from the analog input terminal 3 are input.
The first comparison is performed with the same principle as the conventional one, the transmission gate 9a is opened, and the result of the first comparison is stored in the register 6. Next, in the comparator 4, the second comparison between V _ref and V _in from the analog input terminal 3 is performed according to the same principle as the conventional one, and the transmission gate 9b is opened to open the second comparison result and the comparison result. The value stored in the storage register 6 is judged by the matching circuit 8, and if they match, the transmission gate 9c is opened and the value of the comparison result storage register 6 is set to A / D.
Stored in the most significant bit of the conversion result register 5, if they do not match, the transmission gate 9d opens, and V _ref and analog input terminal 3 performed in the comparator 4 in the same manner as above.
The result of the third comparison with V _in is stored in the most significant bit of the A / D conversion result register 5. Hereinafter, this operation is performed for each bit of the A / D conversion result register 5, and the analog voltage is converted to a digital value because the least significant bit is repeated.

In the A / D converter of this embodiment as described above,
The comparator 4 compares V _ref with V _in , stores the first comparison result in the comparison result storage register 6, and compares the stored first comparison result with the second comparison result. Are compared by the matching circuit 8 and if these comparison results match,
The first comparison result stored in the comparison result storage register 6 is stored in the bit of the A / D conversion result register 5, and if they do not match, the third comparison result is stored in the A / D conversion result register 5 Since noise is externally input to the analog voltage input terminal 3 and the voltage level of V _in input to the comparator 4 changes,
The reliability of the comparison result between V _ref and V _in stored for each bit is improved, and a stable digital signal can be obtained.

In each of the above embodiments, the A / D converter having a resolution of 4 bits has been described, but the present invention is not limited to this, and the same effect can be obtained even if the resolution is another number of bits. It goes without saying that it will be done.

Further, although three comparison result storage registers are provided in the first embodiment, an odd number of comparison result storage registers larger than this may be provided. In this case, the comparison results stored in each bit are compared. Further improve the reliability of.

[0018]

As described above, according to the present invention, in the comparator, the comparison voltage obtained from the D / A converter and the analog voltage obtained from the analog voltage input terminal are compared a plurality of times to obtain a plurality of comparison results. Since the plurality of comparison results are determined by majority and the comparison result to be stored in the bit of the A / D conversion result register is determined, the reliability of the comparison result stored in each bit is improved, There is an effect that a stable digital signal can be obtained even in a noise environment.

Furthermore, according to the present invention, the first comparison result and the second comparison result of the comparison voltage obtained from the D / A converter in the comparator and the analog voltage obtained from the analog voltage input terminal are compared. Is determined to match, and if they match, the first comparison result is stored in the bit of the A / D conversion result register, and if they do not match, the third comparison result is stored in the A / D conversion result register. Since the data is stored in bits, the reliability of the comparison result stored in each bit is improved, and a stable digital signal can be obtained even in a noise environment.

[Brief description of drawings]

FIG. 1 is a block diagram of an A / D converter according to an embodiment of the present invention.

FIG. 2 is a block diagram of an A / D converter according to another embodiment of the present invention.

FIG. 3 is a block diagram of a conventional A / D converter.

[Explanation of symbols]

 1 Reference voltage input terminal 2 D / A converter 3 Analog voltage input terminal 4 Comparator 5 A / D conversion result register 6 Comparison result storage register 7 Majority decision circuit 8 Match circuit

Claims (2)

[Claims] 1. A D / A converter that generates a comparison voltage based on a reference voltage input from a reference voltage input terminal and a ground potential, and the comparison voltage and an analog voltage input from an analog input terminal. And comparing the comparison voltage with the analog voltage by the comparator in correspondence with each bit of the A / D conversion result register consisting of a plurality of bits, and corresponding the comparison result. A plurality of comparison result storage registers for storing a plurality of comparison results obtained from the comparator for each comparison result, the A / D converter storing the bits in a bit and converting the analog voltage into a digital value, A majority decision circuit for making a majority decision on a plurality of comparison results stored in a plurality of comparison result storage registers, and comparing the comparison results decided by the majority decision circuit to the A / D
A digital converter characterized in that it is stored in a corresponding bit of a conversion result register. 2. A D / A converter that generates a comparison voltage based on a reference voltage input from a reference voltage input terminal and a ground potential, and the comparison voltage and an analog voltage input from an analog input terminal. And comparing the comparison voltage with the analog voltage by the comparator in correspondence with each bit of the A / D conversion result register consisting of a plurality of bits, and corresponding the comparison result. An A / D converter for storing the bit in a bit and converting the analog voltage into a digital value, the comparison result storage register storing a first comparison result from the comparator, and a second comparison result storage register from the comparator. A matching circuit that determines whether the comparison result of the first time and the comparison result of the first time stored in the comparison result storage register match is provided. When the determination result of the matching circuit is the same, the first comparison The result is stored in the corresponding bit of the A / D conversion result register, and when the determination result of the matching circuit does not match, the third comparison result from the comparator corresponds to the A / D conversion result register. An A / D converter characterized in that it is stored in bits.