JPH05102035A - Method of growth of semiconductor crystal - Google Patents

Abstract

PURPOSE:To improve throughput in crystal growth by irradiating predetermined regions of an amorphous semiconductor layer with excimer layer light to produce crystal nuclei so as to shorten the time interval between a low- temperature solid-phase annealing and the start of crystal growth. CONSTITUTION:In the first step, an opaque mask 17 is formed on an amorphous semiconductor layer 13 on a substrate 11. In the second step, the amorphous semiconductor layer is irradiated with excimer laser light 31 through the mask 17 to produce nuclei 18 for crystal growth in the irradiated region. In the third step, the substrate is subjected to a low-temperature solid-phase annealing so that the nuclei in the semiconductor layer 13 may grow to form single-crystal regions 19 and 20.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor crystal growth method for crystallizing an amorphous silicon layer such as an SOI substrate or an SOS substrate.

[0002]

2. Description of the Related Art In a high resistance load type static RAM (hereinafter referred to as SRAM), a load type memory cell formed of polycrystalline silicon is used. However, it is difficult for the high resistance load type SRAM to secure sufficient operation margin, reliability, standby current and the like. Therefore, in order to solve the above problems, a stacked SRAM in which a thin film transistor formed of polycrystalline silicon having excellent film quality is used as a load element has been proposed. As a method for forming polycrystalline silicon, an ordinary chemical vapor deposition method, a random solid phase growth method, or the like has been proposed. In particular, with the random solid phase growth method, it is possible to form a polycrystalline silicon layer having a large grain size of 1 μm or more. A method for forming a thin film transistor in a selectively formed single crystal region has also been proposed. Next, a method of selectively forming a single crystal region will be described with reference to the process chart of FIG.
As shown in FIG. 1A, silicon (Si ⁺ ) is ion-implanted into the polycrystalline silicon layer 52 on the silicon oxide layer 51 with a low dose. Subsequently, as shown in (2) of the figure, a resist mask 53 is formed on the upper surface of the polycrystalline silicon layer 52,
Silicon (Si ⁺ ) is selectively ion-implanted into the polycrystalline silicon layer 52 not covered with the resist mask 53 with a high dose amount. After that, the resist mask 53 is removed, and as shown in FIG. 3C, a crystal is grown by a low temperature solid phase growth method centering on a region where silicon is ion-implanted at a high concentration to form a single crystal silicon region 54. To do.

[0003]

However, in the method of forming a polycrystalline silicon film by the ordinary chemical vapor deposition method, when large crystal grains are formed, the film quality is excellent, the leakage is high, and the mobility is high. It is difficult to form a polycrystalline silicon film having In the random solid phase growth method, it is difficult to selectively grow a crystal, and therefore the channel of the transistor may be applied to the crystal grain boundary. In this case, the leakage current and the threshold voltage vary, and the reliability of the transistor is reduced. Further, in the method of selectively forming the single crystal silicon region, since it takes several hours from the start of the low temperature solid phase growth process until the crystal starts to grow, the throughput is low. Further, as a method for forming an SOI substrate, a method of irradiating an argon ion laser for crystallization, a SIMOX method, a zone melt method, or the like has been proposed, but all of them have poor reproducibility and low throughput.

It is an object of the present invention to provide a method for growing a semiconductor crystal, which selectively forms a single crystal region having excellent quality.

[0005]

The present invention is a method for growing a semiconductor crystal, which has been made to achieve the above object. That is, in the first step, a light blocking mask is formed on the upper surface of the amorphous semiconductor layer on the substrate. Next, in a second step, using a light-shielding mask, the amorphous semiconductor layer is irradiated with excimer laser light to generate nuclei for crystal growth. Subsequently, in a third step, low temperature solid phase annealing treatment is performed to grow crystals from the nuclei generated in the amorphous semiconductor layer to form a single crystal region.

[0006]

In the above semiconductor crystal growth method, a light-shielding mask is formed on the upper surface of the amorphous semiconductor layer, and an excimer mask is formed on the portion of the amorphous semiconductor layer where a single crystal region is to be formed using the light-shielding mask. By irradiating with laser light irradiation, nuclei for crystal growth are generated. Thereafter, low temperature solid phase growth is performed to grow crystals from the nuclei to form single crystal regions.

[0007]

EXAMPLE An example of the present invention will be described with reference to the process chart for forming a single crystal region shown in FIG. As shown in FIG. 1A, an insulating film 1 of silicon oxide (SiO ₂ ) is formed on the upper surface of a substrate 11 made of silicon by, for example, a low pressure chemical vapor deposition method.
2 is formed into a film. Then, a low pressure chemical vapor deposition method using monosilane (SiH ₄ ) or disilane (Si ₂ H ₆ ) as a reaction gas or a chemical vapor deposition method using plasma is used to deposit amorphous silicon on the upper surface of the insulating film 12. The amorphous semiconductor layer 13 is formed to have a thickness of 40 nm, for example.
The film forming temperature at this time is set to 450 ° C. or lower.

In the above process, a polycrystalline silicon layer is formed on the upper surface of the substrate 11 by the chemical vapor deposition method,
Silicon (Si ⁺ ) is added to the polycrystalline silicon layer formed thereafter.
May be ion-implanted to amorphize the polycrystalline silicon layer to form the amorphous semiconductor layer 13. Alternatively, the substrate 11
The substrate 11 is made of quartz glass without forming the insulating film 12 of silicon oxide on the upper surface of the substrate, and the amorphous semiconductor layer 13 made of amorphous silicon is formed on the substrate 11 by the chemical vapor deposition method as described above. It is also possible to form a film.

Then, in a first step shown in FIG. 2B, a silicon oxide film 14 having a thickness of about 500 nm and a thickness of about 100 nm are formed on the upper surface of the amorphous semiconductor layer 13 by, for example, a chemical vapor deposition method. And the silicon film 15 are formed in a laminated state. The silicon oxide film 14 is formed to have a thickness that allows the heat of the excimer laser light thermally converted by the silicon film 15 to be sufficiently released by irradiating the excimer laser light. The thickness of the silicon film 15 is not limited to 100 nm as long as the excimer laser light does not pass therethrough. Normally, if the thickness is 80 nm, the excimer laser light does not pass therethrough, so the thickness is formed to be 80 nm or more.

After that, an etching mask (not shown) is formed on the upper surface of the silicon film 15 with a resist by the usual photolithography. Then, using this etching mask, for example by reactive ion etching,
The silicon film 15 and the silicon oxide film 14 are anisotropically etched to remove the portion indicated by the chain double-dashed line. Then, a light-shielding mask 17 in which a through hole 16 is provided in the silicon film 15 and the silicon oxide film 14 is formed. Through hole 1
6 is formed in the center of the region where the crystal is to be grown,
The maximum size of the diameter is 0.8 μm. When the diameter is 0.8 μm or more, the portion where crystals are grown in the low temperature solid phase growth process described later becomes polycrystalline silicon.

Thereafter, as shown in FIG. 3C, the etching mask is removed by, for example, an asher process. Next, in the second step, using the light-shielding mask 17,
Excimer laser light 31 is irradiated toward the amorphous semiconductor layer 13. The excimer laser beam 31 passes through the through hole 16 and is irradiated onto the amorphous semiconductor layer 13, and the nucleus 18 is generated in the irradiated portion of the amorphous semiconductor layer 13. The energy density of the excimer laser light 31 for irradiation corresponds to the thickness of the amorphous semiconductor layer 13 (for example, the thickness of the amorphous semiconductor layer 13 is 40 nm). In the case of about 130 mJ / cm ² )
Is set to.

Subsequently, as shown in FIG. 4D, the light-shielding mask 17 [see (3) in FIG. 1] is removed by means such as wet etching or plasma etching which does not damage the amorphous semiconductor layer 13. To do. Next, the third step is performed. In this step, the amorphous semiconductor layer 13 in which the nuclei 18 are generated is subjected to a low temperature solid-phase annealing treatment to grow a dendrite crystal from the nuclei 18 in which the width and the length are about several μm.
m dendritic single crystal regions 19 and 20 are generated. This low temperature solid-phase annealing treatment is performed, for example, by using an electric furnace, making the furnace a nitrogen (N ₂ ) atmosphere, keeping the temperature of the atmosphere 600 ° C., and holding it for 40 hours.

The growth state of the single crystal regions 19 and 20 produced by the low temperature solid phase annealing process will be described with reference to FIG. First, (1) of the figure shows a crystal growth state after irradiation of excimer laser light (see FIG. 1) on a region having a diameter of 0.7 μm and performing low-temperature solid-phase annealing treatment for 3 hours. As shown in the figure, nuclei (not shown) for crystal growth are generated in a region (a portion surrounded by a two-dot chain line) irradiated with excimer laser light. Dendritic crystals 21 grow substantially radially from the nuclei to form single crystal regions 19 and 20. Then, the case where the low temperature solid phase annealing treatment is further continued is shown in (2) of the figure. In this case, the dendritic crystal 21 further grows, and the single crystal region 19 crystal-grown from one nucleus grows until it comes into contact with the adjacent single crystal region 20. At this time, the portion where the single crystal regions 19 and 20 contact each other becomes the crystal grain boundary 22.

Single crystal region 1 formed as described above
Nos. 9 and 20 have excellent film quality uniformity, low leakage, and high carrier mobility. Further, since the single crystal regions 19 and 20 can be formed at desired positions in the amorphous semiconductor layer 13, when a transistor (not shown) is formed in the amorphous semiconductor layer 13, a channel layer of the transistor is formed. Can be formed in the single crystal regions 19 and 20.

As described above, when the single crystal regions 19 and 20 are used as the channel layer of the transistor, the carrier mobility μ becomes high. Incidentally, in the case of a thin film transistor, the value of μ is about 100 cm ² / Vs. Therefore, the transconductance gm becomes large. Therefore, the leak current is reduced. Further, since there is no crystal grain boundary in the channel layer, variations in leak current and threshold voltage Vth are reduced. Further, since the heat treatment temperature at the time of crystallization is 600 ° C. or lower, a low temperature process becomes possible.

[0016]

As described above, according to the present invention,
Since it is possible to generate nuclei in the amorphous semiconductor layer by irradiation of excimer laser light, it is possible to shorten the time for nucleation,
The crystallization throughput is improved. Further, since the light-shielding mask is formed and the excimer laser light is irradiated only to the portion of the amorphous semiconductor layer to be crystallized, the single crystal region can be selectively formed. Therefore, a single crystal region can be formed in a region where a channel layer of a transistor is formed. As a result, the grain boundary does not exist in the channel layer, the leak current is greatly reduced, the mobility is increased, and the variation in the threshold voltage is reduced. Therefore, the reliability of the transistor can be improved.

[Brief description of drawings]

FIG. 1 is a process drawing of forming a single crystal region of an example.

FIG. 2 is an explanatory diagram of crystal growth in a low temperature solid phase annealing process.

FIG. 3 is an explanatory diagram of a conventional crystal growth method.

[Explanation of symbols]

 11 substrate 13 amorphous semiconductor layer 17 light-shielding mask 18 nucleus 19 single crystal region 20 single crystal region 31 excimer laser light

Claims (1)

[Claims] 1. A first step of forming a light-shielding mask on an upper surface of an amorphous semiconductor layer on a substrate, and irradiating the amorphous semiconductor layer with excimer laser light using the light-shielding mask. A second step of generating nuclei for crystal growth in the amorphous semiconductor layer, and performing low temperature solid phase annealing treatment on the amorphous semiconductor layer to grow crystals from the generated nuclei. And a third step of forming a single crystal region in the amorphous semiconductor layer, the method for growing a semiconductor crystal.