JPH0497564A - Semiconductor device - Google Patents

Abstract

PURPOSE:To permit high-speed information processing by extremely small electric consumption by locking a conductive carrier in the activating area in a barrier area and generating electric dipole by the localization of the conductive carrier. CONSTITUTION:The barrier area 7 of a high-resistance semiconductor, etc., inclxades plural activating areas 6 and a conductive carrier 4 is locked in the activating areas 6. The activating areas 6 contain an impurity atom 5, and since the activating areas which generate electric dipole by the localization of the conductive carrier are separated by the barrier area, the conductive carrier does not move between the activating areas and high-speed operation is attained. Since the conductive carrier generated by the impurity atom is locked in the activating area, the conductive carrier does not flow out from the activating area and information is maintained and stored. The electric dipole is generated by the localization of the conductive carrier in the activating area, the information is expressed and stored by the direction and the size of the electric dipole and the content is controlled by an external electric field. The content of the information is successively transmitted to the adjacent electric dipole using the interaction caused by the electric field between the adjacent electric dipoles and the information is transmitted.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a semiconductor device, and particularly to a semiconductor device that expresses, transmits, stores, or processes information using a quantum confinement structure. [Conventional technology] With recent advances in microfabrication technology, it has become possible to perform microfabrication at the submicron or nanometer level, and it has become possible to create microstructures that are comparable to or smaller than the de Broglie wavelength of electrons. . At the same time, new devices and information processing methods to replace conventional transistor circuits have been sought. As one such proposal, for example, the first publicly known example is U.S. Pat.
There is a "quantum coupling device" described in Japanese Patent No. 2473). Regarding similar devices, see Mark Ni Reid, Symposium on 1986 VLSI Technology, pp. 1-4 (Nark, A.
Reed, Symposium 1986 VL
SI Technology, pp, 1-4) and
D.K. Ferry, Physics and Technology on Submicron Structures. Springer Fairy 9, 1988, pp. 232-236, (D., FerryyPhy
sics and Technology of Su
bmicronStructures, Spring
er-Verlag, 1988. pp, 232-2
36) etc., among which the above-mentioned first
A known example of a "quantum coupling device" as shown in FIG. ), and electrons move between the quantum dots by tunneling effect, thereby processing information. As a specific configuration of this, for example, quantum dots are made of Ga-aA-s, and this is made of G-aA-s.
It is sufficient to fill the surrounding area with aAlAs.

[Problem to be solved by the invention]

In a conventional integrated circuit using a transistor, a large amount of power is required to be consumed because stray capacitance inside the transistor and accompanying wiring is charged and discharged each time the transistor operates. In the future, it is thought that the degree of integration will reach its limit due to advances in microfabrication and restrictions on power consumption. In addition, in circuits using conventional transistors, many transistors are connected to each other with metal wiring, so as the degree of integration increases, the area required for wiring and the resistance of wiring increase, which also affects the performance of integrated circuits. This is a major limiting factor. Furthermore, with miniaturization, elements in integrated circuits are rapidly becoming more complex. For example, dynamic RAM memory cells have conventionally used capacitors with a simple planar structure, but in order to secure large capacitance in the submicron region, extremely complex shapes such as trench-shaped capacitor cells have been used. It's becoming necessary. It is believed that this trend will continue in the future and will cause an increase in the manufacturing cost of integrated circuits. Furthermore, integrated circuits using conventional transistors have limitations in operating speed. In conventional transistors, conduction carriers actually run from the source to the drain (from the emitter to the collector in bipolar transistors) to form a current, and the presence or absence of this current corresponds to the digital signal 110. Therefore, switching operation requires time (travel time) for conduction carriers to actually move from the source to the drain of the transistor. However, as is well known, the upper limit of the velocity of conduction carriers in a semiconductor is the saturation velocity (about 1xlO'cm/s). Therefore, the traveling time is also limited. The quantum coupling device of the first known example is no different from conventional transistors in that its basic operation is that electrons, which are conduction carriers, actually travel between quantum dots, and are similar to transistors. subject to speed limitations. Furthermore, in the quantum coupling device described above, a digital signal is expressed depending on whether or not there is one electron in a quantum dot. It is clear that information is lost in this quantum coupled device, just as information is lost in the storage cells of a dynamic RAM (without a refresh operation). This is because in semiconductors, electrons disappear due to recombination. Alternatively, it may be generated due to thermal excitation. Accordingly, it is an object of the present invention to provide a semiconductor device that expresses, transmits, stores, or processes information in order to process information at high speed with extremely low power consumption. Another object of the present invention is to provide a new semiconductor device that has a high dielectric constant (refractive index) and can respond quickly. Another object of the present invention is to provide a semiconductor device that is a storage medium suitable for mass storage. [Means for solving the problem] In order to achieve the above object, a barrier region (7) made of a high-resistance semiconductor, an insulator, or a semi-insulator is provided, and a plurality of active regions are provided in the barrier region (7). (6), the active region (6) being able to confine conduction carriers (4) therein. Each of the active regions (6) contains an impurity atom (5) that acts as a donor or an acceptor, and localization of the conductive carriers within one of the plurality of active regions generates an electric dipole. It constitutes a semiconductor device.

[Effect]

Because the active regions are separated by a barrier region made of a high-resistance semiconductor, an insulator, or a semi-insulator, conductive carriers do not move between the active regions. Therefore, the operating speed of the device is not limited by the time required for the conduction carrier to travel, and high-speed operation can be achieved. Furthermore, since conduction carriers generated by impurity atoms acting as donors or acceptors are confined inside the active region, the conduction carriers do not flow out of the active region and are lost, and therefore information is not lost. There is no. This allows information to be retained and stored. Furthermore, information can be expressed and stored by the localization of the conduction carriers inside the active region to generate electric dipoles, and by the direction and size of the electric dipoles. Moreover, the content can be controlled by applying an electric field from the outside. Further, the content of information can be sequentially transmitted to the adjacent electric dipoles by using the interaction caused by the electric field acting between adjacent electric dipoles, and thereby information can be transmitted. Various effects achieved by means of the present invention will be explained in detail below. In a conventional transistor circuit, a transistor functions as a switch, and whether the transistor is in an on state or an off state corresponds to a digital signal. At this time, the signal appears as a potential in the metal wiring. In the information representation of the present invention, the spatial distribution of electric dipoles is associated with information. The direction and size of an electric dipole can be easily controlled by an electric field. Therefore, the direction and size can be changed from a long distance without using metal wiring. Moreover, unlike transistors, it is not necessary to flow current to change the direction or size of the electric dipole, so it is inherently suitable for low power consumption operation. Furthermore, since it is possible to remotely control a large number of electric dipoles simultaneously and in parallel, a processor using this is inherently suitable for parallel processing. It goes without saying that parallel processing is extremely important for high-speed information processing. Furthermore, in conventional clock distribution using metal wiring, it is difficult to synchronize a large number of information processing elements due to clock skew due to wiring resistance, which is an obstacle to high-speed operation. In the present invention, clock distribution is performed at the propagation speed of light by remotely controlling an electric dipole using an electric field, so that clock skew is extremely small. Further, since electric dipoles create an extremely anisotropic electric field distribution around them, information can be transmitted between adjacent electric dipoles without using metal wiring. Further, as an element having a finite electric dipole, it is necessary to confine conductive carriers in a finite region. For this purpose, a so-called quantum confinement structure may be formed using semiconductors having different electron affinities, and an impurity serving as a donor or acceptor may be added into the structure. Therefore, a semiconductor device based on the principle of the present invention has a much simpler structure than a conventional transistor. Furthermore, if a structure with two low potential regions for electrons (double minimum potential structure) is used as a quantum confinement structure, conduction carriers exist in the first low potential energy region or in the second low potential energy region. Since it can be associated with two types of electric dipole efficiency vectors depending on whether it exists in a region, it is compatible with digital signal processing and digital signal storage. Furthermore, since quantum confinement structures can be made small to nanometer-level dimensions, signal processing chips and memory chips using them can be extremely highly integrated. Further, according to the present invention, an active region having a large electronic polarizability is realized by adjusting the wlM height of the barrier film. By arranging them in a grid, it is possible to realize a state in which the electric dipoles of nearby active regions are aligned in the same direction. This means that if a small electric dipole is generated in one active region, this will create an electric field in the adjacent active region. Due to the large electronic polarizability, this active region has a large electric dipole efficiency vector, creating a large electric field in the original active region. Therefore,
The original active region also has large electric and gas dipole efficiency vectors. Using the terminology of dielectric physics, this is
Since it has spontaneous polarization, it can form a kind of artificial ferroelectric material. Conventional ferroelectric materials have insufficient response speed because they utilize rotation of ion polarization, and when a capacitor is formed, the dielectric constant decreases in a high frequency region. However, since the artificial ferroelectric material produced by the semiconductor device of the present invention uses the movement of electrons by tunneling for polarization, it can respond much faster than conventional ferroelectric materials. Therefore, a capacitor for extremely high speed and ultra high frequency applications can be formed. Furthermore, when a structure in which such quantum confined structures with double minimum potential are arranged in a lattice is made into a thin film and an electric field is applied in a direction perpendicular to the film, most of the electric dipoles in the quantum confined structure are affected by the electric field. However, under conditions where the electric field is not very strong, there may be regions with electric dipoles pointing in the opposite direction to these electric dipoles. Moreover, this inverted polarization region has a constant size and remains stable unless erased by applying a large electric field. This is due to the mechanism explained below. A vertical electric field polarizes the membrane. At this time, a surface charge is generated on the membrane surface due to polarization, and the electric field (anti-polarization field) created by this surface charge has a direction that reduces the polarization. The formation of regions with opposite polarization reduces the surface electric field and reduces the overall energy. This reversed polarization region has a constant size and exists stably, so it behaves as a type of particle (or pseudoparticle). This inverted polarization region remains stationary under a -like vertical electric field, but has the property of moving when the vertical electric field changes depending on the location. Therefore, in this storage system, which can record information by making the in-plane distribution of the reversed polarization region correspond to information, the recorded tV density is extremely high. Memory retention requires no power consumption and is therefore non-volatile. If this inverted polarization region corresponds to Ilo of a digital signal, it can also be used for digital signal processing. This means that instead of using naturally occurring particles called conduction carriers in conventional semiconductor devices, reversed polarization regions, which are artificial pseudoparticles, are used as information carriers. If a non-uniform vertical electric field is applied, the inverted polarization region moves, and there is an essential difference from conventional semiconductor devices in the following sense. First, in moving in this reversed polarization region, electrons only move an extremely short distance within each quantum confinement region. Moreover, the direction in which electrons move is perpendicular to the film, and is perpendicular to the direction in which the reversed polarization region moves. In conventional semiconductor devices, it was necessary for electrons to actually move through the semiconductor at the same time as information, but in the present invention, information transmission does not involve such movement of electrons. In reality, the electric field created by the electric dipole travels through the semiconductor at the speed of light propagation. Therefore, information processing is performed at extremely high speed. Furthermore, in conventional semiconductor devices, electrons are accelerated (that is, gain energy) by an electric field and travel while colliding with obstacles (crystal lattices and impurities), resulting in energy being converted into heat. In other words, power consumption is large and chip heat generation is also large. In contrast, in the present invention, since electrons do not actually move, such energy consumption is extremely small.

【Example】

A first embodiment of the present invention will be described below. Figure 1(a) (
b) and (c) show a semiconductor device using a quantum confinement structure according to a first embodiment of the present invention. FIG. 5A is a diagram showing the structure of the active region. As shown in the figure, 1 is the first quantum well, 2 is the thin barrier film, and 3 is the first quantum well.
is a second quantum well, 5 is a donor, and the active region 6 is constituted by these. This active region is embedded within the barrier region 7. FIG. 5B is a diagram showing the potential energy in the active region. As shown in the figure, the first and second quantum wells 1 and 3 are made of a semiconductor having a higher electron affinity than the barrier region, and can confine conduction electrons therein. That is, the active region constitutes a quantum confined structure. The thin barrier film 2 is made of a semiconductor (or insulator) having a smaller electron affinity than the quantum wells 1 and 3. Further, impurity atoms serving as donors are added to the thin barrier film. Conduction electrons originating from the donor reside in either the first or second quantum well. The height and thickness of the energy barrier of the thin barrier film are set so that electrons can transition from quantum well 1 to quantum well 3 or from quantum well 3 to quantum well 1 with a finite probability by tunneling or thermal excitation. Here, the distance between active regions is 1! (dipole lattice constant) is a, and the width of the first and second quantum wells is d. Let the thickness of the barrier film between the quantum wells be t, and the height of this barrier film be bh. Combinations of materials used for the barrier region and quantum well include GaAs and GaAs, and AlAs and GaA.
s, TnP and GaI nPAs, GaP and Ga1nP
As, Si and 5iGe, SiC2 and Si, 5iGe and G
Possible combinations include e. Generally, different materials may be used for the thin barrier film 2 and the barrier region 7, but the same material may also be used. To give a specific example, the barrier region is Ga A I A s (the ratio of A I is, for example, 20%), and the first and second quantum wells 1 and 3 are cubic and thin barriers made of GaAs with sides of 10 nm. The film is 2 nm thick GaAIAs (Al ratio is 15%, for example).
) to which − donor Si is added. The above configuration can also be realized using an acceptor instead of a donor. In this case, holes move in the active region instead of electrons. In this example, the barrier region is Si, and the first and second quantum wells 1.3 are 5iGe (
An example of a cubic thin barrier film made of Ge (Ge ratio: 15%, for example) is one in which one acceptor B is added to 1 nm thick Si. Furthermore, FIG. 10(c) is a diagram showing a lattice structure. As shown in the figure, active regions 6 are arranged in a grid within barrier regions 7 . Next, the operation of this device will be explained. In each active region shown in FIG. 1(a), conduction electrons 4 generated from donors exist in either quantum well 1 or 3. Depending on whether the electron is in quantum well 1 or 3, this active region has a finite electric dipole efficiency vector, ie a vector giving the electric dipole's strength and direction. The electric dipole efficiency vector p is expressed by the following equation. P=q 1 d (1) q is the amount of charge of the electron, and vector d is the distance vector between the average position of the electron and the donor. Therefore. The structure shown in FIG. 1(a) has an electric dipole efficiency vector pointing either upward or downward. In a structure arranged in a lattice as shown in Figure 1(c), each active region has an electric dipole efficiency vector pointing upward or downward, so for example, looking at the distribution of electric dipoles at a certain moment, the
It looks like figure (c). If the electric dipole efficiency vectors of each active region are independent, and there are n active regions, a total of 2'' distributions can be considered.If a rule is established to associate this with digital information, n-bit This means that n bits of information are expressed inside the device by this embodiment.If the electric dipole efficiency vectors of each active region are not independent. The amount of information that can be expressed is less than n bits.By sandwiching this lattice structure between electrodes and applying an external electric field, it is possible to change the electric dipole efficiency vectors of the active regions almost simultaneously.In each active region, It receives an electric field consisting of the sum of the external electric field and the electric fields created by other active regions, and the electric dipole efficiency vector changes according to the change in the electric field.As shown in Figure 2, each active region has an extremely anisotropic structure around it. The electric field vector E (r) created by the dipole at a point away from the vector r is expressed by the following formula: E (r) = [3(p - r) r - r2p co/
(4πε, 3) ... (2) As shown in Figure 2, the electric field E is in the same direction as the electric dipole on a straight line in the vector direction of the electric dipole, but in the direction perpendicular to the electric dipole. On the straight line, it is in the opposite direction to the electric dipole. Since a force acts on an electric dipole that tends to direct the electric dipole in the direction of the electric field, this can be used to increase or conversely suppress the electric dipole efficiency in a certain direction. This means that information is transmitted between active regions by dipole interaction. The specific manner in which the change occurs varies depending on the initial state and the interaction between the active regions, but this can be controlled and used as an information processing device. This information processing device can handle up to n bits of data. At this time, information is transmitted at the speed of light, so information is transmitted at extremely high speed. In addition, as in this example, the region where the potential energy is minimum in the active region is 2 (of quantum wells 1 and 2).
If there are several locations (hereinafter referred to as a double minimum potential structure), the electric dipole efficiency vector can be significantly changed by a particularly small change in the electric field. This is because the electronic polarizability α of the active region becomes extremely large. This will be explained below. The electronic polarizability is defined by the following equation. p=αE (3) where p is the electric dipole efficiency vector and E is the electric field vector in the active region. Similar to the electronic polarizability of atoms,
The electronic polarizability of the active region is approximately expressed by the following equation using perturbation theory of quantum mechanics. α=2 I <1 1 q d l 2> 12
/ (E2-E,)・・・・・・・・・ (4) In the two lines, <11 is the state vector of the ground state of the active region expressed using Dirac's bra symbol, and 12> is the state vector of the ground state of the active region. The state vector of one excited state is expressed using Dirac's Kerat symbol, so <11qcl12> is the matrix element of the electric dipole efficiency vector qd in energy key representation, E is the energy of the ground state, and E2 is the first It is the energy of the excited state. A simple calculation shows that as the barrier height of the barrier film increases, the denominator of this equation, E2-E, decreases monotonically, and therefore α increases. When the height of the thin barrier film becomes infinite, E2-El becomes O and α becomes infinite. In other words, even if the electric field is O, it has a finite electric dipole efficiency vector or a permanent dipole. In any case, in the double minimum potential active region, the magnitude of the electronic polarizability α can be controlled over a very wide range by changing the height of the potential barrier of the thin barrier film, and an extremely large α can be achieved. As is clear from its definition, an active region with a large electronic polarizability has a large electric dipole efficiency vector even in response to a small electric field. By adjusting the barrier height of the thin barrier film to create an active region with large electronic polarizability, and arranging them in a grid as shown in Figure 1, the electric dipole efficiency vectors of neighboring active regions will be in the same direction. It is possible to achieve a state that is consistent with the following. This is shown in FIG. This is due to the following reasons. If a small electric dipole efficiency vector occurs in one active region, this creates a small electric field at the location of the adjacent active region. Due to the large electronic polarizability, this active region has a large electric dipole efficiency vector, creating a large electric field in the original active region. Therefore, the original active region also has a large electric dipole efficiency vector. When such positive feedback acts from neighbor to neighbor, active regions located close to each other will have electric dipole efficiency vectors in the same direction. Hereinafter, such a group of active regions will be referred to as a "domain." If the electric dipole efficiency vector in the active region is replaced with a spin magnetic dipole efficiency vector, this embodiment is very similar to a ferromagnetic material. In the field of magnetic materials, a region with aligned spins is called a domain, and this term is also used in the present invention. The domain of this embodiment is extremely stable because the active regions exert feedback on each other, and the direction of the electric dipole efficiency vector is maintained even without applying an electric field. Using the terminology of dielectric physics, this can be expressed as having spontaneous polarization. The following conditions are known for spontaneous polarization to occur in a substance with a three-dimensional cubic lattice. This is based on the C0 Introclid 5th Edition (J Sons. 1, nt. phys. ics, pp. 17-418), 4 Nα 3/4π.
...is hailed. Here, N is the dipole density, which in the present invention corresponds to the active region density. As mentioned above, α can be made extremely high by increasing the potential of the thin barrier film, so it is easy to satisfy this condition. Therefore, the feasibility of spontaneous polarization is clear. By increasing the barrier height or thickness of the thin barrier region, the stability of the polarized state is improved, making it possible to maintain spontaneous polarization up to high temperatures. In cases other than a three-dimensional cubic lattice, for example, in the case of a square lattice or a two-dimensional lattice, 3/4 of the right side of the above conditional expression
Although π changes, the same conditional expression holds true. The direction of this spontaneous polarization can be reversed by an externally applied electric field. The relationship between polarization (electric dipole efficiency per unit volume) and external electric field has hysteresis, as shown in FIG. This hysteresis can be used to store information. Until now, B a T i has been used as a material with spontaneous polarization.
-group ferroelectric materials such as O, are known. In the electric dipole efficiency vectors of these natural ferroelectric materials, spontaneous polarization occurs mainly due to the displacement of ions constituting the crystal. The present invention differs greatly from these methods in that an electric dipole efficiency vector is generated by the movement of electrons. Since electrons are much lighter than ions, the present invention has a much faster response to electric fields than natural ferroelectrics. By sandwiching the structure of this example between electrodes, a capacitor with a high dielectric constant and an ultra-high-speed response can be formed.a B a
Ferroelectric materials such as T x Oz inherently have a high dielectric constant, but because the high dielectric constant is achieved by displacement of ions, the response speed is slow. Since the present invention achieves a high dielectric constant through electron displacement, the response speed is three orders of magnitude faster than that of ordinary ferroelectric materials. If the width of the quantum well is designed to be large, the range in which electrons can move increases, and the dielectric constant increases. In addition, by increasing the density of the quantum confined structures (shortening the lattice spacing), the dipole interaction between the quantum confined structures becomes stronger. After all, the dielectric constant becomes high. Semiconductor superlattice structures have been extensively studied so far, but
Previous efforts have been limited to combining different types of semiconductors to create semiconductors with different physical constants such as mobility and band gaps. In contrast, the present invention is significantly different from conventional methods in that it is possible to combine semiconductors to achieve properties similar to those of a ferroelectric substance, which is a qualitatively different material, and is considered to be an epoch-making invention. . In this embodiment, which has a spontaneous polarization and a domain structure as described above, a domain is generated by applying an external electric field. It is possible to erase and move the border position. In the present invention, since information is expressed by the spatial distribution of electric dipoles in a quantum confined structure, there are various advantages over the conventional information expression method using a transistor circuit. (In conventional transistor circuits, the transistor functions as a switch, and the ON or OFF state of the transistor corresponds to a digital signal. At this time, the signal appears as a potential in the metal wiring.) The electric dipole is
The direction and size can be easily controlled by electric field. Therefore, the direction and size can be changed from a long distance without using metal wiring. In other words, information can be transmitted without wiring. Furthermore, unlike a transistor, it is not necessary to flow a current to change the direction or size of the electric dipole, so the present invention is essentially suitable for operation with ultra-low power consumption. Since the interaction between electric dipoles also propagates at the propagation speed of light,
Extremely fast. The information transmission speed is not limited by the saturation speed of electrons as in conventional semiconductor devices. Since the present invention can maintain finite polarization without a power source, it can be used as a storage medium by recording the polarization direction and magnitude while changing it depending on the location. By arranging quantum confined structures at a high density, it is possible to obtain a much higher storage density than a normal semiconductor memory device. Furthermore, magnetic recording requires the generation of a magnetic field during writing, which requires a large current to flow. In the present invention, since it is only necessary to generate an electric field, the power consumption and size of the writing device are much smaller than in magnetic recording. Furthermore, since the present invention uses a semiconductor, conventional semiconductor devices and
Since circuits can be created, it is also easy to create memory read/write circuits, communication circuits, signal processing circuits, etc. using conventional techniques. A second embodiment using the present invention will be described below. FIG. 5 shows a field effect transistor used in a storage cell of a nonvolatile random access memory (RAM) according to a second embodiment of the present invention. Here, 8 is a p-type silicon substrate, 9 is a source region made of an n medium region, 10 is a drain region also made of an n+ region, 11 is a source terminal, 12 is a thin barrier film, 13 is a gate terminal, and 14 is a gate 15 is a barrier region, 16 is a quantum well, and 17 is a drain terminal. The quantum well is made of polycrystalline Si, and the thin barrier film is an n-type doped SiO2 film that is thin enough to allow electron tunneling current to flow. A gate insulating film (18) is composed of a barrier region, a quantum well, and a thin barrier film. This includes the first and second active regions (19°20). Next, the operation of the insulated gate field effect transistor according to the second embodiment will be explained with reference to FIG. In the gate insulating film 18, two states shown in FIGS. 6(a) and 6(b) stably exist. That is, there are two states in which the electric dipole is directed upward and one in which it is directed downward. Conduction electrons generated from donor impurities in the thin SiO□ film are distributed in the quantum wells. In the region of the thin SiO2 film, the potential energy is high, so the probability of the existence of electrons is necessarily small. For this reason, electrons tend to exist in quantum wells that are far away from the center due to slight thermal fluctuations. Therefore, finite electric dipoles are likely to occur. When the first active region 20 has an upward electric dipole, an upward electric field is applied to the second active region. Therefore, an upward electric dipole is also generated in the active region 2. The electric dipole of this second active region also creates an upward electric field in the first active region, so that the upward electric dipole efficiency vector of the first active region becomes increasingly large. It was found that the upward state is stable due to the effect of positive feedback described above. Exactly the same argument holds true for the downward electric dipole state, which is also stable. In this way, this gate insulating film 18 has two stable states inside. When the source and drain of this insulated gate field effect transistor are grounded and the voltage applied to the gate electrode is varied, a current-voltage characteristic with hysteresis as shown in FIG. 7 can be obtained. Even when the gate-source voltage is 07, a state in which the train current flows and a state in which it does not flow can be realized. By using the above properties, a non-volatile RAM (which retains data even when power is not connected) can be realized. An example of this configuration is shown in FIG. 29 is a row direction decoding circuit, 21 is a word line, 27 is a control line, 22 is a data line, 26 is a memory cell, 24 is a selection transistor using an ordinary insulated gate field effect transistor, and 25 is explained in FIG. A storage transistor 28 is a field effect transistor having a bistable state, a column direction decode/selection circuit, and a sense circuit. Write and read operations of this nonvolatile RAM will be explained next. When writing, the selected word line is changed from low to high. The other word lines are low. next,
Set the control line of the bit you want to write to the write voltage, and set the data line to low level. Since the gate of the storage transistor for this bit is at a write voltage and the drain is at a low level, the storage transistor is in a low threshold state. That is, a row was written to this bit's memory. Next, when writing high, the control line is set to low after the above low write operation, and only the data line of the memory cell to which high is to be written is set to the write voltage. At this time, a low level is applied between the gate and source of the storage transistor, and a level lower than the write voltage by the threshold voltage of the selection transistor is applied between the drain and source. Therefore, a write voltage of negative polarity is applied between the gate and drain, and the storage transistor enters a high threshold state. In other words, a high is written. When reading, the word line is set to high level, the selection transistor is turned on, the control line is set to low level, and the data line is set to high level (for reading). In a memory cell in which the storage transistor is in a low threshold state, both the storage transistor and the selection transistor are turned on, so the memory cell discharges the charge on the data line, and the potential of the data line decreases. In a memory cell whose storage transistor is in a high threshold state, the data line remains at a high level. The signal on this data line is amplified by a sense amplifier and output to the outside to complete the read operation. The voltage for writing is set higher than the voltage for reading. This actual voltage value is determined by the hysteresis characteristics of the storage transistor. Conventionally, in semiconductor non-volatile memories, charge is injected and extracted through an insulating film, so the number of times data can be rewritten is limited due to long-term fatigue of the insulating film. If the insulating film is made thinner, the number of rewrites will increase, or the data retention period will become shorter. Furthermore, erasing/rewriting data requires injecting charges through an insulating film, which takes about milliseconds. For these reasons, it is not suitable for applications where data is rewritten every machine cycle of a computer. In contrast, in this embodiment, data is retained by positive feedback based on dipole interaction. That is, there is a function to keep two states stable inside the insulated gate. Therefore, even if the thickness of the thin barrier film is reduced to 10 angstroms or less, memory retention is not affected. Therefore, the above-mentioned problem of long-term fatigue can be avoided. In particular, this thin barrier film can be made of a semiconductor with a large energy gap, and in this case, even if a thicker film is used, there is no problem of long-term fatigue. In addition, the time required to erase or rewrite data in this storage device is extremely fast.
It can be done in less than a nanosecond. This is because only a small number of carriers need to move from the top to the bottom (or from the bottom to the top) of the barrier film during rewriting. A third embodiment of the invention will be described below. Figure 9(a)
shows an example of a storage device according to a third embodiment of the present invention. As shown in FIG. 3C, similarly to the first embodiment, an active region 31 consisting of a first quantum well 35, a second quantum well 36, and a thin barrier film 34 is arranged in a lattice shape in a barrier region 37. embedded. The first quantum well 35 and the second quantum well 36 are made of a material having higher electron affinity than the barrier region 37, and the thin barrier film 34 is made of a material that has a higher electron affinity than the barrier region 37.
6. It is made of a material with a smaller electron affinity than either of them. 33
is the donor impurity. The difference from the first embodiment is that the electron affinity of the first quantum well 35 is set larger than the electron affinity of the second quantum well 36, and when considering a single active region, the electrons are It exists stably in well 35. This active region has a lattice structure within a thin film-like barrier region, and 30 is a control electrode made of semiconductor or metal;
38 is a ground region made of n+ semiconductor. Next, this operation will be explained. The active regions arranged in a lattice pattern can have spontaneous polarization by the same mechanism as in the first embodiment. In the case of this embodiment, since the first quantum well has a larger electron affinity than the second quantum well, the probability of existence of electrons is greater in the first quantum well. Therefore, downward electric dipoles (or spontaneous polarization) are likely to occur. However, in this example, since the overall shape is a membrane shape (
Since the horizontal dimension is much larger than the vertical dimension, a depolarizing field is created. A depolarization field is an electric field generated by charges created on the surface of a film-like substance when it is polarized, and has a direction that reduces the polarization inside the substance. Due to this anti-polarization field, as shown in FIG. 9(b), a minute region 31 having an upwardly inverted spontaneous polarization (hereinafter referred to as an inverted polarization region) can stably exist. The existence of this reversed polarization region 31 can be formulated as follows. The energy of this system consists of the following three terms. UT: UW+UE+UD ・−・−・ (6) Here, UT is the total energy, and is based on the case where it is polarized downward like -. Uw is the increase in energy due to the existence of a transition region between the reversed polarization region and other regions, UE is the term representing the interaction between the reversed polarization region and the external electric field, and UD is the interaction between the reversed polarization field and the reversed polarization region. This is a term that represents Assuming that the reversed polarization region is circular due to symmetry, the following analytical formula is obtained. Uw= 2πrσ ・・・・・・・・・
(7) UE = 2 πr”Ps (Eext + Δφ/
q d )・・・・・・・・・ (8) UD=−2πr2PsPs (1-2N)/ε・・・・
(9) where r is the radius of the reverse polarization region, σ is the energy of the transition region per unit area, Ps is the magnitude of spontaneous polarization, and E
ext is the downward external electric field perpendicular to the membrane, Δφ is the difference in electron affinity between the first and second quantum wells, q is the amount of electron charge, and d is the center of the first and second quantum wells. N is the anti-electric field coefficient (approximately 173 when the diameter 2r is equal to the film thickness, and decreases monotonically as r increases), and E is the dielectric constant of the quantum well. Although no electric field is applied from the outside in this example, Δφ/qd is a finite value by using materials with different electron affinities for the first quantum well and the second quantum well. Using this equation, the dependence of energy on radius r is determined as shown in FIG. According to the figure, there are two conditions for stable points of r: r=O and r=r. The point r=o is polarized in a --like manner and there is no reverse polarization, and r=r is the radius r. This corresponds to the case where an inverted polarization region occurs. Under either of these conditions, once the state is reached - the state continues. Therefore, the inverted polarization region can be associated with the digital signal "1" or 110'1 and used for recording digital information. Such reversed polarization can be easily generated by applying an electric field substantially parallel to the normal direction of the film and controlling the electric field. To generate an inverted polarization region, an electric field may be applied upward to the film. This can be done by forming an electrode near the surface of the film and applying a negative voltage to it. At this time, as shown in FIG. 11, r=0 becomes unstable, and only a finite r becomes stable. After this, even if the external electric field is set to O, the finite r value is maintained. Shifting polarization reversal can be achieved by providing a gradient in the strength of the electric field perpendicular to the membrane. Under a gradient electric field as shown in FIG. 12, the reversed polarization region moves in the direction where the upward electric field becomes stronger. This is because, as shown in FIG. 11, locations where the upward electric field is strong have lower energy and are more stable. In order to move the reversed polarization region over a long distance, the ninth
A method as shown in Figure (a) and Figure 13 is used. The T-shaped control electrodes 39 and the hollow-shaped control electrodes 40 are arranged alternately as shown in FIG. In addition, in a direction substantially parallel to the plane of the thin film,
An electric field whose direction rotates over time (rotating electric field) is further applied. Under the parallel electric field, the control electrode is polarized and a positive or negative charge is generated at the end. Since an upward electric field is applied to the active region under a negative charge, the inverted polarization region is more stable if it exists under the negative charge.When a 6-rotation electric field is applied, the 1-inverted polarization region is They are sequentially attracted to the charged side and move sequentially. By repeating the operation shown in FIG. 13, the inverted polarization region can be moved to any desired location. By forming the above-described devices on the same chip, a serial memory as shown in FIGS. 14(a) and 14(b) can be formed. Here, 41 is an electrode for applying a horizontal electric field, 42 is a power supply and control circuit, 43 is a storage section, 44 is a sense circuit and I10 port, 45 is a minor loop, 46
is a transfer gate, and 47 is a major loop. 6 Digital information is recorded depending on the presence or absence of an inverted polarization region, and is circulated on a minor loop by a rotating electric field. Reading of information is performed by opening the transfer gate 46, sending the information to be read to the major loop, and passing it through the work/○ port. Conversely, information is written by transferring the inverted polarization region from the I10 boat to the major loop and sending it to the minor loop via the transfer gate. The reversed polarization region operates as a type of particle (quasi-particle) and can retain and transmit information. This inverted polarization region can be used as a new information carrier instead of conventional electrons and holes. The reversed polarization region itself is energetically stable, and unlike electrons, it does not disappear due to recombination. Information storage using conventional electronics. Information processing requires the movement of large numbers of electrons. In the present invention, when the one-inversion polarization region moves, the actual movement of electrons is slight, and the electric field distribution moves at high speed. Therefore, information can be transmitted at high speed and with low power consumption. Next, the effects of such a recording device will be explained. It is a nonvolatile recording device because it can retain information without a power source. By arranging quantum confined structures in high density,
It is possible to obtain a much higher storage density than ordinary semiconductor memory devices. Also. In magnetic recording, it is necessary to generate a magnetic field for writing, and a large current needs to flow at this time, but in the present invention, it is only necessary to generate an electric field, so the power consumption and size of the writing device are far lower than that of magnetic recording. It becomes something small. Also,
Since the present invention uses a semiconductor, it is possible to create conventional semiconductor devices and circuits on the same material as the storage medium. etc. can be easily created using conventional technology. Although it was mentioned above that the inverted polarization region moves when a non-uniform vertical electric field is applied, there is an essential difference from conventional semiconductor devices in the following sense. First, in the movement of this reversed polarization region, electrons only move an extremely short distance between the first quantum well and the second quantum well within each quantum confinement region. Moreover, the direction in which electrons move is perpendicular to the film, and is perpendicular to the direction in which the reversed polarization region moves. In conventional semiconductor devices, it was necessary for electrons to actually move through the semiconductor at the same time as information, but the information transmission of the present invention does not involve such electron movement (or involves only a very small movement).
. In reality, the electric field created by the electric dipole travels through the semiconductor at the speed of light propagation. Therefore, the movement of the reversed polarization region is extremely fast. Furthermore, in conventional semiconductor devices, electrons are accelerated (that is, gain energy) by an electric field and travel while colliding with obstacles (crystal lattices and impurities), resulting in energy being converted into heat. In other words, the power consumption is increased by 1, and the chip heat generation is also increased. In contrast, in the present invention, electrons do not actually move. This type of energy consumption is extremely expensive. In this example, the case where the electron affinities of the first quantum well and the second quantum well are different is shown, but even when the electron affinities are the same, the same effect can be obtained by applying an electric field perpendicular to the film. can. In this embodiment, an example has been described in which donor impurities are added to the active region and electrons move within the active region. A similar effect can be obtained by applying an acceptor impurity and utilizing the movement of holes. Next, regarding the manufacturing process of this example, FIG. 15(a),
This will be explained using (b), (c), and (d). First, a film to be a barrier region, a film to be a quantum well, a film to be a thin barrier region, a film to be to be a quantum well, and a film to be to be a barrier region are successively formed on an n-type semiconductor substrate. To give an example of specific materials, Si is used for the semiconductor substrate, undoped Si for the barrier region, 5iGe for the quantum well, and B-doped Si for the thin barrier region. In this case, holes are confined in the quantum well. This structure is processed by photolithography and dry etching (FIG. 6(b)) to produce a quantum confined structure. After this, as shown in the same figure (C). A semiconductor region that will become a barrier region is selectively grown. Finally, a protective film and a control electrode are formed to obtain the present invention. FIG. 17 shows a random access memory according to a fourth embodiment of the present invention. As shown in FIG. 4(a), the first quantum well 49. An active region 52,53 consisting of a second quantum well 5o and a thin barrier film 51 is embedded in the barrier region 54. The first quantum well 49 and the second quantum well 50 are made of a material that has a higher electron affinity than the barrier region 54, and the thin barrier film 51 is made of a material that has a lower electron affinity than either the first quantum well 49 or the second quantum well 50. Become. 55 is a donor impurity. Reference numeral 56 denotes a memory cell, which consists of a pair of active regions 52 and 53. A word line 57 and a data line 58 are formed to sandwich this memory cell. The word line and data line are made of semiconductor or metal with high impurity concentration. Furthermore, as shown in the cross-sectional view of FIG. 2B, memory cells, word lines, and data lines are stacked and arranged in high density. Next, the operation of this embodiment will be explained. When writing digital information to a memory cell, do the following. Set the word line to a positive voltage ■, and the data line to a negative voltage -■
Set to . At this time, unselected word lines and bit lines are set to the ground level, a voltage of 2cm is applied to the selected memory cell, and the electrons in the active region 52 are transferred from the second quantum well to the first quantum well. Moving. This produces a downward electric dipole in the active region 52. Since this electric dipole creates an upward electric field in the active region 53, an upward electric dipole is generated in the active region 53 due to the influence of this electric field. This is called state 1. To write the opposite information (0), it is sufficient to apply a voltage -V to the word line and a voltage V to the data line. During this writing, a voltage of only V is applied to the unselected cells, but by adjusting the dark barrier height of the first quantum well and the second quantum well and the distance between the active region 52 and the active region 53, It can be designed so that the state does not change at voltage 2, but the state is reversed at voltage 2. As shown in FIG. 18, in the memory cell, a pair of electric dipoles applies an electric field to each other in a direction that increases the dipole, and positive feedback occurs, so that the state is stably maintained. This is just a flip-flop (latch circuit) using an electric dipole as shown in the figure! M4CJ. It has become. As such flip-flops (latch circuits) using electric dipoles, a type connected in series as shown in FIG. 19 can also be considered. Read the information as follows. When a voltage of 2 is applied to the word line and a voltage of 1 is applied to the data line, 1 is written into the selected cell. At this time, if the memory cell is originally 1, the current flowing to the data line is small. On the other hand, if it is originally 0, the charge necessary to invert the electric dipole of the memory cell flows from the memory cell to the data line. This charge is read out using a highly sensitive sense amplifier. At this time, the information in the memory cell is destroyed, so it is rewritten after reading. According to this embodiment, an ultra-high density memory can be constructed. In particular, by arranging them three-dimensionally as shown in FIG. 17(b), a large-capacity memory can be constructed. In addition, the simple configuration of a pair of active regions allows a static flip-flop (latch circuit) to be configured in terms of milliseconds, and is characterized in that the state can be stably maintained. Therefore, a refresh operation like the conventional dynamic RAM is not necessary. Therefore, the control circuit of the storage device using the present invention becomes simple. Using the fifth embodiment of the present invention, a description will be given of what structure should be adopted when a certain operating temperature is set. FIG. 20 is a diagram showing the relationship between the displacement of the carrier position due to polarization in the dipole and the applied electric field when an electric field is applied to the active region according to the embodiment of Section 5 of the present invention (specific structure consider the structure shown in Figure 1). When an electric field is applied, carriers are displaced from the center of the active region. The magnitude of this displacement is proportional to the electric field while the electric field is small. The electric field dependence of displacement, ie, the proportionality coefficient of displacement to electric field, increases as the temperature decreases. This is because when the temperature becomes low, the thermal energy of carriers decreases, so the probability that carriers stably exist in either the first quantum well or the second quantum well increases, making it easier to form dipoles. When this proportionality coefficient becomes larger than a certain threshold,
The active region is spontaneously displaced. This threshold value is determined in a first-order manner. When carriers in an active region happen to be displaced by fluctuations, this creates an electric field around them. Therefore, the surrounding active region becomes polarized (has an induced dipole). This induced dipole applies a feedback electric field to the original active region, displacing carriers. If the interaction is strong enough and the displacement of this carrier is equal to or larger than the initial fluctuation, the carrier will be displaced spontaneously without applying an external electric field. Considering this in terms of an equivalent circuit, the gain of the feedback loop in the feedback amplifier circuit is 1.
This corresponds to the fact that oscillation occurs when the value is exceeded. Due to such an operating principle, the temperature dependence of the dielectric constant of the semiconductor device according to the present invention is unique, which is not found in conventional semiconductors. The results of computer simulation of the relationship between the temperature dependence of the dielectric constant and the structural constants of the semiconductor device are shown in FIGS. 21 to 28. Figure 21 shows S i /
p-type S] 02 or Ga As / p-type Al
This figure shows the temperature dependence of the dielectric constant when the structural constants shown in the figure are set for As. At sufficiently high temperatures, carriers are randomly distributed with respect to each other due to thermal energy,
Anarchy is formed. Therefore, the dielectric constant is low. As the temperature decreases, the interaction between dipoles becomes stronger, and the dipoles begin to move with a strong positive correlation to each other. Therefore, the dielectric constant increases rapidly. At the transition temperature Tc,
All carriers become strongly correlated, and spontaneous polarization (or spontaneous displacement) occurs. At this time, the dielectric constant ideally becomes infinite. Below the transition temperature TC, the dielectric constant ideally becomes infinite as well. In the low temperature phase below the transition temperature Tc, a state in which carriers are aligned in one direction, that is, an ordered state is formed due to spontaneous polarization. Transition temperature Tc
can be said to be the phase transition temperature of an ordered/disordered state. For practical purposes, the dielectric constant needs to be around 100 or more, preferably around 500 or more, more preferably around 1000 or more. Practically speaking, by defining these necessary dielectric constant values, the transition temperature Tc can be defined. As shown by the curve labeled single quantum well in Figure 21, in a structure consisting of a single quantum well, that is, a quantum well without a barrier film, no phase transition occurs, the dielectric constant value is small, and the temperature There are almost no dependencies. In order to be able to retain and store information as explained in Examples 1 to 3, it is necessary to operate at a temperature below this transition temperature. This transition temperature depends on various structural constants of the semiconductor device according to the invention, as will become clear below. The various structural constants are shown in FIG.
These are the dipole lattice constant a (distance between the centers of the active regions), the width d of the quantum well, the thickness t of the barrier film between the quantum wells, the barrier height bh of the barrier film, the effective mass m in the quantum well, etc. . FIG. 22 shows the dependence of the transition temperature Tc on the dipole lattice constant a,
Figure 23 shows the dependence of the transition temperature Tc on the quantum well width d, the second
Figure 4 shows the dependence of the transition temperature Tc on the quantum well gap wall thickness t;
FIG. 25 shows the dependence of the effective mass m/m of the transition temperature Tc,
FIG. 26 shows the transition temperature T. As the dipole lattice constant a, which shows dependence on the quantum well gap wall height bh, becomes larger, the interaction between the active regions becomes weaker, so that the transition temperature Tc decreases rapidly. As the quantum well width d increases, the zero point energy (ground state energy) of carriers confined within the quantum well decreases, and the probability of passing through the barrier film due to the tunnel effect decreases, so that the displaced state Stability is strengthened. This increases the transition temperature. As the thickness t of the barrier film between the quantum wells is increased, the tunneling probability decreases and the transition temperature similarly increases. Also, as the effective mass m increases, the tunneling probability decreases, so
The transition temperature increases. Also, the barrier height bh between quantum wells
Increasing the transition temperature also decreases the tunneling probability and therefore increases the transition temperature. FIG. 27 shows changes in transition temperature Tc when various dimensions are proportionally reduced (or enlarged). These effects are compounded when the various dimensions are varied in proportion to each other. The analysis shows that the transition temperature increases with a proportional increase in size, and decreases with a proportional decrease in size. The relationship between the dimensions and operating temperature as described above can be approximately expressed as shown in FIG. 28. That is, the parameter 5000・bh−t2・d2・m/(a
The operable temperature range is determined by 'a+a) [eV] [nm). The upper limit of the operable temperature T on the vertical axis in FIG. The parameters on the horizontal axis are determined so that the temperature is higher than the device temperature determined by the device's cooling mechanism, etc. Assuming that the operating temperature T is room temperature operation, for example. T needs to be around 300 (K) or more. Also, depending on the cooling mechanism of the device, 200 (K), 150 (K), 10
0 (K), etc. is selected. Furthermore, in a device configuration that uses liquid nitrogen for cooling, it is determined to ensure an operating temperature of 77 (K) or higher than the liquid nitrogen temperature. According to the guideline shown in FIG. 28, if a certain operating temperature is determined, the corresponding structural constants can be determined. In particular, the parameters shown on the horizontal axis in FIG.
A key requirement may be to set -For example,
Assuming room temperature operation around 300 (K), the quantum well is equipped with S.
When p-type S i O is used as the barrier film, the dipole lattice constant 8 is set to 2'Onm (from FIG. 27).
For other structural constants, the quantum well width d is 8 nm,
The barrier film thickness t may be 3.4 nm. [Effects of the Invention] In an integrated circuit using a conventional transistor, a large amount of power is required to be consumed because stray capacitance inside the transistor and accompanying wiring is charged and discharged each time the transistor operates. Further, as the degree of integration increases, the area required for wiring, the resistance of wiring, etc. increase. Furthermore, due to the complexity of element structures, the manufacturing cost of integrated circuits is rapidly increasing as the device becomes finer. Furthermore, the operating speed is also limited by the saturation speed. In the information representation method of the present invention, the spatial distribution of electric dipoles is associated with information. Therefore, the resistance of the metal wiring increases. Furthermore, due to the complexity of element structures, the manufacturing cost of integrated circuits is rapidly increasing as the device becomes finer. Furthermore, the operating speed is also limited by the saturation speed. In the information representation method of the present invention, the spatial distribution of electric dipoles is associated with information. Therefore, the direction and size can be changed from a long distance without using metal wiring. Moreover, unlike transistors, it is not necessary to flow current to change the direction or size of the electric dipole, so it can operate with extremely low power consumption. Furthermore, since it is possible to remotely control a large number of electric dipoles simultaneously and in parallel, a processor using this is inherently suitable for parallel processing. It goes without saying that parallel processing is extremely important for high-speed information processing. In addition, in conventional clock distribution using metal wiring, it is difficult to synchronize multiple information processing elements due to clock skew caused by wiring resistance, which is an obstacle to high-speed operation. By remotely controlling the dipole, clock distribution is performed at the propagation speed of light, so clock skew is extremely small. Furthermore, since electric dipoles create an extremely anisotropic electric field distribution around them, information can be transmitted between adjacent dipoles without using metal wiring. Since the interaction between electric dipoles propagates at the propagation speed of light, it is extremely fast and is not limited by the saturation speed of electrons as in conventional semiconductor devices. Furthermore, the present invention has an extremely simple structure compared to conventional integrated circuits in which transistors are interconnected. Furthermore, when a double minimum potential structure is used as a quantum confinement structure, conduction carriers can become two types of electric dipoles depending on whether they exist in the first low potential energy region or the second low potential energy region. Since it can be associated, it is compatible with digital signal processing and digital signal storage. Since quantum confinement structures can be made small to nanometer-level dimensions, signal processing chips and memory chips using them can be extremely highly integrated. Further, in the double minimum potential structure, the electronic polarizability becomes extremely large, so that the electric dipole efficiency vector can be changed with a minute electric field. Furthermore, by arranging them in a grid, it is possible to realize a state in which the electric dipole efficiency vectors of nearby active regions are aligned in the same direction. In other words, it has spontaneous polarization. Since this polarization can be maintained without a power source, by recording the polarization while changing its direction and magnitude depending on the location, it is possible to obtain a much higher storage density than a normal semiconductor memory device. Also, in magnetic recording, it is necessary to generate a magnetic field for writing, which requires a large current to flow, but in the present invention, it is only necessary to generate an electric field, so the power consumption and size of the writing device are lower than that of magnetic recording. It will be much smaller. In addition, since the present invention uses a semiconductor, on the same material as this storage medium,
Since conventional semiconductor devices and circuits can be created, it is also easy to create memory read/write circuits, communication circuits, signal processing circuits, etc. using conventional techniques. Furthermore, when quantum confinement structures with such double minimum potential are arranged in a lattice pattern and made into a thin film, a small inverted polarization region with an electric dipole in the opposite direction to the majority of the electric dipoles is formed. Ru. This reversed polarization region has a constant size and exists stably unless erased by applying a large electric field, so it behaves as a type of particle (or pseudoparticle). This inverted polarization region remains stationary under a -like vertical electric field, but has the property of moving when the vertical electric field changes depending on the location. Therefore, if we make the in-plane distribution of this reversed polarization region correspond to information. Information can be recorded. This storage system has extremely high storage density, requires no power consumption for memory retention, and is therefore non-volatile. If this inverted polarization region corresponds to Ilo of a digital signal, it can also be used for digital signal processing. In the present invention, information is transmitted by a slight movement of electrons and propagation of an electric field. Therefore, information is transmitted at a speed close to the propagation speed of light. Therefore, information processing is performed at extremely high speed. Also,
In fact, since the movement of electrons is extremely small, the energy consumption is extremely small. Therefore, the information storage device and information processing device using the present invention have extremely high speed and extremely low power consumption compared to conventional devices, and their industrial value is extremely large.

[Brief explanation of the drawing]

FIG. 1(a) is a diagram showing the structure of the active region of the first embodiment of the present invention, FIG. 1(b) is a diagram showing the potential energy in the active region, and FIG. 1(c) is a diagram showing the lattice structure. Figure shown. Figure 2 shows the electric field distribution (electric lines of force) created by electric dipoles.
FIG. 3 is a diagram showing the domain structure of the first embodiment of the present invention, FIG. 4 is a diagram showing the relationship between polarization and electric field of the first embodiment of the present invention, and FIG. A diagram showing the structure of a transistor used in a memory cell of a storage device according to a second embodiment of the present invention,
FIG. 6 is a diagram showing the potential energy distribution and electron distribution in the gate insulating film of the second embodiment of the present invention, and FIG. 7 is a diagram showing the drain current and gate-source voltage of the second embodiment of the present invention. 8 is a circuit diagram of a storage device according to a second embodiment of the present invention. FIG. 9 is a diagram showing the structure and potential energy of an information processing device according to a third embodiment of the present invention. FIG. 10 is a diagram showing the relationship between the energy and the radius of the reversed polarization region in the third embodiment of the present invention, and FIG. 11 is a diagram showing the relationship between the energy and the radius of the reversed polarization region in the third embodiment of the present invention. Figure 1 when an electric field is applied
2 is a diagram showing the movement of the reversed polarization region by a gradient electric field in the third embodiment of the present invention, FIG. 13 is a diagram showing the transfer method of the reversed polarization region in the third embodiment of the present invention, and FIG. 14 (
14(a) is a diagram showing the configuration of a serial memory using inverted polarization regions according to the third embodiment of the present invention, FIG. 14(b) is a diagram showing the storage section of the serial memory according to the third embodiment of the present invention, FIG. 15 is a diagram showing the manufacturing process in the third embodiment of the present invention, FIG. 16 is a diagram showing a conventional quantum coupling device,
FIG. 17(a) is a diagram showing a storage cell portion of a random access memory according to a fourth embodiment of the present invention, FIG. 17(b) is a diagram showing a cross-sectional structure of a part of the storage cell array, and FIG. FIG. 19 is a diagram illustrating the similarity between a pair of regions and a latch circuit, and FIG. 19 is a diagram illustrating the similarity between a series-connected active region and a latch circuit. FIG. 20 shows the dependence of the carrier position on the electric field when an electric field is applied to the active region of the embodiment of the cylinder 5 of the present invention.
Figure 1 shows the temperature dependence of the dielectric constant of the present invention, Figure 22 shows the lattice constant dependence of the transition temperature, Figure 23 shows the quantum well width dependence of the transition temperature, and Figure 24. 25 is a diagram showing the dependence of the transition temperature on the quantum well gap wall thickness, FIG. 25 is a diagram showing the effective mass dependence of the transition temperature, and FIG. 26 is a diagram showing the dependence of the transition temperature on the quantum well gap wall height. FIG. 27 is a diagram showing changes in transition temperature when all dimensions are proportionally reduced (or enlarged), and FIG. 28 is a diagram showing the operable range of the present invention. Explanation of symbols 1...first quantum well, 2...thin barrier film, 3...first quantum well, 5...donor, 6...active region, 8
p-type silicon substrate, 9...source region consisting of an n+ region, 1o...train region consisting of an n+ region, 1t source terminal, 12...thin barrier film, U3 gate terminal, 1
4... Gate electrode, 15... Barrier region, 16... Quantum well, 17... Drain terminal, 18 Mountain gate insulating film. 19...First active region, 2o...Second active region, 2
DESCRIPTION OF SYMBOLS 1... Word line, 22... Data line, 26... Memory cell, 24... Selection transistor using a normal insulated gate field effect transistor, 25... Field effect having a bistable state 27: Control line, 28: Column direction decode/selection circuit and sense circuit, 29: Row direction decode circuit, 3o: Control electrode, 31: Inverted polarization region, 32...electron, 33...donor impurity, 34...
・Thin barrier film, 35...first quantum well, 36...second quantum well, 37...barrier region, 38...ground region, 3
9...1-shaped control electrode, 4o...■-shaped control electrode,
41...Horizontal electric field applying electrode, 42...Power supply and control circuit, 43...Storage section, 44...Sense circuit and ■
/○ boat, 45...minor loop, 46...transfer gate, 47...major loop, 48...quantum dot. 49...First quantum well, 50...Second quantum well, 5
1...Thin barrier film, 52.53...Active region, 54
...barrier region, 55/donor impurity. 56. Memory cell, 57.. Word line, 58.. Data line. Figure 1 @ a1) Figure 2 Figure 4 Figure 3 Figure 5 Figure 6 Figure 7 Gate-source voltage 1.9 Figure 8 Row direction decoding circuit (29) Figure 11 Figure 12 Position W , 14 Figure 13 Figure 15 Figure 16 Filled with material l 812 Figure 19 [17 Figure 20 Normalized electric field (a') Figure 21 Temperature (K) is Ol 67 nm. Figure 22: Quantum well width: 4n Barrier thickness between quantum wells: 1°7 nm Figure 23: Lattice constant: 10n quantum well barrier thickness: 1°67n quantum well width (n m) Figure 24: Lattice constant: 10n quantum wells Width 4nm Lattice constant 10nm Effective mass m/m. Figure 28 Lattice constant 10 nm Effective mass O9 Figure 27 Lattice constant Single well width Barrier thickness between single wells 1: o, 3
5:0. +7 Lattice constant (nm) Procedural amendment (method) % formula % Display of the case 1990 patent application No. Name of the invention Semiconductor device Amendment person Relationship with the case Patent applicant name Hitachi, Ltd. Agent Address: 5-1 Marunouchi-chome, Chiyoda-ku, Tokyo 100 Hitachi Manufacturing Co., Ltd. November 27, 1990 Brief explanation of drawings in the specification to be amended Contents of the amendment 1. On page 62 of the specification, lines 11 to 15, the statement "FIG. 14(a) is a diagram showing the storage section of a serial memory" has been changed to "FIG. 14 is the third embodiment of the present invention." A diagram illustrating the configuration and storage unit of a serial memory using an inverted polarization region according to the above.

Claims (1)

[Claims] 1. It has a barrier region made of a high-resistance semiconductor, an insulator, or a semi-insulator, and includes a plurality of active regions within the barrier region, and the active region confines conductive carriers therein. A semiconductor characterized in that each of the active regions contains an impurity atom that acts as a donor or an acceptor, and that localization of the conductive carriers within one of the plurality of active regions generates an electric dipole. Device. 2. The direction of the electric dipole generated in the active region by changing the localization of the conduction carrier within one of the active regions due to the interaction of the electric dipoles acting between the plurality of active regions. 2. The semiconductor device according to claim 1, wherein information is transmitted by changing the size or changing the size and propagating the change in the direction or size of adjacent electric dipoles. 3. The semiconductor device according to claim 1, wherein the active region has first and second low potential energy regions therein. 4. The active region has first and second low potential energy regions therein, and the conduction carriers are present in the first low potential energy region or present in the second low potential energy region. 2. The semiconductor device according to claim 1, wherein the electric dipole is formed by a plurality of active regions, and information is held in correspondence with the electric dipoles in a plurality of the active regions. 5. A film including the barrier region and the plurality of active regions, wherein an electric field is applied substantially parallel to the normal direction of the film, and the electric field is applied in substantially the same direction or substantially opposite to the electric field. 2. The semiconductor device according to claim 1, wherein micro regions consisting of directional electric dipoles are distributed inside the film to retain information. 6. Claims characterized in that the micro region consisting of the electric dipole in the substantially same direction or substantially opposite direction to the applied electric field is made to correspond to "1" or "0" of the digital signal. The semiconductor device according to item 5. 7. Applying an electric field substantially parallel to the direction of the plane of the film,
6. The semiconductor device according to claim 5, wherein electric dipoles are transferred between the plurality of active regions by rotating the direction of the electric field. 8. The semiconductor device according to claim 1, wherein a flip-flop is equivalently simulated by arranging the pair of active regions adjacent to each other. 9. An information storage device is constructed by arranging a plurality of the pseudo flip-flops and connecting word lines and data lines to or close to the plurality of pseudo flip-flops. semiconductor devices. 10. An upper limit value of the operating temperature of the semiconductor device is set to a predetermined value, and a dielectric constant between the plurality of electric dipoles is set such that the dielectric constant due to the localization of the electric dipoles at the upper limit value has at least a predetermined value. 2. The semiconductor device according to claim 1, wherein at least a distance is set.