JPH0478146A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0478146A JPH0478146A JP2192522A JP19252290A JPH0478146A JP H0478146 A JPH0478146 A JP H0478146A JP 2192522 A JP2192522 A JP 2192522A JP 19252290 A JP19252290 A JP 19252290A JP H0478146 A JPH0478146 A JP H0478146A
- Authority
- JP
- Japan
- Prior art keywords
- wire
- lead
- capillary
- inner lead
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 40
- 238000007665 sagging Methods 0.000 abstract description 10
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052739 hydrogen Inorganic materials 0.000 abstract description 2
- 239000001257 hydrogen Substances 0.000 abstract description 2
- 238000004519 manufacturing process Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 230000007423 decrease Effects 0.000 description 3
- 238000002788 crimping Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- Engineering & Computer Science (AREA)
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Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置に関し、特に、ダイパッド上に固着
された半導体素子のボンディングパッドと電気的に接続
されるインナーリートの構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to the structure of an inner lead electrically connected to a bonding pad of a semiconductor element fixed on a die pad.
[発明の概要]
本発明は、リードフレームのダイパッド上に半導体素子
が固着され、該半導体素子のボンディングパッドと上記
リードフレームのインナーリードとがワイヤリートで電
気的に接続されてなる半導体装置において、上記インナ
ーリードの先端に段差を設けて構成することにより、イ
ンナーリードに接続されるワイヤリードの垂れを容易に
防止して、半導体装置自体の高信軌性化並びに高歩留り
化を図れるようにすると共に、半導体装置に対する生産
効率の向上をも図れるようにしたものである。[Summary of the Invention] The present invention provides a semiconductor device in which a semiconductor element is fixed on a die pad of a lead frame, and a bonding pad of the semiconductor element and an inner lead of the lead frame are electrically connected by a wire lead. By providing a step at the tip of the inner lead, it is possible to easily prevent the wire lead connected to the inner lead from sagging, thereby increasing the reliability and yield of the semiconductor device itself. , it is also possible to improve the production efficiency of semiconductor devices.
〔従来の技術]
一般に、リードフレームのダイパッド上に固着された半
導体素子のポンディングパッドとリードフレームのイン
ナーリードとを電気的に接続、即ちボンディング処理す
る方法として、これら両者をAu線あるいはM線などの
ワイヤリードで接続する所謂ワイヤボンディング方法が
知られている。[Prior Art] Generally, as a method for electrically connecting, that is, bonding, bonding pads of a semiconductor element fixed on a die pad of a lead frame and inner leads of a lead frame, both of them are connected using Au wire or M wire. A so-called wire bonding method is known in which connections are made using wire leads such as.
また、最近では、ワイヤボンディングで用いられるキャ
ピラリを超音波で振動させることにより、ワイヤリード
とポンディングパッド並びにワイヤリードとインナーリ
ードとの接続強度を増大化させ、更にボンディング時間
の短縮化を図るようにしている。In addition, recently, by vibrating the capillary used in wire bonding with ultrasonic waves, efforts have been made to increase the connection strength between the wire lead and the bonding pad, as well as between the wire lead and the inner lead, and to further shorten the bonding time. I have to.
しかしながら、従来の半導体装置においては、第3図A
に示すように、リードフレームのダイパッド(31)上
に固着された半導体素子(32)のボンディングパッド
(33)と電気的に接続されるインナーリード(34)
の構造、特に、キャピラリ(35)から導出されたワイ
ヤリード(36)が圧着される部分の構造が面一となっ
ているため、このインナーリード(34)にワイヤリー
ド(36)を圧着する際、ワイヤリード(36)自体に
弾性があることから、ワイヤリード(36)が描く円弧
の下端をインナーリード(34)で支える必要がある。However, in the conventional semiconductor device, as shown in FIG.
As shown in the figure, an inner lead (34) is electrically connected to a bonding pad (33) of a semiconductor element (32) fixed on a die pad (31) of a lead frame.
The structure, especially the structure of the part where the wire lead (36) led out from the capillary (35) is crimped, is flush, so when crimping the wire lead (36) to this inner lead (34), Since the wire lead (36) itself has elasticity, it is necessary to support the lower end of the arc drawn by the wire lead (36) with the inner lead (34).
従って、第3図Aで示す寸法aは、約0.3ma+以上
必要となる。尚、第3図Bは、ワイヤリード(36)を
インナーリード(34)に熱圧着した状態を示す。Therefore, the dimension a shown in FIG. 3A is required to be approximately 0.3 ma+ or more. Incidentally, FIG. 3B shows a state in which the wire lead (36) is thermocompression bonded to the inner lead (34).
ここで、第3図Aで示す寸法aを0.3mn+以下にし
た場合、第4図A及びBに示すように、ワイヤリート(
36)↓こ垂れが生し、不良の原因となる。即ち、ワイ
ヤリー)’(36)の垂れた部分かダイパント(31)
や隣接する他のインナーリード(34)に接触して半導
体装置自体の不良化を招くおそれがある。Here, if the dimension a shown in FIG. 3A is set to 0.3 mm+ or less, as shown in FIGS. 4A and B, the wire lead (
36) ↓It causes dripping and causes defects. That is, the hanging part of the wire wire (36) or the dipant (31)
There is a risk that the semiconductor device itself may become defective due to contact with other adjacent inner leads (34).
この現象は、ワイヤ長の長いワイヤリートの場合、ワイ
ヤリードの自重の増加に伴ない発生し易くなる。またワ
イヤ長の短いワイヤリードにおいても、ワイヤリードの
描く円弧の曲率半径が短くなり、ワイヤリードの弾性も
増すことから、ワイヤ長の長い場合と同様に上記現象が
発生し易くなる。従って、第3図Aで示すように、寸法
aを長くとることにより、上記現象の発生をある程度防
止することができる。しかし、この場合、ワイヤリード
(36)の消電量が増大化することと、半導体装置の小
型化に対応することができない等の不都合が生じる。In the case of a wire lead having a long wire length, this phenomenon becomes more likely to occur as the weight of the wire lead increases. Further, even in a wire lead with a short wire length, the radius of curvature of the arc drawn by the wire lead becomes short and the elasticity of the wire lead increases, so the above phenomenon is likely to occur as in the case of a long wire. Therefore, as shown in FIG. 3A, by increasing the dimension a, the occurrence of the above phenomenon can be prevented to some extent. However, in this case, there are disadvantages such as an increase in the amount of power dissipated in the wire lead (36) and an inability to respond to miniaturization of semiconductor devices.
そこで、従来では、上記ワイヤリード(36)の垂れを
防止する方法として、例えば
■ ワイヤ長を例えば最大値2.5m+w、最小値1.
2wmに制限する。Therefore, in the past, as a method for preventing the wire lead (36) from sagging, the wire length was set to a maximum value of 2.5 m+w and a minimum value of 1.5 m, for example.
Limit to 2wm.
■ ワイヤボンディング装置のループコントロールを変
則的に制御して、停ヤビラリ(35)の移動方向並びに
ワイヤリード(36)の張力を制御する。(2) The loop control of the wire bonding device is controlled irregularly to control the moving direction of the stopper cable (35) and the tension of the wire lead (36).
■ リードフレームを加熱処理するヒータブロンク自体
に、ワイヤリード(36)の垂れを防止するための突出
部(土手)を形成する。(2) A protrusion (bank) to prevent the wire lead (36) from sagging is formed on the heater bronck itself that heats the lead frame.
■ インナーリード(34)に対するワイヤリード(3
6)の移動入射角を制限する。■ Wire lead (3) to inner lead (34)
6) Limit the moving incident angle.
という方法が考えられている。A method is being considered.
しかし、上記■及び■の欠点として、半導体素子(32
)に対するリードフレームの共用化(標準化)が困難に
なり、生産性の低下、製造コストの高価格化を招くとい
う不都合がある。特に、多数のビンを有するリードフレ
ームでは、ワイヤ長の長いワイヤリードが必要になるが
、上記の如くワイヤ長や入射角の制限を受けると、長い
ワイヤリードを用いることができず、そのため、リード
フレーム自体を加工する必要がでてくる。ところが、短
いワイヤリードに適応した上記リードフレームの加工は
製造上、困難性が伴なう。However, as a drawback of the above ■ and ■, the semiconductor element (32
), it becomes difficult to share (standardize) the lead frame, leading to a decrease in productivity and an increase in manufacturing costs. In particular, lead frames with a large number of bins require long wire leads, but if the wire length and angle of incidence are limited as described above, long wire leads cannot be used. The frame itself will need to be modified. However, processing the above-mentioned lead frame adapted to short wire leads is difficult in manufacturing.
また、上記■の欠点として、ボンディング処理のスピー
ドが低下し、生産性が低下する。旧式のワイヤボンディ
ング装置では対応できない。調整が微妙なため、安定性
、再現性に欠けるなどがあげられる。Moreover, as a drawback of the above-mentioned (2), the speed of the bonding process decreases and productivity decreases. Older wire bonding equipment cannot handle this. Because the adjustments are delicate, stability and reproducibility are lacking.
また、上記■の欠点として、ヒータブロンク自体の加工
が困難、かつ高価である。リードフレームのデザイン(
形状)に制約がでる。各種リードフレーム毎に、その形
状に合ったヒータブロックが各種必要となるなどがあげ
られる。Further, as a drawback of the above (2), processing of the heater bronc itself is difficult and expensive. Lead frame design (
shape). For example, each type of lead frame requires a variety of heater blocks that match its shape.
このように、従来においては、ワイヤリード(36)の
垂れに対する防止策として有効なものがないのが現状で
ある。As described above, there is currently no effective measure to prevent the wire lead (36) from sagging.
本発明は、このような点に鑑みて成されたもので、その
目的とするところは、インナーリードに圧着されるワイ
ヤリードの垂れを容易に防止でき、装置自体の高信頬性
化並びに高歩留り化を図ることができると共に、生産効
率の向上をも図ることができる半導体装置を提供するこ
とにある。The present invention has been made in view of these points, and its purpose is to easily prevent the wire lead crimped to the inner lead from sagging, and to improve the reliability and reliability of the device itself. It is an object of the present invention to provide a semiconductor device that can improve yield as well as improve production efficiency.
〔課題を解決するための手段]
本発明は、リードフレーム(1)のダイパッド(2)上
に半導体素子(3)が固着され、該半導体素子(3)の
ボンディングパッド(4)とリードフレーム(1)のイ
ンナーリート(5)とがワイヤリード(6)で電気的に
接続されでなる半導体装置(A)において、上記インナ
ーリード(5)の先端に段差(12)を設けて構成する
。[Means for Solving the Problems] In the present invention, a semiconductor element (3) is fixed on a die pad (2) of a lead frame (1), and the bonding pad (4) of the semiconductor element (3) and the lead frame ( In the semiconductor device (A) in which the inner lead (5) of 1) is electrically connected to the wire lead (6), a step (12) is provided at the tip of the inner lead (5).
上述の本発明の構成によれば、インナーリード(5)の
先端に段差(12)を設けるようにしたので、この段差
(12)がワイヤボンディング時のワイヤリード(6)
に対する支えとなり、その結果、ワイヤリード(6)の
下方への垂れが容易に、かつ確実に防止される。従って
、半導体装置(A)自体の高信顧性化並びに高歩留り化
を図ることができるようになると共に、半導体装置(A
)における生産効率の向上をも同時に図ることができる
。According to the configuration of the present invention described above, since the step (12) is provided at the tip of the inner lead (5), this step (12) becomes the wire lead (6) during wire bonding.
As a result, the wire lead (6) is easily and reliably prevented from sagging downward. Therefore, it is possible to achieve high reliability and high yield of the semiconductor device (A) itself, and it is also possible to improve the reliability and yield of the semiconductor device (A) itself.
) can also improve production efficiency at the same time.
以下、第1図及び第2図を参照しながら本発明の詳細な
説明する。Hereinafter, the present invention will be explained in detail with reference to FIGS. 1 and 2.
第1図:よ、本実施例に係る半導体装置(A)、特にワ
イヤボンディング状態の構成を示す要部の斜視図である
。FIG. 1 is a perspective view of the main parts of the semiconductor device (A) according to the present embodiment, particularly showing the configuration in a wire bonding state.
この半導体装置(A)は、リードフレーム(+)のダイ
パッド(2)上に半導体素子(チップ)(3)が固着さ
れ、該半導体素子(3)上の周辺に形成されたポンディ
ングパッド(4)とリードフレーム(1)のインナーリ
ード(5)とがAu線あるいはM線等からなるワイヤリ
ード(6)で電気的に接続、即ちワイヤボンディングさ
れてなる。尚、図において、(7)はダイパッド吊りリ
ード、(8)はアウターリード、(9)はタイバー(モ
ールド樹脂流れ止め) 、(10)は外枠、(11)は
位置決め孔である。This semiconductor device (A) has a semiconductor element (chip) (3) fixed on a die pad (2) of a lead frame (+), and a bonding pad (4) formed around the semiconductor element (3). ) and the inner lead (5) of the lead frame (1) are electrically connected, that is, wire bonded, with a wire lead (6) made of Au wire, M wire, or the like. In the figure, (7) is a die pad suspension lead, (8) is an outer lead, (9) is a tie bar (to prevent mold resin from flowing), (10) is an outer frame, and (11) is a positioning hole.
しかして、本例においては、インナーリード(5)の先
端、即ち半導体素子(3)を臨む側の先端部分に上方に
突出する段差(I2)を形成してなる。この段差(12
)は、ワイヤリード(6)のあらゆる方向の入射に対応
できるように、好ましくは、第1図の拡大図に示すよう
に、その輻dをインナーリード(5)の幅とほぼ同等に
設定する。また、その奥行きrは、インナーリード(5
)の先端からワイヤリート(6)の圧着点までの距Mn
よりも小に設定する。そして、上記段差(12)は、既
知のコイニング(圧印)処理にて容易に作製することが
でき、製造コストの増加を引き起こすことはない
次に、上記ワイヤボンディングの一例を第2図の工程図
に基いて説明する。Therefore, in this example, an upwardly projecting step (I2) is formed at the tip of the inner lead (5), that is, the tip on the side facing the semiconductor element (3). This step (12
) is preferably set to have its radius d approximately equal to the width of the inner lead (5), as shown in the enlarged view of FIG. 1, so that it can accommodate the incidence of the wire lead (6) in any direction. . In addition, the depth r is the inner lead (5
) from the tip of wire lead (6) to the crimping point Mn
Set smaller than . The step (12) can be easily produced by a known coining process and does not cause an increase in manufacturing costs. Next, an example of the wire bonding is shown in the process diagram of FIG. I will explain based on.
まず、第2図Aに示すように、キャピラリ(2I)に例
えばAu線(6)を通し、水素トーチ等を用いてAu線
(6)の先端にAuボール(22)を作る。First, as shown in FIG. 2A, for example, an Au wire (6) is passed through a capillary (2I), and an Au ball (22) is formed at the tip of the Au wire (6) using a hydrogen torch or the like.
その後、第2図Bに示すように、第1図で示すグイハツ
ト(2)上の半導体素子(3)のボンディングパッド(
4)に上記Auボール(22)を熱圧着したのち、キャ
ピラリ(21)をインナーリード(5)上に移動させる
。Thereafter, as shown in FIG. 2B, the bonding pad (
4) After thermocompression bonding the Au ball (22), the capillary (21) is moved onto the inner lead (5).
このとき、Au線(6)が半導体素子(3)からインナ
ーリード(5)側に張られた状態となる。尚、この第2
図では、第1図で示すダイパッド(2)及び半導体素子
(3)等を省略して示す。At this time, the Au wire (6) is stretched from the semiconductor element (3) to the inner lead (5) side. Furthermore, this second
In the figure, the die pad (2), semiconductor element (3), etc. shown in FIG. 1 are omitted.
次に、第2図Cに示すようムこ、キャピラリ(21)を
下げると共に、キャピラリ(21)に熱と加重を加え、
更には超音波による振動を加えてA u ’IA (6
)をインナーリード(5)に圧着する。その後、Au線
(6)をクランプしたのち、キャピラリ(21)を斜め
上方に移動して^U線(6)を引きちぎる。このとき、
インナーリード(5)の先端に設けた段差(12)力(
Au線(6)の支えとなるため、Au線(6)の下方へ
の垂れを事前に防止することができる。Next, as shown in Figure 2C, lower the capillary (21) and apply heat and weight to the capillary (21).
Furthermore, by adding ultrasonic vibration, A u 'IA (6
) to the inner lead (5). After that, after clamping the Au wire (6), the capillary (21) is moved obliquely upward and the U wire (6) is torn off. At this time,
Step (12) provided at the tip of the inner lead (5)
Since it supports the Au wire (6), it is possible to prevent the Au wire (6) from hanging downward.
次に、第2図りに示すように、引きちぎったAu、l
(6)の残りを再び水平トーチ等を用いて加熱し、Au
線(6)の先端にAuボール(22)を作る。Next, as shown in the second diagram, the torn Au, l
The remainder of (6) is heated again using a horizontal torch, etc., and the Au
An Au ball (22) is made at the tip of the wire (6).
上記一連の動作を順次繰返すことにより、第1図に示す
如く、Au線、即ちワイヤリード(6)を1本ずつ張っ
て本例に係る半導体装置(A)を得る。By sequentially repeating the above series of operations, as shown in FIG. 1, Au wires, ie, wire leads (6) are stretched one by one to obtain a semiconductor device (A) according to this example.
上述の如く、本例によれば、インナーリード(5)の先
端に段差(12)を設けるようにしたので、この段差(
12)がワイヤボンディング時のワイヤリード(6)に
対する支えとなり、ワイヤリード(6)の下方への垂れ
を容易に、かつ確実に防止することができる。その結果
、半導体装置(A)における品質並びに歩留りが改善さ
れるとともに、各種ワイヤリード、即ち2.5mm以上
の長いワイヤリードや1 、211111以下の短いワ
イヤリードにも対応できることから、リードフレーム(
1)の共用化(標準化)が図れ、また、ワイヤリード(
6)の入射角の制限を緩和できることも相俟って半導体
装置(A)の生産性の向上並びに製造コストの低廉化を
図ることができる。As mentioned above, according to this example, since the step (12) is provided at the tip of the inner lead (5), this step (12) is
12) serves as a support for the wire lead (6) during wire bonding, and can easily and reliably prevent the wire lead (6) from sagging downward. As a result, the quality and yield of the semiconductor device (A) are improved, and the lead frame (
1) can be shared (standardized), and wire leads (
Coupled with the fact that the restriction on the incident angle in 6) can be relaxed, the productivity of the semiconductor device (A) can be improved and the manufacturing cost can be reduced.
ワイヤボンディング状態を示す説明図、第4図は他の従
来例↓こ係る半導体装置のワイヤボンティジグ状態を示
す説明図である。FIG. 4 is an explanatory diagram showing a state of wire bonding, and FIG. 4 is an explanatory diagram showing a state of a wire bonding jig of another conventional example.
(A)は半導体装置、(+1はり−トフレーム、(2)
はダイパッド、(3)は半導体素子、(4)はボンディ
ングパソト、(5)はインナーリード、(6)はワイヤ
リド、(12)は段差である。(A) is a semiconductor device, (+1 beam frame, (2)
is a die pad, (3) is a semiconductor element, (4) is a bonding pad, (5) is an inner lead, (6) is a wire lead, and (12) is a step.
[発明の効果]
本発明に係る半導体装置によれば、インナーリードに接
続されるワイヤリードの垂れを容易に防止でき、半導体
装置自体の高信顧性化並びに高歩留り化が図れると共に
、半導体装置に対する生産性の向上をも図ることができ
る。[Effects of the Invention] According to the semiconductor device of the present invention, it is possible to easily prevent the wire leads connected to the inner leads from sagging, and the reliability and yield of the semiconductor device itself can be increased. It is also possible to improve productivity.
Claims (1)
れ、該半導体素子のボンディングパッドと上記リードフ
レームのインナーリードとがワイヤリードで電気的に接
続されてなる半導体装置において、 上記インナーリードの先端に段差を設けてなる半導体装
置。[Scope of Claims] A semiconductor device in which a semiconductor element is fixed on a die pad of a lead frame, and a bonding pad of the semiconductor element and an inner lead of the lead frame are electrically connected by a wire lead, wherein the inner lead A semiconductor device with a step at the tip.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2192522A JPH0478146A (en) | 1990-07-20 | 1990-07-20 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2192522A JPH0478146A (en) | 1990-07-20 | 1990-07-20 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0478146A true JPH0478146A (en) | 1992-03-12 |
Family
ID=16292687
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2192522A Pending JPH0478146A (en) | 1990-07-20 | 1990-07-20 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0478146A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5452841A (en) * | 1993-07-23 | 1995-09-26 | Nippondenso Co., Ltd. | Wire bonding apparatus and method |
JP2007295012A (en) * | 2007-08-10 | 2007-11-08 | Rohm Co Ltd | Method of manufacturing resin package type semiconductor device |
-
1990
- 1990-07-20 JP JP2192522A patent/JPH0478146A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5452841A (en) * | 1993-07-23 | 1995-09-26 | Nippondenso Co., Ltd. | Wire bonding apparatus and method |
JP2007295012A (en) * | 2007-08-10 | 2007-11-08 | Rohm Co Ltd | Method of manufacturing resin package type semiconductor device |
JP4666395B2 (en) * | 2007-08-10 | 2011-04-06 | ローム株式会社 | Manufacturing method of resin package type semiconductor device |
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