JPH04279030A - Surface temperature measuring method of polished semiconductor wafer - Google Patents
Surface temperature measuring method of polished semiconductor waferInfo
- Publication number
- JPH04279030A JPH04279030A JP41748090A JP41748090A JPH04279030A JP H04279030 A JPH04279030 A JP H04279030A JP 41748090 A JP41748090 A JP 41748090A JP 41748090 A JP41748090 A JP 41748090A JP H04279030 A JPH04279030 A JP H04279030A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- temperature
- polishing
- polished
- measured
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 19
- 238000000034 method Methods 0.000 title claims description 27
- 238000005498 polishing Methods 0.000 claims abstract description 80
- 239000001301 oxygen Substances 0.000 claims abstract description 23
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 23
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 22
- 238000010438 heat treatment Methods 0.000 claims description 19
- 238000005299 abrasion Methods 0.000 abstract 3
- 238000011088 calibration curve Methods 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 107
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 28
- 229910052710 silicon Inorganic materials 0.000 description 27
- 239000010703 silicon Substances 0.000 description 27
- 238000005259 measurement Methods 0.000 description 12
- 239000013078 crystal Substances 0.000 description 11
- 239000000523 sample Substances 0.000 description 9
- 230000002093 peripheral effect Effects 0.000 description 7
- 239000000126 substance Substances 0.000 description 6
- 238000009529 body temperature measurement Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000008030 elimination Effects 0.000 description 2
- 238000003379 elimination reaction Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000003892 spreading Methods 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 239000002178 crystalline material Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 150000002926 oxygen Chemical class 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000010791 quenching Methods 0.000 description 1
- 230000000171 quenching effect Effects 0.000 description 1
Landscapes
- Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Measuring Temperature Or Quantity Of Heat (AREA)
Abstract
Description
【0001】0001
【産業上の利用分野】本発明は、半導体ウェーハ研磨面
温度の測定方法、特に、VLSI用シリコンウェーハを
高精度に鏡面研磨するときの研磨最適条件を得る等のた
めに、ウェーハ研磨面温度を高精度に測定することがで
きる半導体ウェーハ研磨面温度の測定方法に関する。[Industrial Application Field] The present invention relates to a method for measuring the temperature of a polished surface of a semiconductor wafer, and in particular, a method for measuring the temperature of a polished surface of a semiconductor wafer. The present invention relates to a method for measuring the temperature of a polished surface of a semiconductor wafer that can be measured with high accuracy.
【0002】0002
【従来の技術】VLSI等の半導体素子は、シリコン等
の半導体単結晶から切り出した半導体ウェーハに対して
所定のプロセス処理を施して形成される。その場合、半
導体ウェーハの素子形成面(表面)に対し、事前に鏡面
研磨処理を行っている。2. Description of the Related Art Semiconductor devices such as VLSIs are formed by subjecting a semiconductor wafer cut from a semiconductor single crystal such as silicon to predetermined processes. In this case, the element forming surface (front surface) of the semiconductor wafer is subjected to mirror polishing treatment in advance.
【0003】上記表面研磨処理の具体的方法としては、
例えば図9の半断面図で示すように、研磨プレート14
の下面に研磨面を下向きにしてウェーハWをワックスを
用いて接着し、該研磨プレート14を定盤10に載設さ
れた研磨パッド12上に圧力をもって接触させ、次いで
、研磨液供給管16から研磨液を供給しながら、上記研
磨プレート14と定盤10とを、それぞれウェーハ面に
沿った方向に回転させることにより、上記ウェーハWの
下面(表面)を研磨し、鏡面を形成する方法が知られて
いる。[0003] A specific method for the above surface polishing treatment is as follows:
For example, as shown in the half-sectional view of FIG.
A wafer W is bonded to the lower surface with the polishing surface facing downward using wax, and the polishing plate 14 is brought into contact with the polishing pad 12 mounted on the surface plate 10 with pressure. A method is known in which the lower surface (front surface) of the wafer W is polished to form a mirror surface by rotating the polishing plate 14 and the surface plate 10 in a direction along the wafer surface while supplying a polishing liquid. It is being
【0004】上記のような方法で、例えばシリコンウェ
ーハの表面を研磨する場合は、いわゆるメカノケミカル
ポリッシングが行われており、このメカノケミカルポリ
ッシングによる研磨速度Vmcp は、下記の(1)式
で表わされる(「エレクトロニクス用結晶材料の精密加
工技術」1985年サイエンスフォーラム社発行,P.
319)。When polishing the surface of, for example, a silicon wafer by the method described above, so-called mechanochemical polishing is performed, and the polishing rate Vmcp by this mechanochemical polishing is expressed by the following equation (1). (“Precision processing technology for crystalline materials for electronics”, published by Science Forum, 1985, p.
319).
【0005】
Vmcp =Vm +Vc
………(1)ここで、Vm :機械的作用による研磨
速度、Vc :化学的作用による研磨速度。[0005]Vmcp=Vm+Vc
......(1) Here, Vm: Polishing rate due to mechanical action, Vc: Polishing rate due to chemical action.
【0006】特に、VLSIの製造に使用する高品質の
シリコンウェーハでは、非常に結晶の歪みが少ない研磨
面を必要とするため、化学作用による研磨が主体となる
条件、即ちVc >>Vm の条件で鏡面研磨が行われ
る。In particular, high-quality silicon wafers used in VLSI manufacturing require a polished surface with very little crystal distortion, so polishing is mainly performed by chemical action, that is, the condition of Vc >> Vm. Mirror polishing is performed.
【0007】ところで、上記化学作用による研磨速度V
c は、主として温度、結晶格子の歪み、及び新鮮面の
生成に伴う表面エネルギーの変化等の影響を受けること
が知られている。いま、化学反応の活性化エネルギーを
E0 、熱的エネルギーをE1 ′、加工歪みエネルギ
ーをE2 ′とすると、化学的作用による研磨速度Vc
は下記の(2)式で表わすことができる(唐木俊郎他
、精密機械、46,1980,P.331)。By the way, the polishing rate V due to the above chemical action
It is known that c is mainly affected by temperature, distortion of the crystal lattice, and changes in surface energy due to the generation of fresh surfaces. Now, if the activation energy of the chemical reaction is E0, the thermal energy is E1', and the processing strain energy is E2', then the polishing rate due to chemical action is Vc.
can be expressed by the following equation (2) (Toshiro Karaki et al., Precision Machinery, 46, 1980, p. 331).
【0008】
Vc =V0 exp {−(E0 −E′)/R
T} ………(2)ここで
、E′=E1 ′+E2 ′
V0 :比例定数、
R :ガス定数、
T :温度。Vc =V0 exp {-(E0 -E')/R
T} ......(2) Here, E'=E1'+E2' V0: proportionality constant, R: gas constant, T: temperature.
【0009】上記(2)式によれば、化学的作用による
研磨速度Vc は温度の影響を大きく受けることが分か
る。According to the above equation (2), it can be seen that the polishing rate Vc due to chemical action is greatly influenced by temperature.
【0010】従って、VLSI用の高品質シリコンウェ
ーハを研磨し、平坦性の高い鏡面を形成するためには、
前記研磨速度Vmcp を高精度に制御することが極め
て重要であり、そのためにはウェーハの研磨面の温度を
高精度に測定することが必要となる。[0010] Therefore, in order to polish a high quality silicon wafer for VLSI and form a mirror surface with high flatness,
It is extremely important to control the polishing rate Vmcp with high precision, and for this purpose it is necessary to measure the temperature of the polishing surface of the wafer with high precision.
【0011】従来、ウェーハの研磨面の温度を測定する
方法としては、前記図9において、研磨プレート14の
ウェーハ接触面に、例えば幅5mm、長さ150mm程
度の溝18を形成して、サーミスタ等の温度センサ20
をウェーハWの研磨面とは反対側(裏面)に接触させる
ことを可能とし、該温度センサ20で温度を測定する方
法が知られている(中村孝雄等,精密工学会誌,56,
1990,P.1046)。Conventionally, as shown in FIG. 9, a groove 18 having a width of about 5 mm and a length of about 150 mm is formed in the wafer contact surface of the polishing plate 14, and a thermistor or the like is used to measure the temperature of the polished surface of a wafer. temperature sensor 20
There is a known method in which the temperature sensor 20 is brought into contact with the side (back side) opposite to the polished surface of the wafer W, and the temperature is measured with the temperature sensor 20 (Takao Nakamura et al., Journal of Precision Engineering, 56,
1990, P. 1046).
【0012】0012
【発明が解決しようとする課題】しかしながら、上記溝
18を設けた研磨プレート14を用いて、実際に5枚の
ウェーハを研磨したところ、下記第1表にその結果を示
したように、ウェーハの平坦度を表わす指標であるTT
V(TotalThickness Variatio
n )が、溝を設けない場合に比べて6.6μm も悪
かった。[Problems to be Solved by the Invention] However, when five wafers were actually polished using the polishing plate 14 provided with the grooves 18, as shown in Table 1 below, the wafers were TT is an index expressing flatness
V (Total Thickness Variation
n) was 6.6 μm worse than the case without grooves.
【0013】[0013]
【表1】[Table 1]
【0014】又、上記のようにウェーハWの裏面から表
面温度を測定する場合の測定精度を調べるために、図1
0のように前記図9の定盤10の位置にホットプレート
22を配置し、該ホットプレート22の温度を変えてウ
ェーハWの研磨面を加熱すると共に、その裏面に接触さ
せた温度センサ20で実測したところ、下記第2表の結
果が得られた。Furthermore, in order to examine the measurement accuracy when measuring the surface temperature from the back surface of the wafer W as described above, FIG.
As shown in FIG. 9, a hot plate 22 is placed at the position of the surface plate 10 in FIG. 9, and the temperature of the hot plate 22 is changed to heat the polished surface of the wafer W. As a result of actual measurements, the results shown in Table 2 below were obtained.
【0015】[0015]
【表2】[Table 2]
【0016】上記第2表より、ホットプレート温度、即
ちウェーハWの研磨面の温度と、上記温度センサ20に
よる測定温度との間には大きな誤差があり、その誤差は
高温になる程大きくなり、ホットプレート温度が100
℃のときで誤差が66.2%もあることが判る。From Table 2 above, there is a large error between the hot plate temperature, that is, the temperature of the polished surface of the wafer W, and the temperature measured by the temperature sensor 20, and the error increases as the temperature increases. Hot plate temperature is 100
It can be seen that the error is 66.2% when the temperature is ℃.
【0017】上述の如く、研磨プレート14のウェーハ
接触面に溝18を形成し、且つ該溝18位置におけるウ
ェーハWの裏面に温度センサ20を接触させて、該ウェ
ーハWを研磨する方法の場合には、研磨プレート14の
構造に起因して研磨面の平坦度が損なわれる上に、研磨
面の温度を精度良く測定できないため、該研磨面の温度
による研磨速度の制御を正確に行うことができないとい
う問題があった。As described above, in the case of the method of polishing the wafer W by forming the groove 18 on the wafer contact surface of the polishing plate 14 and bringing the temperature sensor 20 into contact with the back surface of the wafer W at the position of the groove 18, In this case, the flatness of the polishing surface is impaired due to the structure of the polishing plate 14, and the temperature of the polishing surface cannot be accurately measured, so the polishing speed cannot be accurately controlled by the temperature of the polishing surface. There was a problem.
【0018】本発明は、前記従来の問題点を解決するべ
くなされたもので、ウェーハの研磨面の温度を該研磨面
を介して高精度に測定することができる半導体ウェーハ
研磨面温度の測定方法を提供することを課題とする。The present invention has been made to solve the above-mentioned conventional problems, and provides a method for measuring the temperature of a polished surface of a semiconductor wafer, in which the temperature of the polished surface of a wafer can be measured with high precision through the polished surface. The challenge is to provide the following.
【0019】[0019]
【課題を解決するための手段】本発明は、半導体ウェー
ハを鏡面研磨する際の研磨面の温度を測定するに当り、
半導体ウェーハに酸素サーマルドナー消去熱処理を施し
た後に、該半導体ウェーハの研磨を行い、研磨後に上記
半導体ウェーハの研磨面の比抵抗を測定し、その比抵抗
値に基づいて研磨面の温度を求めることにより、前記課
題を達成したものである。[Means for Solving the Problems] The present invention provides the following methods for measuring the temperature of a polished surface during mirror polishing of a semiconductor wafer.
After subjecting the semiconductor wafer to oxygen thermal donor elimination heat treatment, polishing the semiconductor wafer, measuring the resistivity of the polished surface of the semiconductor wafer after polishing, and determining the temperature of the polished surface based on the resistivity value. Thus, the above-mentioned problem has been achieved.
【0020】[0020]
【作用】前述の如く、ウェーハに平坦度の高い研磨面を
形成するためには、研磨プレートのウェーハ接触面に溝
や穴等の凹部を形成せず、しかもウェーハ研磨面の温度
を高精度に測定することが極めて重要である。以下、こ
れを可能とする技術について詳細に説明する。なお、本
発明は、以下に示す具体例に限定されない。[Operation] As mentioned above, in order to form a highly flat polished surface on a wafer, it is necessary to avoid forming grooves, holes, or other concave parts on the wafer contact surface of the polishing plate, and to control the temperature of the wafer polished surface with high precision. It is extremely important to measure. The technology that makes this possible will be described in detail below. Note that the present invention is not limited to the specific examples shown below.
【0021】本発明者は、チョクラルスキー成長シリコ
ン単結晶に本来含まれる酸素に着目し、種々検討した結
果、以下の知見を得た。The present inventor focused on the oxygen originally contained in Czochralski-grown silicon single crystals, and as a result of various studies, the following findings were obtained.
【0022】上記チョクラルスキー成長シリコン単結晶
から切り出したシリコンウェーハには、通常27〜33
ppma(ASTM F121−79)程度の濃度の
酸素が不純物として本来的に含まれている。この酸素不
純物は、最初シリコン原子の格子間に位置し電気的に不
活性であるが、450℃付近で熱処理するとドナー化さ
れ、電気的に活性になることが知られている(J.Ap
pl ,Phys ,62 1987,P.1287
)。[0022] A silicon wafer cut from the Czochralski grown silicon single crystal usually has a crystal grain size of 27 to 33
Oxygen is inherently contained as an impurity at a concentration of ppma (ASTM F121-79). This oxygen impurity is initially located between the lattices of silicon atoms and is electrically inactive, but it is known that when heat-treated at around 450°C, it becomes a donor and becomes electrically active (J.Ap.
pl, Phys, 62 1987, P. 1287
).
【0023】図11は、酸素サーマルドナーを生成させ
るための熱処理温度と測定したドナー生成量との関係を
示したグラフであり、図12は、同熱処理時間と測定し
たドナー生成量との関係を示したグラフである。この図
11、図12から、酸素サーマルドナー濃度はウェーハ
温度に敏感であり、しかも熱処理時間に大きく依存して
いることが分る。又、生成する酸素サーマルドナーはウ
ェーハの比抵抗を減少させるが、該ウェーハは、熱処理
の温度及び時間と初期酸素濃度とによって決まる固有の
比抵抗を有していることが分る。FIG. 11 is a graph showing the relationship between the heat treatment temperature for generating an oxygen thermal donor and the measured donor generation amount, and FIG. 12 is a graph showing the relationship between the heat treatment time and the measured donor generation amount. This is the graph shown. From FIGS. 11 and 12, it can be seen that the oxygen thermal donor concentration is sensitive to the wafer temperature and also largely depends on the heat treatment time. It can also be seen that the generated oxygen thermal donor reduces the resistivity of the wafer, but the wafer has an inherent resistivity determined by the temperature and time of the heat treatment and the initial oxygen concentration.
【0024】ところで、チョクラルスキー成長シリコン
単結晶から切り出したシリコンウェーハでは、無処理の
状態でもその中に含まれている酸素は、結晶成長時の熱
履歴に応じて、既にその一部が酸素サーマルドナーに変
換されており、その変換割合が結晶の位置によって異な
るため、このままの状態では後述する方法により比抵抗
測定値に基づいてウェーハの温度を求めるには不都合で
ある。By the way, in a silicon wafer cut from a Czochralski-grown silicon single crystal, even in an untreated state, some of the oxygen contained therein has already been converted into oxygen, depending on the thermal history during crystal growth. It is converted into a thermal donor, and the rate of conversion differs depending on the position of the crystal. Therefore, in this state, it is inconvenient to determine the temperature of the wafer based on the resistivity measurement value using the method described later.
【0025】そこで、本発明では、例えば阿部孝雄他に
よる「シリコン結晶とドーピング」1986,丸善発行
,P.24に記載されている、酸素サーマルドナー消去
熱処理をウェーハに予め施し、酸素を電気的に不活性に
した後に該ウェーハの比抵抗を測定する。又、上記ウェ
ーハとしては、通常結晶成長時に入れるドーパントが入
っていない、比抵抗の高いノンドープウェーハを使用す
る。Therefore, in the present invention, for example, "Silicon Crystals and Doping" by Takao Abe et al., 1986, published by Maruzen, P. The resistivity of the wafer is measured after the wafer has been previously subjected to an oxygen thermal donor quenching heat treatment as described in No. 24 to render oxygen electrically inert. Further, as the above-mentioned wafer, a non-doped wafer having a high resistivity and containing no dopant that is normally added during crystal growth is used.
【0026】図13は、上述のような酸素サーマルドナ
ー消去を十分に行ったノンドープシリコンウェーハを、
ホットプレートで熱処理時間を変えて加熱した際の加熱
温度と実測した比抵抗との関係を示したグラフである。
このとき加熱温度としては、実際の鏡面研磨にて生じる
と考えられる研磨温度である室温(25℃)から200
℃までを用いた。又、加熱時間も実際の鏡面研磨にて用
いると考えられる20分から200分を用いた。尚、上
記比抵抗の測定は、ウェーハを所定時間、所定温度に加
熱した後、25℃のウェーハについて行ったものである
。FIG. 13 shows a non-doped silicon wafer that has undergone sufficient oxygen thermal donor erasure as described above.
It is a graph showing the relationship between the heating temperature and the actually measured resistivity when heating was performed with a hot plate while changing the heat treatment time. At this time, the heating temperature ranges from room temperature (25°C) to 200°C, which is the polishing temperature that is thought to occur in actual mirror polishing.
Temperatures up to ℃ were used. Further, the heating time was 20 minutes to 200 minutes, which is considered to be used in actual mirror polishing. Note that the above-mentioned resistivity measurement was performed on a 25° C. wafer after the wafer was heated to a predetermined temperature for a predetermined period of time.
【0027】上記図13の結果より、熱処理時間(20
分、100分、200分)毎にそれぞれ異なるが、温度
上昇と共に減少する固有の比抵抗曲線A、B、Cが得ら
れることが分る。この比抵抗と熱処理温度との関係を利
用することにより、研磨時間と比抵抗とから逆にウェー
ハの温度を求めることが可能となった。From the results shown in FIG. 13 above, the heat treatment time (20
It can be seen that unique resistivity curves A, B, and C are obtained, which are different for each period (100 minutes, 200 minutes), but decrease with increasing temperature. By utilizing this relationship between resistivity and heat treatment temperature, it has become possible to determine the temperature of the wafer inversely from the polishing time and resistivity.
【0028】本発明は、以上の知見によりなされたもの
で、ウェーハの研磨面(表面)の比抵抗を測定すること
により、該比抵抗に基づいて、例えば前記図13のグラ
フ(比抵抗−温度曲線)から研磨面の温度を高精度に求
めることを可能とするものである。The present invention has been made based on the above findings, and by measuring the resistivity of the polished surface (surface) of a wafer, based on the resistivity, for example, the graph (resistivity-temperature) shown in FIG. This makes it possible to determine the temperature of the polished surface with high accuracy from the curve).
【0029】図14は、ウェーハの研磨面の温度を測定
する具体的方法を示したものである。前記第2表に示し
たように、研磨面の温度は、その反対側の面から測定す
ることが不可能であるから、研磨面側の表面極近傍を直
接測定する必要がある。そこで、図14に示すような探
針24を有する拡がり抵抗測定装置を用い、該探針24
をウェーハWに接触させて該ウェーハWの研磨面近傍に
おける比抵抗を測定する。FIG. 14 shows a specific method for measuring the temperature of the polished surface of a wafer. As shown in Table 2 above, since it is impossible to measure the temperature of the polished surface from the opposite side, it is necessary to directly measure the temperature in the vicinity of the polished surface. Therefore, using a spreading resistance measuring device having a probe 24 as shown in FIG.
is brought into contact with the wafer W to measure the specific resistance near the polished surface of the wafer W.
【0030】今、ウェーハWの研磨面に接触させた探針
24とウェーハ裏面との間に電圧Vを印加した場合に、
該探針24とウェーハ裏面との間に流れる電流をIとす
ると、比抵抗ρは下記の(3)式で与えられる(後藤憲
一他、「電磁気学演習」1970,共立出版発行,P1
71)。Now, when a voltage V is applied between the probe 24 in contact with the polished surface of the wafer W and the back surface of the wafer,
If the current flowing between the probe 24 and the back surface of the wafer is I, the specific resistance ρ is given by the following equation (3) (Kenichi Goto et al., "Exercise on Electromagnetism" 1970, published by Kyoritsu Shuppan, P1
71).
【0031】
ρ=〔πa /{K(ρ)−1+C}〕・(V/I
) ………(3)ここで、
a :探針とウェーハとの接触半径、K(ρ),C:補
正係数。ρ=[πa/{K(ρ)−1+C}]・(V/I
) ......(3) Here,
a: radius of contact between the probe and the wafer, K(ρ), C: correction coefficient.
【0032】又、図14のように、ウェーハWに探針2
4を接触させて比抵抗を測定する場合、測定領域は同図
に斜線を付した範囲であり、この領域の深さは探針24
がウェーハWと接触している直径の半径程度である。例
えば、探針先端が4μm の装置を使用すれば、ウェー
ハWの研磨面から約2μm の深さまでの領域、即ち研
磨面の極近傍の比抵抗を測定することが可能となる。又
、探針24をウェーハWの任意の点に接触させて比抵抗
を測定することにより、ウェーハ上の任意の位置の研磨
面温度を測定することが可能となる。Further, as shown in FIG. 14, the probe 2 is attached to the wafer W.
When measuring resistivity by contacting the probe 24, the measurement area is the shaded area in the same figure, and the depth of this area is the depth of the probe 24.
is approximately the radius of the diameter in contact with the wafer W. For example, if a device with a probe tip of 4 μm is used, it is possible to measure the resistivity in a region up to a depth of about 2 μm from the polished surface of the wafer W, that is, in the very vicinity of the polished surface. Furthermore, by bringing the probe 24 into contact with any arbitrary point on the wafer W and measuring the resistivity, it becomes possible to measure the polished surface temperature at any arbitrary position on the wafer.
【0033】以上詳述した如く、本発明によれば、ウェ
ーハWを研磨し、その研磨面の比抵抗を実測することに
より、該比抵抗値から研磨面の温度を高精度に求めるこ
とが可能となる。その結果、温度に大きく依存する前記
(2)式の化学作用による研磨速度Vc を、ひいては
前記(1)式の研磨速度Vmcp を適切に制御するこ
とも可能となる。As detailed above, according to the present invention, by polishing the wafer W and actually measuring the resistivity of the polished surface, it is possible to determine the temperature of the polished surface with high accuracy from the resistivity value. becomes. As a result, it becomes possible to appropriately control the polishing rate Vc due to the chemical action of the above equation (2), which is largely dependent on temperature, as well as the polishing speed Vmcp of the above equation (1).
【0034】また、ウェーハ研磨面の温度を該研磨面を
介して直接測定することができるため、前記図9に示し
たように研磨プレート14に溝18を形成する必要がな
く、それ故研磨プレートのウェーハ接触面を平坦にする
ことが可能となる。Furthermore, since the temperature of the wafer polishing surface can be directly measured through the polishing surface, there is no need to form the groove 18 in the polishing plate 14 as shown in FIG. This makes it possible to flatten the wafer contact surface.
【0035】このように、本発明によれば、ウェーハの
研磨を平坦な接触面の研磨プレートを用いて研磨でき、
しかもその研磨速度Vmcp を適切に制御することが
できるため、ウェーハに平坦度の高い鏡面を形成するこ
とが可能となる。As described above, according to the present invention, a wafer can be polished using a polishing plate with a flat contact surface.
Furthermore, since the polishing rate Vmcp can be appropriately controlled, it is possible to form a mirror surface with high flatness on the wafer.
【0036】[0036]
【実施例】以下、図面を参照して、本発明の実施例を詳
細に説明する。Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
【0037】シリコンウェーハに対して酸素サーマルド
ナー消去処理を施した後、該シリコンウェーハをホット
プレートで加熱処理し、そのときのホットプレートの温
度と比抵抗測定値と該比抵抗測定値から本発明方法によ
り求めた温度との関係を調べた。使用したシリコンウェ
ーハは、直径が150mm、初期酸素濃度が27.8p
pma、初期比抵抗が250Ωcmであり、熱処理時間
は100分である。After the silicon wafer is subjected to oxygen thermal donor erasing treatment, the silicon wafer is heated on a hot plate, and the temperature of the hot plate at that time, the resistivity measurement value, and the resistivity measurement value are used to determine the present invention. The relationship with temperature determined by this method was investigated. The silicon wafer used had a diameter of 150 mm and an initial oxygen concentration of 27.8 p.
pma, initial specific resistance was 250 Ωcm, and heat treatment time was 100 minutes.
【0038】図1は、上記条件の下で実測した比抵抗か
ら、前記図13の曲線Bを利用してウェーハの温度を求
める方法を示したものである。この方法で求めたウェー
ハの温度を、ホットプレート温度及び比抵抗測定値と共
に下記第3表に併記した。FIG. 1 shows a method of determining the wafer temperature from the resistivity actually measured under the above conditions using the curve B in FIG. 13. The wafer temperatures determined by this method are listed in Table 3 below, along with the hot plate temperature and resistivity measurements.
【0039】[0039]
【表3】[Table 3]
【0040】上記第3表より、本発明方法によれば、極
めて高精度にウェーハの表面温度を測定できることが示
される。又、従来方法による測定結果を示した前記第2
表と対比させてみれば、本発明方法が優れていることが
明らかである。Table 3 above shows that according to the method of the present invention, the surface temperature of the wafer can be measured with extremely high accuracy. In addition, the second section showing the measurement results by the conventional method
When compared with the table, it is clear that the method of the present invention is superior.
【0041】次に、図2に示した研磨装置を用いて、シ
リコンウェーハを実際に研磨し、研磨した該ウェーハの
鏡面内の温度分布を本発明方法により測定した結果を説
明する。Next, the results of actually polishing a silicon wafer using the polishing apparatus shown in FIG. 2 and measuring the temperature distribution within the mirror surface of the polished wafer using the method of the present invention will be described.
【0042】シリコンウェーハの研磨に使用した上記研
磨装置は、研磨プレート14のウェーハ接触面が平坦で
ある以外は、前記図9に示したものと実質的に同一のも
のである。又、上記シリコンウェーハの研磨は下記第4
表に示した条件の下で行った。The polishing apparatus used for polishing the silicon wafer is substantially the same as that shown in FIG. 9, except that the wafer contact surface of the polishing plate 14 is flat. In addition, the polishing of the silicon wafer described above is performed in the fourth manner below.
It was carried out under the conditions shown in the table.
【0043】[0043]
【表4】[Table 4]
【0044】まず、直径150mmのノンドープのシリ
コンウェーハWに対して酸素サーマルドナー消去処理を
施した。この処理を行った後のウェーハWの表面におけ
る比抵抗の測定値を図3に示した。比抵抗は、図に示し
たウェーハWにおける矢印に沿った位置で略等間に測定
した。図3より、酸素サーマルドナー消去後は、比抵抗
がウェーハWの全体に均一になっている。First, a non-doped silicon wafer W having a diameter of 150 mm was subjected to an oxygen thermal donor erasing process. FIG. 3 shows the measured values of the resistivity on the surface of the wafer W after this treatment. The specific resistance was measured at approximately equal intervals along the arrows on the wafer W shown in the figure. From FIG. 3, after the oxygen thermal donor is erased, the specific resistance is uniform over the entire wafer W.
【0045】酸素サーマルドナー消去した上記シリコン
ウェーハを、上記研磨装置で100分間研磨し、その後
研磨面における上記図3の場合と同位置の比抵抗を測定
した。この測定結果を示したのが図4である。又、この
図4に示した比抵抗の測定値に基づいて、前記図1に示
した方法により求めた各測定位置の温度を示したのが図
5である。なお、研磨時間は熱処理時間と実質的に同一
とみなせるため、図1の場合と同様に図11の曲線Bを
使用した。The above-mentioned silicon wafer, which had undergone oxygen thermal donor elimination, was polished for 100 minutes using the above-mentioned polishing apparatus, and then the specific resistance of the polished surface at the same position as in the case of FIG. 3 was measured. FIG. 4 shows the results of this measurement. FIG. 5 shows the temperature at each measurement position determined by the method shown in FIG. 1 based on the measured values of resistivity shown in FIG. 4. Note that since the polishing time can be considered to be substantially the same as the heat treatment time, curve B in FIG. 11 was used as in the case of FIG. 1.
【0046】上述の如く、本発明方法によれば、ウェー
ハ研磨面の全範囲に亘って高精度に温度を測定すること
も可能となる。従って、ウェーハ面の研磨時の正確な温
度分布が得られる。As described above, according to the method of the present invention, it is also possible to measure the temperature with high accuracy over the entire range of the polished surface of the wafer. Therefore, accurate temperature distribution during polishing of the wafer surface can be obtained.
【0047】次に、実際に鏡面研磨を行い、本発明の高
精度な研磨面温度測定法を用いてウェーハの平坦度を向
上させることを試みた。このとき、ウェーハとして直径
150mmのものを用い、研磨機としては、図6に示す
ようなトップリングの中心部と周辺部とに独立に圧力を
加えることが可能なものを用いた。Next, mirror polishing was actually performed and an attempt was made to improve the flatness of the wafer using the highly accurate polishing surface temperature measurement method of the present invention. At this time, a wafer having a diameter of 150 mm was used, and a polishing machine capable of independently applying pressure to the center and periphery of the top ring as shown in FIG. 6 was used.
【0048】まず、周辺部に圧力を加えずに鏡面研磨を
行い、本発明の方法を用いて研磨面の温度をウェーハの
直径方向に測定したところ、図7の結果を得た。ここで
、ウェーハ中心の温度をTC (℃)、ウェーハエッジ
より10mm内側に入った点での温度をTE (℃)と
し、その差、
ΔT(℃)=TC −TE …(
4)をウェーハ面内の研磨温度の均一性を表わす指標と
する。ΔTが0(℃)の場合が一番研磨温度均一性が良
いことになる。First, mirror polishing was performed without applying pressure to the periphery, and the temperature of the polished surface was measured in the diametrical direction of the wafer using the method of the present invention, and the results shown in FIG. 7 were obtained. Here, the temperature at the center of the wafer is TC (°C), the temperature at a point 10 mm inside the wafer edge is TE (°C), and the difference between them is ΔT (°C) = TC - TE...(
4) is an index representing the uniformity of polishing temperature within the wafer surface. The polishing temperature uniformity is the best when ΔT is 0 (° C.).
【0049】次に、周辺部に所定の圧力を加え鏡面研磨
を行い、本発明にて研磨面温度をウェーハ直径方向に測
定し、その結果よりΔTを求めた。これを、周辺部の圧
力を少しずつ毎回増加させて各々の圧力でのΔTを測定
した。その結果を図8に示す。この図8より、周辺部の
圧力1.8kg/cm2 においてΔTが0(℃)とな
ることがわかる。つまり、周辺部圧力1.8kg/cm
2 においてウェーハの研磨温度均一性が最良となり、
前記(2)式に示した如く、研磨速度均一性も最も良好
となる。実際、この条件にて鏡面研磨した5枚のウェー
ハの平坦度を測定し、周辺部圧力0kg/cm2 のも
のと比較したところ、第5表の如くとなり、TTVを2
.8μm 向上させることができた。Next, mirror polishing was performed by applying a predetermined pressure to the peripheral portion, and according to the present invention, the temperature of the polished surface was measured in the diametrical direction of the wafer, and ΔT was determined from the results. The peripheral pressure was increased little by little each time, and ΔT was measured at each pressure. The results are shown in FIG. From FIG. 8, it can be seen that ΔT becomes 0 (°C) when the peripheral pressure is 1.8 kg/cm2. In other words, the peripheral pressure is 1.8 kg/cm
2, the wafer polishing temperature uniformity is the best,
As shown in equation (2) above, the polishing rate uniformity is also the best. In fact, when we measured the flatness of five mirror-polished wafers under these conditions and compared them with those with a peripheral pressure of 0 kg/cm2, we found that the flatness was as shown in Table 5, and the TTV was 2.
.. We were able to improve this by 8 μm.
【0050】[0050]
【表5】[Table 5]
【0051】以上、本発明を具体的に説明したが、本発
明は前記実施例等に記載したものに限定されるものでな
いことはいうまでもない。Although the present invention has been specifically explained above, it goes without saying that the present invention is not limited to what has been described in the above embodiments.
【0052】例えば、ウェーハ研磨面の比抵抗は、前記
拡がり抵抗測定装置で測定する場合に限るものでなく、
同様に研磨面の比抵抗を測定できる手段であれば任意の
手段を用いることができる。For example, the specific resistance of the polished surface of a wafer is not limited to being measured using the spreading resistance measuring device.
Similarly, any means can be used as long as it can measure the specific resistance of the polished surface.
【0053】[0053]
【発明の効果】前記した通り、本発明によれば、半導体
ウェーハの研磨面(表面)の温度を直接高精度に測定す
ることが可能となる。従って、研磨面の温度に依存する
ウェーハの研磨速度を適切に制御することが可能となる
ため、ウェーハに極めて平坦度の高い鏡面を形成するこ
とが可能となる。又、ウェーハの裏面から温度測定を行
わないため、該ウェーハの裏面を平坦面により保持して
研磨を行うことが可能となり、この点からもウェーハの
鏡面の平坦度を向上することが可能となる。As described above, according to the present invention, it is possible to directly measure the temperature of the polished surface (surface) of a semiconductor wafer with high precision. Therefore, it is possible to appropriately control the polishing rate of the wafer, which depends on the temperature of the polishing surface, so that it is possible to form a mirror surface with extremely high flatness on the wafer. In addition, since the temperature is not measured from the back side of the wafer, it becomes possible to hold the back side of the wafer with a flat surface and perform polishing, which also makes it possible to improve the flatness of the mirror surface of the wafer. .
【図1】図1は、本発明の一実施例による温度測定方法
を説明するためのグラフである。FIG. 1 is a graph for explaining a temperature measurement method according to an embodiment of the present invention.
【図2】図2は、本実施例に適用される研磨装置の概略
を示す半断面図である。FIG. 2 is a half-sectional view schematically showing a polishing apparatus applied to this embodiment.
【図3】図3は、研磨前のシリコンウェーハの比抵抗測
定値を示すグラフである。FIG. 3 is a graph showing specific resistance measurements of a silicon wafer before polishing.
【図4】図4は、研磨後のシリコンウェーハの比抵抗測
定値を示すグラフである。FIG. 4 is a graph showing measured resistivity values of silicon wafers after polishing.
【図5】図5は、図4の比抵抗値から求めた研磨面温度
を示すグラフである。FIG. 5 is a graph showing the polishing surface temperature determined from the resistivity values shown in FIG. 4;
【図6】図6は、シリコンウェーハの研磨速度を調節す
るために適用した研磨装置である。FIG. 6 shows a polishing apparatus applied to adjust the polishing rate of silicon wafers.
【図7】図7は、上記研磨装置を用い、周辺部に無負荷
で研磨した場合の結果を示すグラフである。FIG. 7 is a graph showing the results of polishing the peripheral area with no load using the polishing apparatus described above.
【図8】図8は、周辺部圧力とシリコンウェハ研磨面の
温度差との関係を示すグラフである。FIG. 8 is a graph showing the relationship between peripheral pressure and temperature difference on the polished surface of a silicon wafer.
【図9】図9は、従来の研磨装置の概略を示す半断面図
である。FIG. 9 is a half-sectional view schematically showing a conventional polishing apparatus.
【図10】図10は、シリコンウェーハをホットプレー
トで加熱している状態を示す概略説明図である。FIG. 10 is a schematic explanatory diagram showing a state in which a silicon wafer is heated with a hot plate.
【図11】図11は、シリコンウェーハの熱処理温度と
酸素サーマルドナー濃度との関係を示すグラフである。FIG. 11 is a graph showing the relationship between heat treatment temperature of a silicon wafer and oxygen thermal donor concentration.
【図12】図12は、シリコンウェーハの熱処理時間と
酸素サーマルドナー濃度との関係を示すグラフである。FIG. 12 is a graph showing the relationship between silicon wafer heat treatment time and oxygen thermal donor concentration.
【図13】図13は、酸素サーマルドナー消去後のシリ
コンウェーハにおける熱処理温度と比抵抗との関係を示
すグラフである。FIG. 13 is a graph showing the relationship between heat treatment temperature and specific resistance in a silicon wafer after oxygen thermal donor erasure.
【図14】図14は、ウェーハの研磨面の比抵抗を測定
する方法の一例を示す概略説明図である。FIG. 14 is a schematic explanatory diagram showing an example of a method of measuring the resistivity of a polished surface of a wafer.
10…定盤、 12…研磨パッド、 14…研磨プレート、 16…研磨液供給管、 18…溝、 20…温度センサ、 22…ホットプレート、 24…探針、 W…ウェーハ。 10...Surface plate, 12...polishing pad, 14...polishing plate, 16...polishing liquid supply pipe, 18...Groove, 20...Temperature sensor, 22...hot plate, 24... Probe, W...Wafer.
Claims (1)
の温度を測定するに当り、半導体ウェーハに酸素サーマ
ルドナー消去熱処理を施した後に、該半導体ウェーハの
研磨を行い、研磨後に上記半導体ウェーハの研磨面の比
抵抗を測定し、その比抵抗値に基づいて研磨面の温度を
求めることを特徴とする半導体ウェーハ研磨面温度の測
定方法。1. In measuring the temperature of the polished surface during mirror polishing of a semiconductor wafer, the semiconductor wafer is polished after being subjected to an oxygen thermal donor erasing heat treatment, and the temperature of the semiconductor wafer is measured after polishing. A method for measuring the temperature of a polished surface of a semiconductor wafer, comprising measuring the resistivity of the polished surface and determining the temperature of the polished surface based on the resistivity value.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP41748090A JPH04279030A (en) | 1990-12-28 | 1990-12-28 | Surface temperature measuring method of polished semiconductor wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP41748090A JPH04279030A (en) | 1990-12-28 | 1990-12-28 | Surface temperature measuring method of polished semiconductor wafer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH04279030A true JPH04279030A (en) | 1992-10-05 |
Family
ID=18525577
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP41748090A Pending JPH04279030A (en) | 1990-12-28 | 1990-12-28 | Surface temperature measuring method of polished semiconductor wafer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH04279030A (en) |
-
1990
- 1990-12-28 JP JP41748090A patent/JPH04279030A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3563224B2 (en) | Semiconductor wafer evaluation method, heat treatment method, and heat treatment apparatus | |
JPH02185038A (en) | Thermal treatment equipment | |
JP2009272633A (en) | Method for producing epitaxially coated semiconductor wafer | |
US6837938B2 (en) | Apparatus associatable with a deposition chamber to enhance uniformity of properties of material layers formed on semiconductor substrates therein | |
GB2180469A (en) | Methods of manufacturing compound semiconductor crystals and apparatus for the same | |
KR19980080382A (en) | Substrate Wafer Processing Apparatus and How It Works | |
JPH09246200A (en) | Heating method and radiant heater | |
US6257760B1 (en) | Using a superlattice to determine the temperature of a semiconductor fabrication process | |
JPH04279030A (en) | Surface temperature measuring method of polished semiconductor wafer | |
JPH0557733B2 (en) | ||
JP3074312B2 (en) | Vapor growth method | |
JP4092993B2 (en) | Single crystal growth method | |
JP2005223098A (en) | Evaluation method and measuring method of dopant contamination, and managing method of thermal treatment process | |
JPH05102044A (en) | Epitaxial growing apparatus | |
JP2023024234A (en) | Method for verifying silicon wafer conductivity type | |
JP2019204912A (en) | Evaluation method | |
JP3896927B2 (en) | Epitaxial growth method | |
JP3514254B2 (en) | Heat treatment apparatus and method for manufacturing silicon epitaxial wafer | |
JP3665751B2 (en) | Temperature measuring method during plasma processing and temperature measuring member used therefor | |
Lerch | Ion implantation and rapid thermal annealing in synergy for shallow junction formation | |
JP4655861B2 (en) | Manufacturing method of substrate for electronic device | |
JP2019019030A (en) | Method for evaluating silicon single crystal and method for manufacturing silicon single crystal | |
JP4911042B2 (en) | Single crystal wafer and epitaxial wafer | |
US11600538B2 (en) | SiC epitaxial wafer and method for producing SiC epitaxial wafer | |
WO2023119696A1 (en) | Method for measuring thickness of high-resistance silicon wafer, and method for measuring flatness of high-resistance silicon wafer |