JPH041589B2 - - Google Patents

Description

[Detailed description of the invention] [Technical field to which the invention pertains] This invention relates to a series operation of DC-DC converters that balances the input voltage share of a plurality of DC-DC converters connected in series to a DC power supply. Regarding the method.

[Prior art and its problems]

A DC-DC converter converts DC power from a DC power source into DC power of a desired voltage that is isolated from the DC power source, and there are various circuits for this converter.

Figure 4 is a circuit diagram showing various examples of DC-DC converters, and Figure 4A is a forward type DC-DC converter.
What is called a DC converter, Figure 4 (b) is what is called a flyback type DC-DC converter,
Figure 4 C shows what is called a bridge inverter type DC-DC converter, but in cases where the load is large or the voltage of the DC power supply is high, one set of DC-DC converters may have a large capacity or Since the voltage is insufficient, multiple DC-DC inverters must be connected in series to the power supply.

Figure 5 is a main circuit connection diagram when two sets of DC-DC converters are connected in series.Input filter capacitors 2 and 3 are connected in series and connected to DC power supply 1 to divide the power supply voltage. , the input side of a DC-DC converter numbered 4 (hereinafter referred to as the positive side converter) is connected in parallel to the input filter capacitor 2, and the input side of the DC-DC converter numbered 5 (hereinafter referred to as the negative side converter) is connected in parallel to the input filter capacitor 2. The input sides of the positive side converter 4 and the output side of the negative side converter 5 are connected in parallel, and then the output side of the positive side converter 4 and the output side of the negative side converter 5 are connected in parallel. 7 to supply converted DC power. Here, as the positive side converter 4 and the negative side converter 5, for example, a DC-DC converter having a circuit configuration shown in FIG. 4 is used.

By the way, when the input sides of multiple DC-DC converters are connected in series to the power supply as shown in Figure 5, the difference between the control pulse widths of each DC-DC converter causes It has the disadvantage that it causes an unbalance in the voltage of the input filter capacitor, and therefore an unbalance in the output capacitance of each DC-DC converter.

Fig. 6 is a circuit diagram showing a conventional example in which two sets of forward type DC-DC converters are connected in series on their input sides and operated.The reason why the above-mentioned imbalance occurs according to Fig. 6 is explained below. do. However, since the circuit configuration and operation of the forward type DC-DC converter are well known, detailed explanation thereof will be omitted.

In FIG. 6, input filter capacitors 2 and 3 are connected in series, and a DC power source 1 is connected to this series circuit. The input side of a positive polarity converter 4 is connected in parallel to the input filter capacitor 2, and this positive polarity converter 4 includes a transistor 41 as a switching element, a rectifier diode 42, a freewheeling diode 43, a smoothing reactor 44, and a transformer 45. It is configured.
In addition, the transistor 5 as a switching element
1, a rectifier diode 52, a freewheeling diode 53, a smoothing reactor 54, and a transformer 55. The input side of the negative converter 5 is connected in parallel to the input filter capacitor 3, and the output side of the positive converter 4 and the negative electrode are connected in parallel to the input filter capacitor 3. side converter 5
are connected in parallel with each other, and supply DC power to a load 7 via an output capacitor 6.

In the conventional example circuit shown in FIG. 6, the output voltage applied to the load 7 is
The conductivity of the transistor 41 of the positive converter 4 and the transistor 51 of the negative converter 5 is adjusted so that E ₀ always maintains a constant value, and the control circuit includes a voltage setter 11 and an output voltage detector 12 , an automatic voltage regulator 13, a pulse generation circuit 14, and base drive circuits 15 and ₁₆ . When the voltage is applied to the automatic voltage regulator 13, the automatic voltage regulator 13 outputs a control signal to the pulse generating circuit 14 to make the input deviation zero. The pulse generation circuit 14 generates a control pulse signal that changes in response to the output from the automatic voltage regulator 13, and the base drive circuit 15 amplifies this control pulse signal to drive the transistor 41. 16 also amplifies the control pulse signal and transmits it to the transistor 5.
Drive 1. Thus transistors 41 and 51
is turned on and off by a signal from the above-mentioned control circuit to control its conduction width, and operates to make the output voltage E ₀ match the voltage set by the voltage setting device 11.

By the way, the base drive circuits 15 and 16 have their own inherent operation delays, and the transistor 4
1 and 51 each have their own storage time at turn-off, so the pulse generation circuit 14
The actual conductivity of the transistors 41 and 51 is larger than the control pulse signal width α outputted by the control pulse signal width α. Furthermore, there are variations in operation delay time between base drive circuits 15 and 16, and variations in storage time between transistors ₄₁ and 51. Between the rate α and ₂ is Δα
This will result in a difference.

FIG. 7 is an operating waveform diagram showing the conductivity of the transistor with respect to the control pulse signal in the conventional circuit shown in FIG. 6, and FIG. , Figure 7b shows the current i ₄ flowing through the transistor 41.
7C represents the waveform of the current i5 flowing through the transistor ₅₁ , and as is clear from this FIG.
The period during which the signal 1 is on is longer than the control pulse signal, and there is a difference in time width between the two by Δα.

8 is an operation waveform diagram showing the operation of the conventional circuit shown in FIG. 6 when there is a difference in conductivity as shown in FIG. 7, and FIG. 8A shows the operation of the positive side converter 4. In the figure, the current waveform i ₄ of the transistor 41 is drawn as a solid line, and the current waveform i ₆ flowing through the smoothing reactor 44 is drawn as a broken line. FIG. 8B shows the operation of the negative converter 5, in which the current waveform i ₅ of the transistor 51 is drawn as a solid line, and the current waveform i ₇ flowing through the smoothing reactor 54 is drawn as a broken line. Further, in FIG. 8, the operating waveforms in the initial state are shown on the left, and the operating waveforms in the steady state are shown on the right.

The operation when there is a difference Δα in the conductivity between the transistors 41 and 51 as shown in FIG. 7 will be described below with reference to FIGS. 6 and 8. In order to simplify the explanation, the winding ratio between the primary winding and the secondary winding of each of the transformers 45 and 55 is 1:1.
shall be. Also, i ₄ and i ₅ are transistors 4
1 and 51, i ₆ and i ₇ are smoothing reactors 44,
54, and I _6A and I _7A represent the average values of currents i ₆ and i ₇ flowing through the smoothing reactors 44 and 54, respectively.

The voltage E ₂ of input filter capacitor 2 and the voltage E _{3 of input filter capacitor 3} are equal,
If the initial state is defined as the case where the initial currents of transistors 41 and 51 are equal, as shown in the initial state of FIG. 8, since the conductivity of each transistor is not the same, the amount of charge due to the current i ₄ of transistor 41 is and the current i ₅ of the transistor 51
The charge amount in the negative side converter 5 is larger by the diagonal line corresponding to Δα. Here, the currents in each part have the relationship shown in equation (1) below.

I _1A = I _2A + I _4A = I _3A + I _5A ...(1) However, I _1A is the average value of the input current, I _2A is the average current value of input filter capacitor 2, and I _3A is the average current value of input filter capacitor 3. , I _4A is the average current value of transistor 41, I _5A is the average current value of transistor 51
is the average current value of

As mentioned above, since I _4A < I _5A , I _2A > I _3A
This can be derived from equation (1). This shows that the amount of charge in the input filter capacitor 2 is larger than that in the input filter capacitor 3, and as a result, the voltage E ₂ of the input filter capacitor 2 is reduced due to the conductivity difference Δα shown in FIG. The voltage is higher
It becomes higher than E ₃ , indicating that the voltage sharing becomes unbalanced.

The right side of FIG. 8 shows the state from such an initial state through a transient state to a steady state. In this steady state, the voltages of both input filter capacitors 2 and 3 are E ₂ >E ₃ as described above, and this voltage is constant. Therefore, the average value of the currents of these input filter capacitors 2 and 3 has the relationship expressed by the following equation (2).

I _2A = I _3A = 0...(2) Equation (3) is obtained from equation (2) and equation (1).

I _1A = I _4A = I _5A ...(3) In other words, in steady state, the transistor current
The average values of i ₄ and i ₅ (the area of the shaded area shown in the steady state in FIG. 8) are equal. From this, the following
The relationship of equation (4) is obtained.

I _6A・α ₁ = I _7A・α ₂ ...(4) Here, α ₁ and α ₂ are transistors 41 and 5, respectively.
1, I _6A is the average current of the smoothing reactor 44 , that is, the output current of the positive side converter 4 , and I _7A is the average current of the smoothing reactor 54 , that is, the output current of the negative side converter 5 .

If the output capacity of the positive side converter 4 is W ₁ and the output capacity of the negative side converter 5 is W ₂ , then W ₁ = I _6A・E ₀ ...(5) W ₂ = I _7A・E ₀ ...(6) The following equation (7) can be obtained from equations (4), (5), and (6).

W ₁ /W ₂ =I _6A・E ₀ /I _7A・E ₀ =I _6A /I _7A =α ₂ /
α ₁ ...(7) That is, it can be seen that the unbalanced output capacitance of both converters 4 and 5 is determined by the conductivity of the respective transistors 41 and 51. Therefore, when calculating the unbalance of the input voltage using the above formulas, E ₂ /E ₃ =W ₁ /I _2A /W ₂ /I _3A ...(8) Here, there is a relationship such that I _2A = I _3A . From below
Equation (9) is obtained.

E ₂ /E ₃ = W ₁ /W ₂ = α ₂ / α ₁ ...(9) That is, if the conductivity of transistors 41 and 51 is α ₁ and α ₂ , respectively, then the voltage of input filter capacitors 2 and 3 is It can be seen that the ratio E ₂ /E ₃ and the ratio W ₁ /W ₂ between the output capacity of the positive side converter 4 and the output capacity of the negative side converter 5 are inversely proportional to α ₁ /α ₂ .

Therefore, if the difference between conductivity α ₁ and α ₂ is large, the voltage imbalance between input filter capacitors 2 and 3 will be large, and the semiconductor element used in the DC-DC converter connected to the capacitor with higher voltage will Since the voltage responsibility of the device becomes stricter, high voltage withstand voltages must be selected for the input filter capacitor, semiconductor elements, and peripheral equipment in consideration of this voltage imbalance, which increases the size and price of the device. There are many shortcomings. Furthermore, due to the difference in conductivity, each
The unbalance of the output capacity of the DC-DC converter also becomes large, and the various semiconductor elements, transformers, smoothing reactors, etc. used in the DC-DC converter with the larger output capacity are compared to when there is no unbalance. Not only does it require a large current capacity, but it also generates large losses, which also has the disadvantage of making the device larger and more expensive.

[Purpose of the invention]

An object of the present invention is to provide a series operation system for DC-DC converters that can eliminate input voltage unbalance and output capacitance unbalance when a plurality of DC-DC converters are connected in series.

[Key points of the invention]

This invention divides the input voltage with a capacitor,
When operating the input sides of each capacitor DC-DC converter connected in parallel and the output sides connected in series or parallel, the voltage to be shared by each capacitor mentioned above is determined, and any capacitor When an unbalance occurs between the actual voltage of By adding and inputting the adjustment signal for correcting the voltage imbalance mentioned above to the control pulse generation circuit that operates according to the
Control the control pulse width of the DC-DC converter so that the conductivity of that transistor is the same as that of other transistors to eliminate the unbalance of the input capacitor voltage and the unbalance of the DC-DC converter output capacitance. That is.

[Embodiments of the invention]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, in which the input sides of two sets of forward type DC-DC converters are connected in series, and the output sides are connected in parallel. That is, the input filter capacitors 2 and 3 are connected in series to divide the voltage of the DC power supply 1, and the voltage of the DC power supply 1 is divided by the transistor 41, the rectifier diode 42, the freewheeling diode 43, and the smoothing reactor 4.
4 and a transformer 45, the input side of the positive converter 4 is connected in parallel to the input filter capacitor 2, and similarly a transistor 51, a rectifier diode 52, a freewheeling diode 53, and a smoothing reactor 5 are connected in parallel to the input filter capacitor 2.
4 and a transformer 55 are connected in parallel to the input filter capacitor 3, and the output sides of both converters 4 and 5 are connected in parallel to each other, and are connected to the load 7 via the output capacitor 6. The converted DC power is supplied in the same manner as in the conventional circuit described above (see FIG. 6). There is also a voltage setting device 11 that sets the output voltage, an output voltage detector 12 that detects the output voltage _E0 , and an automatic controller that inputs the deviation between these set voltages and the detected voltage and outputs a control signal to make this input deviation zero. Since the provision of the voltage regulator 13 is also the same as the conventional circuit shown in FIG. 6, a description of these operations will be omitted.

In the present invention, a voltage target value detector 21 that detects the target value of the voltage to be shared by each capacitor from the total voltage of the input filter capacitor, and an arbitrary input filter capacitor (in the embodiment circuit shown in FIG. 1, the negative pole side It is equipped with an actual voltage value detector 22 that detects the actual value of the voltage of the input filter capacitor (input filter capacitor 3) located at This voltage regulator 23 outputs a control signal that makes the input deviation zero, and the sum of this control signal and the output signal from the automatic voltage regulator 13 is applied in parallel to an arbitrary input filter capacitor, that is, the input filter capacitor 3. Connected negative side converter 5
The conductivity of the transistor 51 of the negative side converter 5 is changed by inputting the control pulse signal to the control pulse generation circuit 24 that generates the control pulse signal.

In other words, the voltage of input filter capacitor 2 is
E ₂ , and the voltage of input filter capacitor 3 is E ₃ , so the total voltage is E ₂ + E ₃ , so the voltage target value to be shared by each input filter capacitor is (E ₂ + E ₃ )/2. Then, the voltage target value detector 21 detects this voltage target value (E ₂ +E ₃ )/2. On the other hand, the voltage actual value detector 22 detects the voltage E ₃ of the input filter capacitor, which is denoted by 3.
Here, if it is assumed that there is a difference of Δα between the conductivity α ₁ of the transistor 41 and the conductivity α ₂ of the transistor 51, which is Δα as explained in the conventional example circuit above, and α ₂ >α ₁ , then From equation (9), E ₂ > E ₃ . In other words, the voltage of the input filter capacitor with code 2 is higher. Thus, when the voltage target value detector 21 detects, the magnitude relationship between the voltage target value (E ₂ +E ₃ )/2 and the voltage actual value E ₃ detected by the voltage actual value detector 22 is expressed by equation (10).

E ₂ +E ₃ /2>E ₃ ...(10) The voltage regulator 23 inputs the deviation between the left side and the right side of equation (10) and generates a control signal to make this input deviation zero, that is, the input filter capacitor 3 A voltage -ΔV is generated in a direction that increases the voltage _E3 . Therefore, the signal input to the control pulse generation circuit 24 is smaller than the output of the automatic voltage regulator 13 by ΔV, so
The pulse width output by this control pulse generation circuit 24 is smaller than the pulse width output from the pulse generation circuit 14 to which the output of the automatic voltage regulator 13 is input as is, and therefore the current waveform i ₄ flowing through the transistor 41 and the current waveform i ₅ flowing through the transistor 51 are controlled in the direction that they become equal, and when both current waveforms i ₄ and i ₅ become equal, both input filter capacitor voltages E ₂ and E ₃ become equal. both voltages
When E ₂ and E ₃ become equal, the deviation input to the voltage regulator 23 becomes zero, and the voltage regulator 23 continues to hold the output at the time when the input deviation becomes zero.

Due to the above operation, the pulse width output by the control pulse generation circuit 24 is shortened, so that the output voltage E ₀
will decrease by that amount, but this decrease in the output voltage E ₀ becomes a deviation from the voltage set by the voltage setting device 11 and is automatically compensated for by increasing the output of the automatic voltage regulator 13. be done.

FIG. 2 is an operation waveform diagram showing the operation of each part in the embodiment circuit shown in FIG. 1, in which FIG. 2A shows the output of the automatic voltage regulator 13, and FIG. 2C shows the output of the pulse generation circuit 14, FIG. 2D shows the output of the control pulse generation circuit 24, and FIG. 2E shows the current waveform _i4 flowing through the transistor 41. represent the current waveform _i5 flowing through the transistor 51, respectively. The left side of FIG. 8 shows operating waveforms in an initial state, and the right side shows operating waveforms in a steady state.

As is clear from FIG. 2, initially the pulse generation circuit 1
4 and the control pulse generation circuit 24 both output pulse signals with a width of α, but due to variations in storage time at turn-off, etc., the conductivity of the transistor 41 is α ₁ and the conductivity of the transistor 51 is α ₂ , and a difference of Δα occurs between the two conductivity rates. Therefore, each input filter capacitor voltage becomes unbalanced, but this unbalanced amount is inputted to the voltage regulator 23, and the output of the automatic voltage regulator 13 is the output of this voltage regulator 23.
By inputting the sum of ΔV to the control pulse generation circuit 24 (see FIG. 2B), the pulse width output from the control pulse generation circuit 24 is Δα smaller than the width of the pulse output from the pulse generation circuit 14.
Since the conductivity of transistors 41 and 51 becomes equal, the unbalance between voltages E ₂ and E 3 of input filter capacitors 2 and ₃ can be eliminated.
At this time, in order to compensate for the decrease in the output voltage E ₀ , the output of the automatic voltage regulator 13 is increased compared to the initial state, so that the output of the automatic voltage regulator 13 is increased compared to the initial state.
The width of the pulse outputted by No. 4 is larger than the pulse width α in the initial state.

In addition, in the embodiment circuit of the present invention shown in FIG.
The voltage actual value detector 22 is provided on the input filter capacitor 3 on the side where the voltage decreases to detect the voltage, but on the contrary, it is provided on the input filter capacitor 3 with the code 2 where the voltage increases.
A pulse generation circuit 24 controls the output of the voltage regulator 23.
Of course, the same effect can be obtained even if the configuration is such that the input signal is added to the input signal. Furthermore, although the example circuit of the present invention has been described with the input sides of two sets of DC-DC converters connected in series and the output sides connected in parallel, it is assumed that the input sides of a larger number of DC-DC converters are connected in series. The gist of the present invention can be applied even when the output sides of these converters are connected in series.

Figure 3 is a circuit diagram showing an example of a two-stone DC-DC converter, where Figure 3A shows a two-stone forward DC-DC converter, and Figure 3B shows a two-stone flyback DC-DC converter. Each shows a converter.

In the present invention, the two-stone DC-DC shown in FIG.
It goes without saying that the invention can also be applied to converters, and semiconductor switching elements other than transistors, such as gate turn-off thyristors, can be used as switching elements.

〔Effect of the invention〕

According to this invention, the input capacitors are connected in series to divide the DC voltage, and each capacitor has a separate
When operating a device in which the input sides of DC-DC converters are connected in parallel and the output sides of these converters are connected in parallel or in series, the voltage imbalance of each input capacitor is suppressed. The voltage regulation signal in the direction of each DC
- By adding the conductivity of the DC converter to the control signal, the conductivity of the switching elements of each DC-DC converter is made equal, thereby eliminating the voltage unbalance of the input capacitor and the output capacitance unbalance of the DC-DC converter. Because it is possible to
Compared to conventional equipment that had such an imbalance, it is possible to reduce the withstand voltage and current capacity of the equipment and semiconductor elements used in the DC-DC converter, reducing the size and cost of the equipment. You can get the desired effect.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention,
Fig. 2 is an operation waveform diagram showing the operation of each part in the example circuit shown in Fig. 1, and Fig. 3 is a two-stone type
FIG. 2 is a circuit diagram showing an example of a DC-DC converter.
Fig. 4 is a circuit diagram showing various examples of DC-DC converters, Fig. 5 is a main circuit connection diagram when two sets of DC-DC converters are connected in series, and Fig. 6 is a circuit diagram showing various examples of DC-DC converters.
A circuit diagram showing a conventional example in which a pair of forward type DC-DC converters are connected in series on their input sides and operated.
FIG. 7 is an operation waveform diagram showing the conductivity of the transistor in response to the control pulse signal in the conventional circuit shown in FIG. 6, and FIG. FIG. 2 is an operation waveform diagram showing the operation of the conventional example circuit shown in the figure. 1... DC power supply, 2, 3... Input filter capacitor, 4... Positive pole side converter, 5... Negative pole side converter, 6... Output capacitor, 7... Negative pole, 11... Voltage setting device, 12... Output voltage detector, 13... automatic voltage regulator, 14... pulse generation circuit, 15, 16... base drive circuit, 21...
...Voltage target value detector, 22... Voltage actual value detector, 23... Voltage regulator, 24... Control pulse generation circuit, 41, 51... Trajinster as a switching element, 42, 52... Rectifier diode, 43, 53...freewheeling diode, 44, 54
...Smoothing reactor, 45, 55...Transformer.

Claims (1)

[Claims] 1 Multiple capacitors are connected in series and connected to a DC power supply, and a switching element turns on and off the DC power applied to the primary winding of the transformer, thereby transferring power from the secondary winding of the transformer through the rectifying element. The input side of a DC-DC converter configured to extract DC power is connected separately in parallel to each of the capacitors, and the output side of the DC-DC converter is connected in series or in parallel with each other,
In the series operation system of DC-DC converters, the automatic voltage adjustment signal for maintaining the output side voltage at a predetermined value is commonly applied to the switching elements of each of the DC-DC converters to adjust their conductivity. Determine the voltage target value to be shared by each capacitor from the total voltage applied to the series-connected capacitors, detect the actual value of the capacitor applied voltage for each capacitor, and calculate the voltage target value and the voltage actual value of any capacitor. A voltage adjustment signal that makes the deviation from the voltage zero is determined and added to the automatic voltage adjustment signal, and is connected in parallel to the arbitrary capacitor.
A series operation system for a DC-DC converter, characterized in that the conductivity of a switching element of the DC-DC converter is adjusted based on the above addition result.