JP7439392B2 - capacitor - Google Patents

Description

The present disclosure relates to capacitors.

For example, an MIM (Metal Insulator Metal) capacitor is well known as a typical capacitor element used in semiconductor integrated circuits. A MIM capacitor is a capacitor having a parallel plate structure in which an insulator is sandwiched between a lower electrode and an upper electrode.

For example, Patent Document 1 describes a laminate in which a dielectric film and an upper electrode layer are sequentially laminated on a base electrode, a protective layer covering these, and terminal electrodes drawn out from the base electrode and the upper electrode layer, respectively. A thin film capacitor is disclosed.

JP2015-216246A

The capacitor described in Patent Document 1 mentioned above has no metal in the lateral direction of the capacitor structure, so when an electromagnetic field enters from the outside, eddy currents are generated in the electrodes, and the current during charging and discharging is reduced. Routes are disrupted. As a result, the current path becomes longer and the Q value of the capacitor decreases. In particular, the influence of the external electromagnetic field becomes large on the lower electrode, which has the largest area.

Therefore, an object of the present disclosure is to provide a capacitor that is less susceptible to external electromagnetic fields.

The present disclosure includes the following aspects.
[1] A substrate,
a lower electrode provided on the substrate;
a dielectric film provided on the lower electrode;
an upper electrode provided on the dielectric film;
a first terminal electrode connected to the lower electrode;
a second terminal electrode connected to the upper electrode, the lower electrode, the dielectric film, and the upper electrode forming a capacitor structure,
The capacitor further includes a shield metal near an end surface of the lower electrode.
[2] The capacitor according to [1] above, wherein the shield metal is provided around an end surface of the lower electrode.
[3] The capacitor according to [1] or [2] above, wherein the shield metal is formed of a magnetic metal.
[4] The capacitor according to any one of [1] to [3] above, wherein the lower electrode has an inverted tapered shape.
[5] The capacitor according to any one of [1] to [4] above, wherein the lower electrode and the shield metal are made of the same material.
[6] The capacitor according to any one of [1] to [5] above, wherein the shield metal has a substantially triangular cross-sectional shape.

According to the present disclosure, it is possible to provide a capacitor that is less susceptible to external electromagnetic fields.

FIG. 1(a) is a cross-sectional view of a capacitor 1a according to a first embodiment of the present disclosure, and FIG. 1(b) is a plan view. FIGS. 2A to 2H are cross-sectional views for explaining a method of manufacturing a capacitor 1a according to the first embodiment of the present disclosure. FIG. 3 is a cross-sectional view of the capacitor 1b according to the first embodiment of the present disclosure. FIGS. 4(a) to 4(h) are cross-sectional views for explaining a method of manufacturing a capacitor 1b according to a second embodiment of the present disclosure.

Hereinafter, the capacitor of the present disclosure will be described in detail with reference to the drawings. However, the shape, arrangement, etc. of the capacitor of the present disclosure and each component are not limited to the illustrated example.

(First embodiment)
A cross-sectional view of the capacitor 1a of the first embodiment is shown in FIG. 1(a), and a plan view is shown in FIG. 1(b).

As shown in FIGS. 1(a) and 1(b), the capacitor 1a of this embodiment generally includes a substrate 2, an insulating film 3 provided on the substrate 2, and an insulating film 3. 3, a dielectric film 5 provided on the lower electrode 4, an upper electrode 6 provided on the dielectric film 5, and the dielectric film 5 and the upper electrode. 6, a first terminal electrode 11a and a second terminal electrode 11b provided on the protective layer 8, and a shield metal 7 provided around the lower electrode 4. This capacitor 1a has a through hole 15a that penetrates the protective layer 8 and the dielectric film 5, and a through hole 15b that penetrates the protective layer 8. The first terminal electrode 11a passes through the through hole 15a and is connected to the lower electrode 4. The second terminal electrode 11b passes through the through hole 15b and is connected to the upper electrode 6. In the capacitor 1a, the lower electrode 4, the dielectric film 5, and the upper electrode 6 are laminated in this order to form an MIM capacitor structure, and by applying a voltage between the lower electrode 4 and the upper electrode 6, Charge can be accumulated in the dielectric film 5. In the capacitor of the present disclosure, since the shield metal 7 exists around the lower electrode 4, it is possible to suppress the current flowing through the lower electrode 4 from being disturbed by the influence of an external electromagnetic field and the Q value from decreasing.

The capacitor 1a as described above is manufactured, for example, as follows.

First, the substrate 2 is prepared.

The substrate 2 is not particularly limited, but may preferably be a semiconductor substrate such as a silicon substrate or a gallium arsenide substrate, or an insulating substrate such as glass or alumina.

The length of the long side of the substrate 2 is preferably 200 μm or more and 600 μm or less, more preferably 300 μm or more and 500 μm or less, and the short side length is preferably 100 μm or more and 300 μm or less, more preferably 150 μm or more and 250 μm or less. be.

The thickness of the substrate 2 is not particularly limited, but is preferably 50 μm or more and 300 μm or less, more preferably 80 μm or more and 200 μm or less. By making the thickness of the substrate 50 μm or more, the mechanical strength of the substrate can be increased, and the substrate is less likely to be cracked or chipped during backgrinding or dicing in capacitor manufacturing. By setting the thickness of the substrate to 300 μm or less, it becomes possible to make the substrate thinner than the vertical and horizontal lengths of the capacitor, which facilitates handling when mounting the capacitor.

Next, an insulating film 3 is formed on the entire substrate 2 (FIG. 2(a)).

In this embodiment, the insulating film 3 is provided on the substrate 2 so as to cover the entire substrate.

The insulating film 3 can be formed by, for example, sputtering, PVD (physical vapor deposition), CVD (chemical vapor deposition), or the like.

The thickness of the insulating film 3 is not particularly limited as long as the layer formed on the substrate 2 and the insulating film can be insulated, and is, for example, 0.05 μm or more, preferably 0.10 μm or more. Further, from the viewpoint of reducing the height of the capacitor 1a, the thickness of the insulating film 3 is preferably 10 μm or less, more preferably 1.0 μm or less, and still more preferably 0.50 μm or less.

The material constituting the insulating film 3 is not particularly limited, but preferably includes SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , HfO ₂ , Ta ₂ O ₅ , ZrO ₂ and the like _{; 3N4 or Al2O3 are} more preferred.

Next, a pattern for the lower electrode 4 is formed on the insulating film 3 (FIG. 2(a)).

In this embodiment, the lower electrode 4 is provided on the insulating film 3 in a region other than the outer edge of the insulating film 3. In other words, when viewed in plan, the lower electrode 4 is provided within the region occupied by the substrate 2 and the insulating film 3. By not forming the lower electrode up to the ends of the insulating film and the substrate, it is possible to prevent the lower electrode 4 from being exposed on the end face of the capacitor 1a and causing a short circuit with other components.

The method for forming the pattern of the lower electrode 4 can be, for example, a lift-off method, a plating method, photolithography, etching, or the like. For example, patterning is performed using a semi-additive method. In the semi-additive method, a seed layer is formed by sputtering or electroless plating, a resist pattern is formed that opens a part of the seed layer using photolithography, and a lower electrode material is formed in the opening by electroless plating. The resist is peeled off, and finally the seed layer is removed at the portion where the lower electrode is not formed.

The thickness of the lower electrode 4 is not particularly limited, but is preferably 0.5 μm or more and 10 μm or less, more preferably 1 μm or more and 6 μm or less. By setting the thickness of the lower electrode to 0.5 μm or more, the resistance of the electrode can be reduced, and the influence on the high frequency characteristics of the capacitor can be suppressed. By setting the thickness of the lower electrode to 10 μm or less, it is possible to suppress a decrease in the mechanical strength of the element due to the stress of the electrode, and it is possible to suppress deformation of the capacitor.

The material constituting the lower electrode 4 is not particularly limited, but preferably includes Cu, Ag, Au, Al, Ni, Cr, or Ti, or an alloy thereof, or a conductor containing these, More preferred are Cu, Ag, Au or Al.

Next, a lower dielectric film 5a is formed on the lower electrode 4 (FIG. 2(b)).

In this embodiment, the lower dielectric film 5a is formed over the entire upper surface of the substrate so as to cover the lower electrode 4. Note that the lower dielectric film 5a constitutes the dielectric film 5 together with the upper dielectric film 5b that will be formed later. A through hole is formed in the dielectric film 5 in a later through hole forming step. By covering the lower electrode with a dielectric film, it is possible to prevent the lower electrode from being exposed to the end face of the capacitor and to prevent it from coming into electrical contact with unintended members.

The lower dielectric film 5a can be formed by, for example, sputtering, PVD, CVD, or the like.

The thickness of the lower dielectric film 5a is not particularly limited, but is preferably 20 nm or more and 10 μm or less, preferably 50 nm or more and 10 μm or less, and more preferably 0.1 μm or more and 3.0 μm or less.

The material constituting the lower dielectric film 5a is not particularly limited, but is preferably an oxide or nitride such as SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , HfO ₂ , Ta ₂ O ₅ , ZrO _{2 ,} etc. can be mentioned.

Next, a shield metal 7 is formed around the lower electrode 4.

Formation of the shield metal 7 in this embodiment may include two steps. First, the metal layer 13 is formed entirely on the lower dielectric film 5a (FIG. 2(c)), and then the shield metal 7 can be formed by processing the metal layer 13 by etching or the like (FIG. 2(c)). (d)).

The method for forming the metal layer 13 is, for example, the same as that for the lower electrode 4, and includes, for example, a lift-off method, a plating method, photolithography, etching, and the like.

The material constituting the metal layer 13 is not particularly limited, but preferably includes Ni, Co, Cu, Ag, Au, Al, Pt, Cr, Ti, and alloys thereof.

The thickness of the metal layer 13 is not particularly limited, but is preferably 0.5 μm or more and 10 μm or less, more preferably 1 μm or more and 6 μm or less. In one embodiment, the thickness of the metal layer 13 is preferably in the range of 0.9 to 1.1 times the thickness of the lower electrode 4, preferably substantially the same thickness. By setting the thickness of the metal layer 13 to a range of 0.9 times to 1.1 times the thickness of the lower electrode 4, the thickness of the shield metal 7 formed is close to that of the lower electrode 4. can effectively obtain a shielding effect.

The method of processing the metal layer 13 to obtain the shield metal 7 is not particularly limited, but includes etching and the like, with dry etching being particularly preferred.

By dry etching the metal layer 13, the metal layer formed on the flat portion of the metal layer 13 is quickly removed, and the metal layer 13 formed on the stepped portion around the lower electrode 4 remains. This becomes shield metal 7.

The thickness of the shield metal 7 is not particularly limited, but is preferably 0.5 μm or more and 10 μm or less, and more preferably 1 μm or more and 6 μm or less. In one embodiment, the thickness of the shield metal 7 is preferably in the range of 0.9 to 1.1 times the thickness of the lower electrode 4, preferably substantially the same thickness. By setting the thickness of the shield metal 7 to a range of 0.9 to 1.1 times the thickness of the lower electrode 4, an effective shielding effect can be obtained.

Note that in the present embodiment, the shield metal 7 is provided close to the side surfaces of the lower electrode 4 (i.e., four surfaces along the thickness direction) so as to surround the entire periphery of the lower electrode 4; In this capacitor, the position, shape, size, etc. of the shield metal 7 are not limited as long as they can reduce the influence of external electromagnetic fields on the lower electrode 4.

For example, the shield metal 7 may be present only near one side surface or only near two side surfaces of the lower electrode 4. Further, the shield metal 7 may be present only in a portion near each side surface of the lower electrode 4.

Next, an upper dielectric film 5b is formed on the lower dielectric film 5a and the shield metal 7 (FIG. 2(e)).

The upper dielectric film 5b constitutes the dielectric film 5 together with the lower dielectric film 5a.

The upper dielectric film 5b can be formed by, for example, sputtering, PVD, CVD, or the like.

The thickness of the upper dielectric film 5b is not particularly limited, but is preferably 20 nm or more and 10 μm or less, preferably 50 nm or more and 10 μm or less, and more preferably 0.1 μm or more and 3.0 μm or less.

The material constituting the upper dielectric film 5b is not particularly limited, but is preferably an oxide or nitride such as SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , HfO ₂ , Ta ₂ O ₅ , ZrO _{2 ,} etc. The material is preferably the same as the material constituting the lower dielectric film 5a.

The thickness of the dielectric film 5 consisting of the lower dielectric film 5a and the upper dielectric film 5b is not particularly limited, but is preferably 50 nm or more and 10 μm or less, more preferably 0.1 μm or more and 3.0 μm or less. . By setting the thickness of the dielectric film to 50 nm or more, insulation durability can be increased. By setting the thickness of the dielectric film to 10 μm or less, it is possible to suppress a decrease in the mechanical strength of the element due to the stress of the dielectric film, and it is possible to suppress deformation of the capacitor.

Next, a pattern for the upper electrode 6 is formed on the upper dielectric film 5b (FIG. 2(f)). The upper electrode 6 is provided so that at least a portion, preferably the entire portion thereof, faces the lower electrode 4 with the dielectric film 5 interposed therebetween. As a result, a capacitor structure of upper electrode 6-dielectric film 5-lower electrode 4 is obtained.

The method for patterning the upper electrode 6 is, for example, the same as that for the lower electrode 4, and includes, for example, a lift-off method, a plating method, photolithography, etching, and the like. Preferably, semi-additive construction methods can be used.

The thickness of the upper electrode 6 is not particularly limited, but for the same reason as the lower electrode 4, the thickness is preferably 0.5 μm or more and 10 μm or less, and more preferably 1 μm or more and 6 μm or less. Further, the thickness of the upper electrode 6 is preferably thinner than the thickness of the lower electrode 4. The length of the upper electrode 6 is preferably shorter than the length of the lower electrode 4. This is because when the thickness of the lower electrode 4 is thin, the equivalent series resistance (ESR) becomes large.

The material constituting the upper electrode 6 is not particularly limited, but preferably includes Cu, Ag, Au, Al, Ni, Cr, or Ti, or an alloy thereof, or a conductor containing these; More preferred are Ag, Au or Al.

Next, a pattern of a protective layer 8 is formed on the upper dielectric film 5b and the upper electrode 6 (FIG. 2(g)).

The protective layer 8 can be formed by, for example, a spin coating method. Further, the method for forming the pattern of the protective layer 8 may be, for example, photolithography, etching, or the like.

In this embodiment, when forming the pattern of the protective layer 8, through holes 15a and 15b are formed in which the terminal electrodes 11a and 11b are formed. That is, in forming the through hole 15a, a portion of the dielectric film 5 is also removed to expose the lower electrode 4 inside the through hole 15a.

The thickness of the protective layer 8 is not particularly limited, but is preferably 1 μm or more and 20 μm or less, more preferably 3 μm or more and 15 μm or less. By setting the thickness of the protective layer to 1 μm or more, the capacitance between the terminal electrodes 11a, 11b and the lower electrode 4 with the protective layer 8 in between is equal to that between the lower electrode 4 and the upper electrode 6 with the dielectric film 5 in between. This makes it possible to reduce the influence of voltage fluctuations and frequency characteristics of the capacitance across the protective layer 8 on the entire capacitor. By setting the thickness of the protective layer 8 to 20 μm or less, it becomes possible to use a low-viscosity protective layer material, the thickness can be easily controlled, and variations in capacitance can be suppressed.

The material constituting the protective layer 8 is not particularly limited, but preferably includes a resin material such as polyimide.

Next, a pattern of the first terminal electrode 11a and the second terminal electrode 11b (hereinafter also collectively referred to as "terminal electrode 11") is formed (FIG. 2(h)).

In this embodiment, the terminal electrodes 11a, 11b are formed on the through holes 15a, 15b and the protective layer 8 around the through holes. That is, the outer edge of the terminal electrode exists on the upper surface of the protective layer 8.

The terminal electrodes 11a and 11b can be formed using, for example, the lift-off method, plating method, or semi-additive method, similar to the lower electrode 4.

The material constituting the terminal electrodes 11a, 11b is not particularly limited, but preferably includes Cu, Ni, Ag, Au, or Al.

In a preferred embodiment, the terminal electrode may have a plating layer of Ni, Au, etc., and preferably has an Au plating layer on the outermost surface.

In a preferred embodiment, the material constituting the terminal electrodes 11a, 11b has a lower resistivity than the materials of the lower electrode 4 and the upper electrode 6, and may be, for example, Cu or Al.

The capacitor 1a according to the first embodiment is manufactured as described above.

The thickness of the entire obtained capacitor 1a (including the substrate 2) is preferably 10 μm or more and 300 μm or less, more preferably 20 μm or more and 200 μm or less.

(Second embodiment)
FIG. 3 shows a cross-sectional view of the capacitor 1b of the second embodiment.

As shown in FIG. 3, in the capacitor 1b of the second embodiment, the lower electrode 4 has an inverted tapered shape, the shield metal 7 is provided along the taper, and the moisture-resistant film 9 is provided on top of the shield metal 7. Other than the provision, the capacitor 1a has the same configuration as the capacitor 1a of the first embodiment.

The capacitor 1b as described above is manufactured, for example, as follows.

First, the substrate 2 is prepared in the same manner as in the first embodiment. Next, an insulating film 3 is formed on the entire substrate 2 (FIG. 4(a)). Next, a pattern for the lower electrode 4 is formed on the insulating film 3 (FIG. 4(a)).

The lower electrode 4 has an inverted tapered shape. Here, the inverted tapered shape refers to a shape in which the side surface of the lower electrode 4 is inclined outward as it moves away from the insulating film 3 (or substrate 2) (that is, as it moves upward in the drawing).

The inclination of the inverted tapered shape is preferably 30° or more and 85° or less, more preferably 40° or more and 70° or less, and even more preferably 45° or more and 60° or less with respect to the bottom surface of the lower electrode 4 (the surface in contact with the insulating film 3). ° or less. By setting the inclination of the inverted tapered shape within the above range, the area below the taper becomes wider, making it easier to form a shield electrode in the area below the taper, and also making it easier to form a larger shield.

Note that the entire lower electrode 4 has a reverse tapered shape (that is, all side surfaces are inclined); however, in the capacitor of the present disclosure, the reverse taper of the lower electrode 4 does not necessarily have to exist on all side surfaces. good. For example, the reverse taper of the lower electrode 4 may exist only on one side of the lower electrode 4, or only on two sides, for example, only on two opposing sides.

The method for forming the pattern of the lower electrode 4 can be, for example, a lift-off method, a plating method, photolithography, etching, or the like.

Next, a dielectric film 5 is formed on the lower electrode 4 (FIG. 4(b)). The dielectric film 5 can be formed in the same manner as in the first embodiment.

Next, a metal layer 14 is formed on the dielectric film 5 (FIG. 4(c)), and then the metal layer 14 is processed (FIG. 4(d)) to form the upper electrode 6 and the shield metal 7. can be formed.

The metal layer 14 can be formed in the same manner as the upper electrode 6 in the first embodiment.

The metal layer 14 can be processed in the same manner as the metal layer 13 in the first embodiment, and for example, dry etching can be used.

According to the above method, the upper electrode 6 and the shield metal 7 can be formed simultaneously.

Next, a moisture-resistant film 9 is formed on the dielectric film 5, the upper electrode 6, and the metal shield 7 (FIG. 4(e)).

In this embodiment, the moisture-resistant film 9 is provided to cover the dielectric film 5, the upper electrode 6, and the metal shield 7. By providing a moisture-resistant film, corrosion of the upper electrode due to moisture can be prevented, and moisture resistance is improved, which in turn improves reliability.

The moisture-resistant film 9 can be formed by, for example, sputtering, CVD, or the like. Patterning can be performed, for example, by photolithography, etching, or the like.

The thickness of the moisture-resistant film 9 is not particularly limited, but is preferably 0.5 μm or more and 10 μm or less, more preferably 1 μm or more and 3 μm or less. By setting the thickness of the moisture-resistant film 9 to 0.5 μm or more, moisture resistance can be ensured more reliably. By setting the thickness of the moisture-resistant film 9 to 10 μm or less, the mechanical strength due to film stress is reduced, and deformation of the capacitor can be prevented.

The material constituting the moisture-resistant film 9 is not particularly limited, but preferably includes moisture-resistant materials such as Si ₃ N ₄ and SiO ₂ .

Next, the substrate surface is treated to expose the lower electrode 4 and the upper electrode 6 in order to connect the terminal electrodes 11a and 11b to the lower electrode 4 and the upper electrode 6 (FIG. 4(f)).

Such treatment can be performed by etching or the like.

Next, similar to the first embodiment, a protective layer 8 and a terminal electrode 11 are formed.

The capacitor 1b according to the second embodiment is manufactured as described above.

Although the capacitor of the present disclosure has been described above, the capacitor of the present disclosure can be modified in various ways.

For example, in one aspect, the capacitor 1a of the first embodiment may be further provided with a moisture-resistant film as provided in the capacitor 1b of the second embodiment. Specifically, a moisture-resistant film may be provided between the dielectric film 5 and the upper electrode 6 of the capacitor 1a and the protective layer 8.

In another embodiment, a seed layer may be formed on the protective layer 8, and then a terminal electrode may be formed.

By forming a seed layer on the protective layer before forming the terminal electrode, the adhesion of the terminal electrode can be improved.

The seed layer can be formed by, for example, sputtering, electroless plating, or the like.

The thickness of the seed layer is not particularly limited, but is preferably 0.5 μm or more and 10 μm or less, more preferably 1 μm or more and 3 μm or less. By setting the thickness of the seed layer to 0.5 μm or more, subsequent formation of terminal electrodes becomes easier. By setting the thickness of the seed layer to 10 μm or less, it is possible to suppress a decrease in the mechanical strength of the element due to stress in the seed layer, and it is possible to suppress deformation of the capacitor.

The material constituting the seed layer is not particularly limited, but preferably includes Ti and Cu.

Further, a second protective layer may be provided as the outermost layer. By providing the second protective layer on the outermost surface of the capacitor, it is possible to prevent the terminal electrode from being eaten away by solder and chipping during dicing, thereby improving reliability. Here, the "outermost layer" refers to a layer provided at the outermost side of the surface where the terminal electrode 11 is exposed.

The second protective layer can be formed using the same material and method as the protective layer 8 described above.

Since the capacitor of the present disclosure has high mountability, it can be suitably used in various electronic devices.

1a, 1b... Capacitor 2... Substrate 3... Insulating film 4... Lower electrode 5... Dielectric film 5a... Lower dielectric film 5b... Upper dielectric film 6... Upper electrode 7... Shield metal 8... Protective layer 9... Moisture resistant film 11a ...First terminal electrode 11b...Second terminal electrode 13...Metal layer 14...Metal layer 15a, 15b...Through hole

Claims (5)

A substrate and
a lower electrode provided on the substrate;
a dielectric film provided on the lower electrode;
an upper electrode provided on the dielectric film;
a first terminal electrode connected to the lower electrode;
a second terminal electrode connected to the upper electrode, the lower electrode, the dielectric film, and the upper electrode forming a capacitor structure,
Further, a shield metal is provided around the entire circumference near the end surface of the lower electrode,
The upper electrode exists only in the upper surface direction of the lower electrode ,
The cross-sectional shape of the shield metal is approximately triangular.
A capacitor characterized by: The capacitor according to claim 1, wherein the shield metal is provided around an end surface of the lower electrode. 3. The capacitor according to claim 1, wherein the shield metal is made of a magnetic metal. 4. The capacitor according to claim 1, wherein the lower electrode has an inverted tapered shape. 5. The capacitor according to claim 1, wherein the lower electrode and the shield metal are made of the same material.

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