JP7300935B2 - Coating and developing equipment - Google Patents

Description

The present disclosure relates to coating and developing apparatus.

2. Description of the Related Art Conventionally, there has been known a coating and developing apparatus that performs a resist coating process on a substrate such as a semiconductor wafer and develops the substrate by supplying a developing solution to the substrate after being exposed by an exposure apparatus.

JP 2009-231624 A

The present disclosure provides a technique capable of simplifying the device configuration in a coating and developing device.

A coating and developing apparatus according to one aspect of the present disclosure comprises six or more processing blocks that are stacked. The six or more processing blocks include two first processing blocks adjacent in the stacking direction, two second processing blocks adjacent in the stacking direction, and two third processing blocks adjacent in the stacking direction. The two first processing blocks include a plurality of coating processing units that perform coating processing for coating the substrates with resist, and a first transport unit that transports the substrates in the two first processing blocks. The two second processing blocks are one of a plurality of developing processing units and a plurality of coating processing units that develop a substrate coated with a resist by the coating processing unit and subjected to exposure processing by the exposure device. and a second transfer section for transferring substrates in the two second processing blocks. The two third processing blocks include a plurality of developing processing units and a third transport unit that transports substrates in the two third processing blocks.

According to the present disclosure, the device configuration can be simplified in the coating and developing device.

FIG. 1 is a schematic plan view of a coating and developing apparatus according to an embodiment. FIG. 2 is a schematic side view of the coating and developing device according to the embodiment. FIG. 3 is a schematic side view of the coating and developing device according to the embodiment. FIG. 4 is a schematic side view of a processing station according to an embodiment; FIG. 5 is a schematic side view of the first delivery station, processing station and second delivery station according to the embodiment. FIG. 6 is a diagram showing an example of the flow of wafers from being taken out of the cassette to being loaded into the exposure apparatus. FIG. 7 is a diagram showing an example of the flow of wafers from being taken out of the cassette to being loaded into the exposure apparatus. FIG. 8 is a diagram showing an example of the flow of wafers taken out of the cassette and loaded into the exposure apparatus. FIG. 9 is a diagram showing an example of the flow of wafers from being taken out of the exposure apparatus to being accommodated in the cassette. FIG. 10 is a diagram showing an example of the flow of wafers taken out from the exposure apparatus and stored in the cassette. FIG. 11 is a diagram showing an example of the flow of wafers from being taken out of the exposure apparatus to being accommodated in the cassette. FIG. 12 is a diagram showing an example of the flow of wafers from being taken out of the exposure apparatus to being accommodated in the cassette. FIG. 13 is a diagram showing an example of a specific configuration of front-side processing blocks. FIG. 14 is a diagram showing a configuration example of the ceiling portion of the coating and developing apparatus. FIG. 15 is a schematic side view of a coating and developing device according to a modification.

Embodiments for carrying out the coating and developing apparatus according to the present disclosure (hereinafter referred to as "embodiments") will be described in detail below with reference to the drawings. Note that the coating and developing apparatus according to the present disclosure is not limited to this embodiment. Further, each embodiment can be appropriately combined within a range that does not contradict the processing contents. Also, in each of the following embodiments, the same parts are denoted by the same reference numerals, and overlapping descriptions are omitted.

Further, in the embodiments described below, expressions such as "constant", "perpendicular", "perpendicular" or "parallel" may be used, but these expressions are strictly "constant", "perpendicular", " It does not have to be "perpendicular" or "parallel". That is, each of the expressions described above allows deviations in manufacturing accuracy, installation accuracy, and the like.

FIG. 1 is a schematic plan view of a coating and developing apparatus according to an embodiment. 2 and 3 are schematic side views of the coating and developing apparatus according to the embodiment. FIG. 4 is a schematic side view of a processing station according to an embodiment; FIG. 5 is a schematic side view of the first delivery station, processing station and second delivery station according to the embodiment.

As shown in FIG. 1, the coating and developing apparatus 1 according to the embodiment includes a loading/unloading station S1, a first transfer station S2, a processing station S3, a second transfer station S4, and an interface station S5. These are connected in the horizontal direction (here, the Y-axis direction) in the order of loading/unloading station S1, first delivery station S2, processing station S3, second delivery station S4, and interface station S5. The coating and developing apparatus 1 also includes a control device 6 .

<Loading/unloading station S1>
The loading/unloading station S1 includes a plurality of mounting tables 11 on which the cassettes C can be placed, a plurality of opening/closing sections 12 provided on the wall surface in front of the mounting tables 11, and wafers from the cassettes C through the opening/closing sections 12. A transport section 13 for taking out W is provided.

The cassette C is a container capable of accommodating a plurality of semiconductor wafers (hereinafter referred to as wafers W). The transfer section 13 transfers wafers W between a plurality of first transfer sections TRS1-1 and TRS1-2 arranged in a first shelf unit 21, which will be described later, and the cassette C (see FIG. 5). The transfer unit 13 includes a holding unit that holds the wafer W. As shown in FIG. In addition, the conveying unit 13 can move in the horizontal direction and the vertical direction, and can rotate around the vertical axis.

<First Delivery Station S2>
A first shelf unit 21, a plurality of transport sections 22, and a second shelf unit 23 are provided in the first delivery station S2. The first shelf unit 21 is arranged in the center of the first delivery station S2, and a plurality of (here, two) conveying units 22 are arranged at positions facing each other with the first shelf unit 21 interposed therebetween. there is Also, the second shelf unit 23 is arranged on the side opposite to the first shelf unit 21 when viewed from the transport section 22 . The first shelf unit 21 is arranged in a position accessible by the transport part 13 and the two transport parts 22 , whereas the second shelf unit 23 is arranged in a position accessible only by one transport part 22 . be.

A plurality of processing units are arranged side by side in the height direction on the first shelf unit 21 . For example, as shown in FIG. 2, the first shelf unit 21 includes a first transfer section TRS1-1 and a plurality (here, two) of first transfer sections TRS1-1 at a height position corresponding to a first treatment layer L1, which will be described later. Cooling units CL1-1 and CL1-2 are arranged. For example, the first cooling unit CL1-2 is arranged at the height position of the processing block B1 of the processing blocks B1 and B2 forming the first processing layer L1. Also, the first cooling part CL1-2 and the first transfer part TRS1-1 are arranged at the height position of the processing block B2 in the order of the first cooling part CL1-2 and the first transfer part TRS1-1 from the bottom. .

Also, in the first shelf unit 21, a first transfer section TRS1-2 and a plurality (here, two) of first cooling sections CL1-3 and CL1 are provided at a height position corresponding to a second treatment layer L2, which will be described later. -4 is placed. For example, of the processing blocks B3 and B4 constituting the second processing layer L2, the first transfer section TRS1-2 and the first cooling section CL1-3 are positioned at the height of the processing block B3, and the first transfer section TRS1 is positioned from below. -2 and the first cooling part CL1-3. Also, the first cooling unit CL1-4 is arranged at the height position of the processing block B4.

In the first shelf unit 21, a plurality (here, two) of first cooling units CL1-5 and CL1-6 are arranged at height positions corresponding to the third treatment layer L3. For example, of the processing blocks B5 and B6 forming the third processing layer L3, the first cooling units CL1-5 and CL1-6 are positioned at the height of the processing block B5, and the first cooling units CL1-5 and CL1 are located at the height of the processing block B5. They are arranged in the order of -6.

The first transfer units TRS1-1 and TRS1-2 have, for example, a rectangular housing, and can accommodate the wafer W inside the housing. Also, the first transfer units TRS1-1 and TRS1-2 are accessible by a plurality of transport units (here, transport units 13, 22, 31 to 33). The transfer units TRS1-1 and TRS1-2 may have a temperature control mechanism for adjusting the temperature of the wafer W to a predetermined temperature.

The transfer section 22 includes a holding section that holds the wafer W. As shown in FIG. The transport unit 22 is capable of horizontal and vertical movement and rotation about a vertical axis. transport with

A plurality of processing units are arranged side by side in the height direction on the second shelf unit 23 . For example, as shown in FIG. 3, in the second shelf unit 23, a plurality (here, four) of adhesion treating parts AD are arranged at height positions corresponding to the third treated layer L3. The adhesion processing part AD performs an adhesion process of heat-treating the wafer W in a vapor atmosphere such as hexamethyldisilazane (HMDS) so as to improve the adhesion between the wafer W and the resist film.

Although the case where the plurality of adhesion processing units AD are arranged at the height position corresponding to the third processing layer L3 is illustrated here, the plurality of adhesion processing units AD may be arranged on the first processing layer L1 or the second processing layer L1. It may be arranged at a height position corresponding to the layer L2.

<Processing Station S3: Processing Blocks B1 to B6>
As shown in FIGS. 1-4, the processing station S3 comprises six stacked processing blocks B1-B6 and a transport block BM. The transport block BM extends along the direction in which the loading/unloading station S1 to the processing station S3 are arranged (here, the Y-axis direction). In the transport block BM, a transport unit 31 corresponding to the first processing layer L1, a transport unit 32 corresponding to the second processing layer L2, and a transport unit 33 corresponding to the third processing layer L3, which will be described later, are provided in processing blocks B1 to B6. are arranged side by side in the height direction, which is the stacking direction of (see FIG. 4).

Each of the processing blocks B1-B6 includes front-side processing blocks B1F-B6F and back-side processing blocks B1B-B6B. The front-side processing blocks B1F to B6F, the back-side processing blocks B1B to B6B, and the transport block BM are arranged along a direction perpendicular to the direction in which the loading/unloading stations S1 to interface stations S5 are arranged (here, the X-axis direction). placed side by side. Further, the front-side processing blocks B1F to B6F and the back-side processing blocks B1B to B6B are arranged at positions facing each other with the transport block BM interposed therebetween. Specifically, the front-side processing blocks B1F to B6F are arranged on the X-axis positive direction side of the transport block BM, and the back-side processing blocks B1B to B6B are arranged on the X-axis negative direction side of the transport block BM.

As shown in FIG. 2, the front processing blocks B1F to B6F are stacked in this order from the bottom. Among the front-side processing blocks B1F to B6F, a plurality of coating processing units 35 are arranged side by side along the Y-axis direction in front-side processing blocks B1F and B2F belonging to a first processing layer L1, which will be described later. Three coating processing units 35 are provided in each of the front processing blocks B1F and B2F.

The coating processor 35 coats the wafer W with a resist. Specifically, the coating processing unit 35 includes, for example, a holding unit that holds and rotates the wafer W, and a cup that surrounds the holding unit. By doing so, a resist film is formed on the surface of the wafer W. Next, as shown in FIG.

Further, among the front-side processing blocks B1F to B6F, a plurality of development processing units 37 are arranged side by side along the Y-axis direction in front-side processing blocks B3F and B4F belonging to a second processing layer L2, which will be described later. The plurality of development processing units 37 are provided three each in the front side processing blocks B3F and B4F.

The development processing unit 37 is a processing unit that performs development processing on the wafer W after the exposure processing. Specifically, the development processing unit 37 includes a holding unit that holds and rotates the wafer W, a cup that surrounds the holding unit, and the like, and supplies the developer to the surface of the wafer W from a chemical nozzle (not shown). . After that, the development processor 37 washes away the developer remaining on the surface of the wafer W with a cleaning liquid from a cleaning liquid supply mechanism (not shown), and then dries the wafer W by rotating the wafer W at high speed using the holding section. .

Further, among the front-side processing blocks B1F to B6F, a plurality of development processing units 37 are arranged side by side along the Y-axis direction in front-side processing blocks B5F and B6F belonging to a third processing layer L3, which will be described later. The plurality of development processing units 37 are provided three each in the front side processing blocks B5F and B6F.

As shown in FIG. 3, the back-side processing blocks B1B to B6B are stacked in this order from the bottom. The back-side processing blocks B1B to B6B are arranged at the same height positions as the front-side processing blocks B1F to B6F, respectively.

Among the back-side processing blocks B1B to B6B, each of the back-side processing blocks B1B and B2B belonging to the first processing layer L1 includes a plurality of first heating units BK1 for heating the wafers W and temporary placement of the wafers W thereon. A buffer section BF, which is a storage place, is arranged.

A plurality of first heating units BK1 and buffer units BF (here, two stages) can be stacked in the height direction for one processing block B1 to B6, for example. Also, a plurality of (here, four) first heating units BK1 and buffer units BF can be arranged side by side in the Y-axis direction for one processing block B1 to B6, for example.

For example, one buffer section BF and three first heating sections BK1 are arranged side by side in the Y-axis direction in the lower stage of the back-side processing block B1B. Similarly, one buffer section BF and three first heating sections BK1 are arranged side by side in the Y-axis direction also in the upper stage of the back-side processing block B1B. The same applies to the back-side processing block B2B.

A plurality of second heating units BK2 for heating the wafers W are arranged in each of the back-side processing blocks B3B and B4B belonging to the second processing layer L2 among the back-side processing blocks B1B to B6B. For example, three second heating units BK2 are arranged side by side in the Y-axis direction in the lower stage of the back-side processing block B3B. Similarly, three second heating units BK2 are also arranged side by side in the Y-axis direction in the upper stage of the back-side processing block B3B. The same applies to the back-side processing block B4B.

A plurality of third heating units BK3 for heating the wafers W are arranged in the back-side processing blocks B5B and B6B belonging to the third processing layer L3 among the back-side processing blocks B1B to B6B. For example, three third heating units BK3 are arranged side by side in the Y-axis direction in the lower stage of the back-side processing block B5B. Similarly, three third heating units BK3 are also arranged side by side in the Y-axis direction in the upper stage of the back-side processing block B5B. The same applies to the back-side processing block B6B.

In addition, in the coating and developing apparatus 1 according to the embodiment, the plurality of heating units BK1 to BK3 arranged in the same processing blocks B1 to B6 are connected to the same breaker. That is, the six first heating units BK1 arranged in the processing block B1 are connected to corresponding one breaker (first breaker), and the six first heating units BK1 arranged in the processing block B2 are It is connected to one breaker (second breaker) corresponding to these. Similarly, the six second heating units BK2 arranged in the processing block B3 are connected to one breaker (third breaker) corresponding thereto, and the six second heating units BK2 arranged in the processing block B4 are connected to , are connected to one breaker (fourth breaker) corresponding to them. Similarly, the six third heating units BK3 arranged in the processing block B5 are connected to one breaker (fifth breaker) corresponding thereto, and the six third heating units BK3 arranged in the processing block B6 are connected to , are connected to one breaker (sixth breaker) corresponding to them. By configuring in this way, the number of parts can be suppressed. Also, maintenance of the heating units BK1 to BK3 can be safely performed for each of the processing blocks B1 to B6.

<Processing Station S3: Transport Block BM>
The transport block BM is arranged between the front-side processing blocks B1F to B6F and the back-side processing blocks B1B to B6B. As shown in FIG. 4, in the transport block BM, a plurality (here, three) of transport units 31 to 33 are arranged side by side in the height direction. Specifically, the conveying units 31 to 33 are arranged in this order from the bottom. The transfer units 31 to 33 have holding units that hold the wafers W thereon. In addition, the conveying units 31 to 33 can move in the horizontal direction and the vertical direction and turn around the vertical axis.

The transport unit 31 is arranged at a height position of the processing block B1 and the processing block B2, and takes charge of transporting the wafer W in the processing block B1 and the processing block B2. Specifically, the transfer unit 31 can transfer the wafer W within the processing block B1, the wafer W within the processing block B2, and the wafer W between the processing block B1 and the processing block B2. .

The transfer section 32 is arranged at a height position of the processing block B3 and the processing block B4, and takes charge of transferring the wafer W in the processing block B3 and the processing block B4. Specifically, the transfer unit 32 can transfer the wafer W within the processing block B3, the wafer W within the processing block B4, and the wafer W between the processing block B3 and the processing block B4. .

The transfer section 33 is arranged at a height position of the processing block B5 and the processing block B6, and takes charge of transferring the wafer W in the processing block B5 and the processing block B6. Specifically, the transfer unit 33 can transfer the wafer W within the processing block B5, the wafer W within the processing block B6, and the wafer W between the processing block B5 and the processing block B6. .

As described above, the coating and developing apparatus 1 according to the embodiment has two adjacent processing blocks in the stacking direction (height direction), that is, the processing blocks B1 and B2, the processing blocks B3 and B4, and the processing blocks B5, Conveyance units 31 to 33 are provided for each B6. In other words, the coating and developing apparatus 1 has a configuration including a plurality of processing layers (here, three) in which two processing blocks share one conveying section 31 to 32 . Therefore, according to the coating and developing apparatus 1 according to the embodiment, the apparatus configuration can be simplified as compared with, for example, a configuration in which one transport section is provided for one processing block B1 to B6.

<Second Delivery Station S4>
A third shelf unit 41 and a transport section 42 are provided in the second delivery station S4. The third shelf unit 41 is arranged in the center of the second delivery station S4 and is accessible by the transport sections 31 to 33, the transport section 42 and the transport section 51 provided in the interface station S5 described above.

A plurality of processing units are arranged side by side in the height direction on the third shelf unit 41 . For example, as shown in FIG. 5, the third shelf unit 41 includes a second transfer section TRS2-1 and a plurality (here, two) of second cooling sections at a height position corresponding to the first treatment layer L1. CL2-1 and CL2-2 are arranged. For example, the second cooling unit CL2-1 is arranged at the height position of the processing block B1 of the processing blocks B1 and B2 forming the first processing layer L1. Also, the second cooling unit CL2-1 and the second transfer unit TRS2-1 are arranged at the height position of the processing block B2 in the order of the second cooling unit CL2-1 and the second transfer unit TRS2-1 from the bottom. .

Also, in the third shelf unit 41, a second transfer section TRS2-2 and a plurality (here, two) of peripheral exposure processing sections WEE are arranged at a height position corresponding to the second processing layer L2. The peripheral exposure processing unit WEE performs peripheral exposure processing for selectively exposing only the edge portion of the wafer W, for example.

For example, of the processing blocks B3 and B4 forming the second processing layer L2, one peripheral exposure processing section WEE is arranged at the height position of the processing block B3. Also, the second transfer section TRS2-2 and the edge exposure processing section WEE are arranged at the height position of the processing block B4 in the order of the second transfer section TRS2-2 and the edge exposure processing section WEE from the bottom.

Also, in the third shelf unit 41, a second delivery section TRS2-3 is arranged at a height position corresponding to the third treatment layer L3. The second transfer section TRS2-3 is arranged, for example, at a height position of the processing block B5 among the processing blocks B5 and B6 forming the third processing layer L3.

The second transfer units TRS2-1, TRS2-2, and TRS2-3 each have, for example, a rectangular housing, and the wafer W can be accommodated inside the housing. Further, the second delivery units TRS2-1, TRS2-2, and TRS2-3 can be accessed by a plurality of transport units (here, transport units 31 to 33, 42, and 51). The transfer units TRS2-1, TRS2-2, and TRS2-3 may have a temperature control mechanism for adjusting the temperature of the wafer W to a predetermined temperature.

The transport section 42 includes a holding section that holds the wafer W. As shown in FIG. The transfer section 42 is movable in the horizontal direction and the vertical direction, and transfers the wafer W held by the holding section between the plurality of processing sections arranged in the third shelf unit 41 .

<Interface station S5>
A transport section 51 and a fourth shelf unit 52 are provided in the interface station S5. The transport unit 51 transports the wafer W between the plurality of processing units arranged in the third shelf unit 41, the fourth shelf unit 52, and the exposure apparatus EXP (see FIG. 5). The transport unit 51 includes a holding unit that holds the wafer W. As shown in FIG. In addition, the transport unit 51 can move in the horizontal direction and the vertical direction, and can rotate around the vertical axis.

A plurality of processing units are arranged side by side in the height direction on the fourth shelf unit 52 . For example, a plurality of buffer sections BF are arranged in the fourth shelf unit 52 (see FIG. 8).

<Control device 6>
As shown in FIG. 1 , the control device 6 includes a control section 61 and a storage section 62 . Control unit 61 is, for example, a computer and has a computer-readable storage medium. The storage medium stores programs for controlling various processes executed in the coating and developing apparatus 1 .

The control unit 61 controls the operation of the coating and developing apparatus 1 by reading out and executing programs stored in the storage medium. The program may be stored in a computer-readable storage medium or may be installed in the storage medium of the control unit 61 from another storage medium.

Examples of computer-readable storage media include hard disks (HD), flexible disks (FD), compact disks (CD), magnet optical disks (MO), and memory cards.

<Example of Specific Operation of Coating and Developing Device 1>
Next, an example of specific operations of the coating and developing apparatus 1 will be described with reference to FIGS. 6 to 12. FIG. 6 to 8 are diagrams showing an example of the flow of wafers W taken out of the cassette C and loaded into the exposure apparatus EXP. 9 to 12 are diagrams showing an example of the flow of wafers W taken out from the exposure apparatus EXP and stored in the cassette C. FIG.

As shown in FIG. 6, in the coating and developing apparatus 1 according to the embodiment, the transfer section 13 takes out the wafer W from the cassette C mounted on the mounting table 11 and transfers it to the first transfer section TRS1- of the first shelf unit 21. 1. Subsequently, the transfer section 22 takes out the wafer W from the first transfer section TRS1-1 and transfers it to the adhesion processing section AD of the second shelf unit 23, where the adhesion processing section AD performs the adhesion processing on the wafer W. FIG.

Subsequently, as shown in FIG. 7, the transfer unit 22 takes out the wafer W from the adhesion processing unit AD and transfers it to the first cooling unit CL1-1, and the first cooling unit CL1-1 sets the temperature of the wafer W in advance. adjusted (cooled) to the specified temperature. Subsequently, the transfer section 31 corresponding to the first processing layer L1 takes out the wafer W from the first cooling section CL1 and transfers it to the coating processing section 35, where the wafer W is coated.

Subsequently, the transfer section 31 takes out the wafer W after coating processing from the coating processing section 35 and transfers it to the first heating section BK1, where the first heating section BK1 heats the wafer W to a preset temperature. Thereafter, the transfer section 31 takes out the wafer W from the first heating section BK1 and transfers it to the buffer section BF. Then, the transfer unit 31 takes out the wafer W from the buffer unit BF, transfers it to the second cooling unit CL2-2 of the third shelf unit 41, and the second cooling unit CL2-2 lowers the temperature of the wafer W to the preset temperature. adjusted (cooled) to

Subsequently, as shown in FIG. 8, the transfer unit 42 takes out the wafer W from the second cooling unit CL2-2 and transfers it to the edge exposure processing unit WEE. I do. Subsequently, the transfer section 51 takes out the wafer W from the peripheral exposure processing section WEE and transfers it to the buffer section BF of the fourth shelf unit 52 . After that, the transfer unit 51 takes out the wafer W from the buffer unit BF and transfers it to the second cooling unit CL2-1, where the second cooling unit CL2-1 adjusts (cools) the wafer W to a preset temperature. Then, the transport unit 51 takes out the wafer W from the second cooling unit CL2-1 and transports it to the exposure apparatus EXP, where the wafer W is exposed.

Subsequently, as shown in FIG. 9, the transfer section 51 takes out the wafer W after the exposure processing from the exposure apparatus EXP and places it on the second transfer section TRS2-1 of the third shelf unit 41. As shown in FIG. After that, the transfer section 51 takes out the wafer W from the second transfer section TRS2-1 and places it on the buffer section BF of the fourth shelf unit 52. FIG. Then, the transfer unit 51 takes out the wafer W from the buffer unit BF, and the second transfer unit TRS2-2 corresponding to the second processing layer L2 or the second transfer unit TRS2-3 corresponding to the third processing layer L3 (here, , second transfer section TRS2-3).

Subsequently, as shown in FIG. 10, the transfer section 33 corresponding to the third processing layer L3 takes out the wafer W from the second transfer section TRS2-3 and transfers it to the third heating section BK3. The wafer W is heated to a preset temperature. Subsequently, the transfer unit 33 takes out the wafer W from the third heating unit BK3 and transfers it to the first cooling unit CL1-5 of the first shelf unit 21, where the first cooling unit CL1-5 receives the wafer W. Adjust (cool) to temperature. After that, the transfer unit 33 takes out the wafer W from the first cooling unit CL1-5 and transfers it to the development processing unit 37, where the wafer W is subjected to development processing.

Subsequently, as shown in FIG. 11, the transfer section 33 takes out the wafer W from the development processing section 37 and transfers it to the third heating section BK3, which heats the wafer W to a preset temperature. . Subsequently, the transfer unit 33 takes out the wafer W from the third heating unit BK3 and transfers it to the first cooling unit CL1-6 of the first shelf unit 21, where the first cooling unit CL1-6 receives the wafer W. Adjust (cool) to temperature.

Subsequently, as shown in FIG. 12, the transfer section 22 transfers the wafer W from the first cooling section CL1-6 to the first transfer section TRS1-1. Then, the transfer section 13 takes out the wafer W from the first transfer section TRS1 and stores it in the cassette C. As shown in FIG. As a result, a series of substrate processing (coating, coating processing) by the coating and developing apparatus 1 is completed.

<Specific Configuration of Front Side Processing Blocks B1F to B6F>
Next, an example of a specific configuration of the front-side processing blocks B1F to B6F will be described with reference to FIG. FIG. 13 is a diagram showing an example of a specific configuration of front-side processing blocks B1F to B6F. Note that FIG. 13 shows a configuration example of the front-side processing block B6F as an example, but the same applies to the other front-side processing blocks B1F to B5F.

As shown in FIG. 13, the front-side processing block B6F includes a housing 300. As shown in FIG. In other words, the area surrounded by the housing 300 is the front-side processing block B6F, and the plurality of development processing units 37 are housed inside the housing 300 .

The housing 300 has four pillars 301 positioned at the four corners of the housing 300, two side panels 302 arranged between the two pillars 301 arranged along the X-axis direction, and two side panels 302 arranged along the Y-axis direction. A plurality of beams 303 horizontally spanned between two pillars 301 arranged side by side. For example, one beam portion 303 is provided vertically between two column portions 301 arranged along the Y-axis direction. That is, when the housing 300 is viewed from the X-axis direction, a rectangular frame is formed by the two left and right pillars 301 and the two upper and lower beams 303 .

The frames are formed one each on the X-axis negative direction side where the conveying unit 33 is arranged and on the X-axis positive direction side, that is, the maintenance side, which is the opposite side. Of these, the frame body on the X-axis negative direction side where the transport section 33 is arranged is provided with a plurality of (here, two) intermediate column sections 304 extending in the vertical direction. The intermediate column portion 304 spans between the upper and lower beam portions 303 . Further, the intermediate column portion 304 is arranged between the plurality of development processing portions 37 . On the other hand, the intermediate column portion 304 is not provided on the frame on the X-axis positive direction side, that is, on the maintenance side. That is, no column member other than the column portions 301 is provided between the two column portions 301 on the left and right.

In this manner, the intermediate column portion 304 is provided only on the X-axis negative direction side where the conveying portion 33 is arranged, and the intermediate column portion 304 is not provided on the opposite side, that is, the X-axis positive direction side, that is, the maintenance side. . By omitting the intermediate column portion 304 on the maintenance side, it becomes easier to pass members, a worker's body, etc. across the beam portion 303 in the X-axis direction. Therefore, it is possible to reduce the width (width in the Y-axis direction) of the housing 300 while minimizing the space for performing various maintenance such as cup replacement and filter replacement.

Further, as shown in FIG. 13, on the side surface of the housing 300 in the Y-axis direction, there are provided a plurality of substrates through which various processing liquids (resist, developer, etc.) to be supplied to the coating processing section 35 and the development processing section 37 are circulated. A duct portion 350 in which piping is concentrated is arranged. By providing the duct portion 350 at such a position, for example, the easiness of assembly and maintenance of the coating and developing device 1 can be improved.

<Configuration Example of Ceiling Part of Coating/Developing Device 1>
Next, a configuration example of the ceiling portion of the coating and developing apparatus 1 will be described with reference to FIG. FIG. 14 is a diagram showing a configuration example of the ceiling portion of the coating and developing apparatus 1. As shown in FIG.

As shown in FIG. 14, a mounting table 400 is provided on the ceiling of the coating and developing apparatus 1 . The mounting table 400 includes a base portion 401 and a plurality of strut portions 402 that support the base portion 401 at a predetermined height.

Various electrical components 410 are mounted on the base portion 401 . By separating the electrical component 410 from the ceiling portion of the coating and developing device 1 in this way, it is possible to reduce the influence of heat generated from the heating units BK1 to BK3, for example.

Various ducts 420 are placed in the space formed between the ceiling portion and the base portion 401 of the coating and developing apparatus 1 . Thus, by arranging the electrical component 410 above the base portion 401 and arranging the duct 420 below the base portion 401, it is possible to suppress interference between the electrical component 410 and the duct 420. Work can be facilitated. Further, by arranging the electrical component 410 and the duct 420 so as to overlap each other in the height direction, an increase in footprint can be suppressed.

(Other embodiments)
In the above-described embodiment, an example in which the coating and developing device has six stacked processing blocks has been described, but the coating and developing device may have seven or more processing blocks. Also, the number of processing layers provided in the coating and developing apparatus may be four or more.

Further, in the above-described embodiment, a plurality of coating processing units are arranged in one of the three processing layers provided in the coating and developing device, and a plurality of developing processing units are arranged in the remaining two layers. explained. The present invention is not limited to this, and a plurality of development processing units may be arranged in one of the three processing layers, and a plurality of coating processing units may be arranged in the remaining two.

Further, in the above-described embodiment, an example in which a plurality of coating processing units are arranged in the lowest processing layer of the three processing layers provided in the coating and developing apparatus has been described, but the present invention is not limited to this, for example, A plurality of coating processing units may be arranged in the uppermost processing layer among the three processing layers provided in the developing device.

Further, in the above-described embodiment, an example in which the two processing blocks B3 and B4 constituting the second processing layer L2 include a plurality of developing processing units 37 has been described. A plurality of coating processing units 35 may be provided instead of the processing unit 37 . FIG. 15 is a schematic side view of the coating and developing apparatus. As shown in FIG. 15, the coating and developing apparatus 1A according to the modification includes a plurality of coating processing sections 35 in the front processing blocks B3F and B4F belonging to the second processing layer L2. The plurality of coating processing units 35 are arranged side by side along the Y-axis direction, three each in the front-side processing blocks B3F and B4F.

As described above, the coating and developing apparatus (coating and developing apparatus 1 as an example) according to the embodiment includes six or more stacked processing blocks (processing blocks B1 to B6 as an example). The six or more processing blocks include two first processing blocks adjacent in the stacking direction (processing blocks B1 and B2 as an example) and two second processing blocks adjacent in the stacking direction (processing blocks B3 and B3 as an example). B4) and two third processing blocks adjacent in the stacking direction (eg, processing blocks B5 and B6). The two first processing blocks include a plurality of coating processing units (three coating processing units 35 as an example) that apply resist to substrates (wafers W as an example), and substrates that are transported in the two first processing blocks. and a first conveying section (conveying section 31 as an example). The two second processing blocks include a plurality of development processing units (for example, , three developing processing units 37) and one of a plurality of coating processing units (for example, three developing processing units 37), and a second transport unit for transporting substrates in two second processing blocks (for example, , and a transport section 32). The two third processing blocks are provided with a plurality of development processing units and a third transport unit (transport unit 33 as an example) that transports substrates in the two third processing blocks.

As described above, according to the coating and developing apparatus according to the embodiment, one transport section is shared by two processing blocks, so that the configuration of the apparatus can be simplified.

The two second processing blocks may have a plurality of development processing sections. In this case, the two first processing blocks may be arranged below the two second processing blocks and the two third processing blocks. This makes it possible to form a flow from the bottom to the top of six or more processing blocks as a substrate transport flow.

The two first processing blocks may further include a pre-heating section (eg, first heating section BK1) that heats the substrate after coating processing. Also, the two third processing blocks may further include a post-heating section (for example, a third heating section BK3) that heats the substrate after the exposure processing.

In the first processing block, after the coating processing section applies coating processing to the substrate, the first transport section transports the substrate after the coating processing to the preheating section. Further, in the third processing block, after the development processing section performs the development processing on the substrate after the exposure processing, the third transportation section transports the substrate after the development processing to the post-heating section. As a result, for example, when the substrate is transferred between the coating processing section and the preheating section, it is possible to eliminate the need to transfer the substrate between a plurality of transfer sections. Further, when the substrate is transported between the development processing section and the post-heating section, it is possible to eliminate the need to transfer the substrate between a plurality of transport sections. Therefore, it is possible to increase the throughput of a series of coating and developing processes.

Further, the coating and developing apparatus according to the embodiment includes a loading/unloading station (loading/unloading station S1 as an example), a first delivery station (first delivery station S2 as an example), an interface station (an interface station S5) and a second delivery station (as an example, the second delivery station S4). The loading/unloading station includes a fourth transport section (transport section 13 as an example) that takes out and transports substrates from a cassette (cassette C as an example). The first transfer station is arranged between the loading/unloading station and six or more processing blocks, and is a first transfer section (for example, two first transfer sections TRS1-1 and TRS1-2) in which substrates are transferred. ). The interface station includes a fifth transport section (transport section 51 as an example) that unloads substrates before exposure processing and loads substrates after exposure processing. The second transfer station is a second transfer section (for example, three second transfer sections TRS2-1 to TRS2-3) arranged between the six or more processing blocks and the interface station to transfer substrates. Prepare. In addition, the first delivery station further includes a first cooling unit (for example, six first cooling units CL1-1 to CL1-6) and a sixth conveying unit (for example, two conveying units 22). may be The first cooling section is arranged above or below the first transfer section and cools the substrate. The sixth transport section transports the substrate within the first delivery station. In addition, the second delivery station may further include a second cooling unit (second cooling units CL2-1 to CL2-3 as an example) and a seventh transport unit (transport unit 42 as an example). . The second cooling section is arranged above or below the second transfer section and cools the substrate. The seventh transport section transports the substrate within the second delivery station.

At the loading/unloading station, the fourth transfer section takes out the substrate from the cassette and places it on the first transfer section. At the first transfer station, the sixth transfer section transfers the substrate from the first transfer section to the first cooling section. In the first processing block, the first transport unit transports the substrate from the first cooling unit to the coating processing unit, the coating processing unit performs coating processing on the substrate, and the first transport unit presses the substrate after the coating processing. The substrate is transported to the heating section, and the first transporting section transports the substrate from the preheating section to the second cooling section. Also, in the interface station, the fifth transfer section takes out the substrate from the second cooling section and carries it out.

In the interface station, the fifth transfer section loads the substrate after the exposure processing and places it on the second transfer section. In the third processing block, the third transport section transports the substrate from the second transfer section to the development processing section, the development processing section subjects the substrate to development processing, and the substrate after the development processing is transferred to the third transportation section. transports the substrate to the post-heating section, and the third transport section transports the substrate from the post-heating section to the first cooling section. Also, in the first transfer station, the sixth transfer section transfers the substrate from the first cooling section to the first transfer section. Also, in the loading/unloading station, the fourth transfer section takes out the substrate from the first transfer section and accommodates it in the cassette.

As a result, it is possible to suppress a decrease in throughput while simplifying the apparatus configuration of the coating and developing apparatus.

At the interface station, the substrate after exposure processing is loaded and placed on the second transfer section. In the third processing block, the third transport section transports the substrate from the second transfer section to the post-heating section, the third transport section transports the substrate from the post-heating section to the first cooling section, and the third transport section transports the substrate. is transported from the first cooling unit to the development processing unit, the development processing unit develops the substrate, the third transport unit transports the substrate after the development processing from the development processing unit to the post-heating unit, and the third A transport section transports the substrate from the post-heating section to the first cooling section. Also, in the first transfer station, the sixth transfer section transfers the developed substrate from the first cooling section to the first transfer section. Also, in the loading/unloading station, the fourth transfer section takes out the substrate from the first transfer section and accommodates it in the cassette. After the exposure process, the substrate before the development process is transported to the post-heating unit and heated, for example, the standing wave effect generated in the resist film during the exposure process can be reduced.

It should be considered that the embodiments disclosed this time are illustrative in all respects and not restrictive. Indeed, the above-described embodiments may be embodied in many different forms. Also, the above-described embodiments may be omitted, substituted, or modified in various ways without departing from the scope and spirit of the appended claims.

C Cassette W Wafer S1 Loading/unloading station S2 Transfer station S3 Processing station S4 Second transfer station S5 Interface station EXP Exposure device BM Transfer blocks B1 to B6 Processing blocks B1F to B6F Front side processing blocks B1B to B6B Back side processing block L1 1st Processing layer L2 Second processing layer L3 Third processing layer 1 Coating and developing devices 31 to 33 Conveying section 35 Coating processing section 37 Development processing section

Claims (6)

six or more processing blocks stacked ;
a loading/unloading station;
a first delivery station;
an interface station;
second delivery station and
with
The six or more processing blocks include:
two first processing blocks adjacent in the stacking direction;
two second processing blocks adjacent in the stacking direction;
and two third processing blocks adjacent in the stacking direction,
The two first processing blocks are:
a plurality of coating processing units that perform a coating process for coating a substrate with a resist;
a first transport unit that transports the substrate in the two first processing blocks ;
a pre-heating unit that heats the substrate after the coating process;
with
The two second processing blocks are
any one of a plurality of developing processing units and the plurality of coating processing units that perform development processing on the substrate that has been coated with the resist by the coating processing unit and has been subjected to exposure processing by an exposure device;
a second transport unit that transports the substrate in the two second processing blocks;
The two third processing blocks are:
the plurality of development processing units;
a third transport unit that transports the substrate in the two third processing blocks ;
a post heating unit that heats the substrate after the exposure processing;
with
The loading/unloading station includes:
A fourth transport unit that takes out the substrate from the cassette and transports it
with
The first delivery station
located between the loading/unloading station and the six or more processing blocks;
a first transfer section for transferring the substrate;
a first cooling unit arranged above or below the first transfer unit for cooling the substrate;
a sixth transport unit that transports the substrate in the first transfer station;
with
The interface station is
a fifth transport unit that unloads the substrate before the exposure processing and loads the substrate after the exposure processing;
with
The second delivery station
located between the six or more processing blocks and the interface station;
a second transfer section for transferring the substrate;
a second cooling unit disposed above or below the second transfer unit for cooling the substrate;
a seventh transport unit that transports the substrate in the second transfer station;
A coating and developing device. The two second processing blocks are
comprising the plurality of development processing units,
The two first processing blocks are:
2. The coating and developing apparatus according to claim 1, arranged below said two second processing blocks and said two third processing blocks. In the first processing block,
After the coating processing unit performs the coating processing on the substrate, the first transport unit transports the substrate after the coating processing to the preheating unit,
In the third processing block,
3. After the substrate subjected to the exposure processing is subjected to the development processing by the development processing unit, the third transportation unit transports the substrate after the development processing to the post-heating unit . The coating and developing device described in . At the loading/unloading station,
the fourth transport unit takes out the substrate from the cassette and places it on the first transfer unit;
At the first delivery station,
the sixth transport unit transports the substrate from the first transfer unit to the first cooling unit;
In the first processing block,
The first transport unit transports the substrate from the first cooling unit to the coating processing unit, the coating processing unit performs the coating processing on the substrate, and the substrate after the coating processing is transferred to the first cooling unit. a conveying unit conveys the substrate to the preheating unit, the first conveying unit conveys the substrate from the preheating unit to the second cooling unit,
at the interface station,
4. The coating and developing apparatus according to any one of claims 1 to 3 , wherein said fifth transport section takes out said substrate from said second cooling section and carries it out. at the interface station,
the fifth transport unit carries in the substrate after the exposure processing and places it on the second delivery unit;
In the third processing block,
The third transport section transports the substrate from the second transfer section to the development processing section, the development processing section performs the development processing on the substrate, and transfers the substrate after the development processing to the third processing section. a transport unit transports the substrate to the post-heating unit, the third transport unit transports the substrate from the post-heating unit to the first cooling unit;
At the first delivery station,
the sixth transport unit transports the substrate from the first cooling unit to the first delivery unit;
At the loading/unloading station,
5. The coating and developing apparatus according to claim 4 , wherein said fourth transfer section takes out said substrate from said first transfer section and stores it in said cassette. at the interface station,
carrying in the substrate after the exposure processing and placing it on the second delivery unit;
In the third processing block,
The third transport section transports the substrate from the second transfer section to the post heating section, the third transport section transports the substrate from the post heating section to the first cooling section, and the third transport section transports the substrate from the post heating section to the first cooling section. transports the substrate from the first cooling unit to the development processing unit, the development processing unit performs the development processing on the substrate, and the third transport unit transports the substrate after the development processing to the development processing unit. transporting the substrate from the developing processing section to the post-heating section, the third transporting section transporting the substrate from the post-heating section to the first cooling section;
At the first delivery station,
the sixth transport unit transports the substrate after the development treatment from the first cooling unit to the first delivery unit;
At the loading/unloading station,
5. The coating and developing apparatus according to claim 4 , wherein said fourth transfer section takes out said substrate from said first transfer section and stores it in said cassette.

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